Renesas R5F5671CHDFM#10
- Part No.:
- R5F5671CHDFM#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F5671CHDFM#10.pdf
- Description:
- IC MCU 32BIT 1.5MB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,786
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F5671CHDFM#10 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash with dual-bank support, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host interface, QSPIX, and capacitive touch sensing - deployed in industrial HMI, smart metering, and connected appliance control systems.
For engineers reviewing the R5F5671CHDFM#10 datasheet, R5F5671CHDFM#10 pinout, R5F5671CHDFM#10 application, or R5F5671CHDFM#10 equivalent, this page delivers verified specifications, package mapping to PLQP0144KA-B (144-pin LQFP), real-world use cases, and two validated alternative MCUs with documented functional and integration differences.
Technical Context
The R5F5671CHDFM#10 implements the RXv3 CPU core with 113 instructions, 16 general-purpose 32-bit registers, and hardware support for little- or big-endian data arrangement. It integrates a dedicated double-precision FPU with 16×64-bit data registers and 21 processing instructions, enabling deterministic floating-point computation without software emulation.
Its clock system combines an external crystal (8–24 MHz), sub-clock oscillator (32.768 kHz), and internal HOCO/LOCO oscillators, with independent frequency division for ICLK (up to 120 MHz), PCLKA (120 MHz), PCLKB (60 MHz), and ADCLK (60 MHz). The MCU supports IEC60730 Class B compliance via oscillation-stop detection, CRC-A, IWDTa, and A/D self-diagnostic functions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max, 707 CoreMark score - enables real-time deterministic execution of complex control algorithms. |
| Memory | 2 MB code flash (dual-bank, BGO programming), 8 KB data flash (100k write cycles), 384 KB SRAM (no wait states) - supports firmware updates without halting operation and robust data logging. |
| FPU | Double-precision IEEE-754 coprocessor - delivers hardware-accelerated math for motor control, sensor fusion, and digital signal processing. |
| Peripherals | 2× CAN (ISO11898-1, 32 mailboxes/channel), 1× USB 2.0 FS host/function/OTG, 1× SDHI (25 MB/s), 1× QSPIX (quad-SPI fetch), 2× 12-bit S12AD (8+12 ch), CTSU (17-key self-cap) |
| Security & Safety | Trusted Secure IP (TSIP) with AES128/192/256, RSA, ECC, TRNG, SHA256; MPU (8 regions); IEC60730-compliant diagnostics - meets embedded security and functional safety requirements. |
| Package & Temp | PLQP0144KA-B: 144-pin LQFP, 20 × 20 mm, 0.50-mm pitch; industrial grade (–40°C to +85°C) - compatible with standard PCB assembly and thermal management. |
Pinout & Package
Package: PLQP0144KA-B - 144-pin Low-profile Quad Flat Package, 20 × 20 mm body, 0.50-mm lead pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Power supply inputs | Core/analog domain supply (2.7–3.6 V); separate AVCC pins ensure low-noise analog reference for ADC and RTC. |
| VBATT | Backup power input | Enables RTC, backup registers, and sub-clock oscillator during main power loss - critical for timekeeping in energy meters. |
| XTAL/EXTAL | Main clock oscillator terminals | Supports 8–24 MHz crystal; paired with PLL for stable 120 MHz ICLK - required for USB timing and high-speed peripheral synchronization. |
| RTCIN/RTCOUT | Sub-clock oscillator terminals | Connects 32.768 kHz crystal for battery-backed RTC - enables calendar, alarm, and time-capture functions independent of main supply. |
| TXD0/RXD0 | SCI0 serial interface | Asynchronous UART channel for debug console or host communication - configurable baud rate, FIFO, and error detection. |
| TXD1/RXD1 | SCI1 serial interface | Dedicated SCI for LIN bus or RS-485 transceiver interfacing - supports LIN protocol framing and automatic wake-up detection. |
| CAN0TX/CAN0RX | CAN channel 0 differential pair | ISO11898-1 compliant physical layer interface - requires external CAN transceiver; supports standard/extended frames and mailbox-based filtering. |
| USB_VBUS/USB_DP/USB_DM | USB 2.0 Full-Speed interface | Integrated PHY with 2 KB on-chip buffer - enables host/device/OTG operation without external transceiver; supports enumeration and descriptor handling in firmware. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables seamless firmware updates: one bank executes while the other is reprogrammed - eliminates system downtime during field upgrades. |
| Capacitive Touch Sensing Unit (CTSU) | Supports 17-key self-capacitance or 64-key mutual-capacitance matrix - provides robust, low-power touch HMI without external ICs or calibration overhead. |
| Event Link Controller (ELC) | 99 internal event signals routed without CPU intervention - allows timer-triggered ADC sampling, PWM-triggered GPIO toggling, or CAN-interrupt-driven DMA transfers. |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES, RSA, ECC, and TRNG - secures firmware signing, key storage, and secure boot without consuming CPU cycles or exposing keys in RAM. |
| IEC60730 Class B support | Includes built-in oscillator stop detection, CRC-A engine, IWDTa with window function, and A/D self-test - reduces certification effort for household and industrial appliances. |
Applications
| Industrial HMI Panel | Smart Energy Meter |
|---|---|
Use Scenario: Touch-enabled front panel with real-time display, button feedback, and local data logging. IC Role / Device Role / Timing Role: Main application controller managing CTSU, LCD driver interface, SDHI for log storage, and USB for configuration. Use Value: Integrated CTSU and 384 KB SRAM eliminate external touch controller and reduce BOM cost; dual-bank flash enables remote firmware patching. |
Use Scenario: Electricity meter with tariff switching, tamper detection, and secure data upload via PLC or RF module. IC Role / Device Role / Timing Role: System-on-chip performing metrology preprocessing, RTC-based billing, TSIP-secured communication, and backup register retention. Use Value: VBATT-backed RTC and 4 KB standby RAM maintain time and critical state during power outage; TSIP prevents firmware cloning and data tampering. |
| Home Appliance Control | Automated Test Equipment |
Use Scenario: Washing machine control board requiring motor drive timing, temperature sensing, and user interface. IC Role / Device Role / Timing Role: Real-time controller coordinating MTU3a PWM outputs, 12-bit ADC for NTC readings, and SCI-based inverter communication. Use Value: 120 MHz RXv3 core and hardware FPU enable precise vector-controlled motor algorithms; CMTW timers provide µs-level phase alignment. |
Use Scenario: Benchtop instrument with multi-protocol connectivity (USB, CAN, SPI) and onboard signal generation. IC Role / Device Role / Timing Role: Embedded host processor managing USB device enumeration, CAN bus monitoring, QSPIX-based waveform memory, and SSIE audio test output. Use Value: Single-chip integration of USB, CAN, QSPIX, and SSIE reduces interconnect complexity and latency; EXDMACa enables zero-copy data streaming to/from peripherals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5670EHDFM#10 | Same RX671 Group, 1.5 MB flash, 256 KB SRAM, identical peripherals and pinout - lower memory density variant. | Suitable where firmware size < 1.5 MB and cost sensitivity outweighs need for full 2 MB flash headroom. | Select when BOM cost reduction is prioritized and application firmware fits within 1.5 MB with margin. |
| R5F566TEHDFP#10 | RX66T Group; 160 MHz CPU, 1 MB flash, 192 KB SRAM, optimized for motor control (3× MTU3, 3× CMTW), no SDHI or QSPIX. | Better suited for servo/inverter drives requiring high-resolution PWM and encoder capture - lacks SD/USB/QSPIX for data-intensive HMI. | Choose for motion control-centric designs where USB/SD/QSPIX are unnecessary and higher PWM resolution is critical. |
Compared with R5F5671CHDFM#10, the R5F5670EHDFM#10 offers identical integration and compatibility at reduced memory capacity, while the R5F566TEHDFP#10 trades HMI-focused peripherals for enhanced motor-control timing resources - guiding selection based on firmware footprint and primary system function.
Availability
R5F5671CHDFM#10 is available at Aetrix Electronics and suitable for industrial HMI, smart metering, and home appliance control applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F5671CHDFM#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX671 Group is designed for high-performance, secure, and feature-rich industrial and consumer applications - emphasizing real-time responsiveness, cryptographic acceleration, and rich peripheral integration for connected edge devices.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671CHDFM#10?
The R5F5671CHDFM#10 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark - measured under specified conditions per the official Renesas benchmark methodology. This performance level is enabled by the RXv3 CPU core's 113-instruction set, zero-wait-state 384 KB SRAM, and optimized pipeline. The R5F5671CHDFM#10 sustains this throughput across mixed workloads including interrupt handling, peripheral access, and floating-point computation.
Does the R5F5671CHDFM#10 support dual-bank flash for over-the-air updates?
Yes, the R5F5671CHDFM#10 features a dual-bank flash architecture that allows background programming (BGO) of one bank while executing code from the other. This enables safe, atomic firmware updates without system reset or interruption - essential for remote maintenance in deployed equipment. The R5F5671CHDFM#10 implements bank-exchange logic and startup-area selection via dedicated registers, fully documented in the R01DS0373EJ0120 datasheet.
What package type and pin count does the R5F5671CHDFM#10 use?
The R5F5671CHDFM#10 uses the PLQP0144KA-B package: a 144-pin LQFP with 20 × 20 mm body size and 0.50-mm lead pitch. It provides 111 general-purpose I/O pins, 20 of which are 5-V tolerant, and includes dedicated pins for USB, CAN, SDHI, QSPIX, and CTSU. This package is compatible with standard surface-mount assembly processes and thermal management for industrial ambient temperatures.
Which security features are implemented in hardware on the R5F5671CHDFM#10?
The R5F5671CHDFM#10 integrates Trusted Secure IP (TSIP) with hardware accelerators for AES128/192/256, TDES, RSA, ECC, SHA256, MD5, and a true random number generator (TRNG). It also includes a memory protection unit (MPU) with eight configurable regions and register write-protection logic for IEC60730 compliance. These features operate independently of the CPU core - ensuring cryptographic operations and memory isolation remain secure even under fault conditions. The R5F5671CHDFM#10 leverages these blocks for secure boot, firmware authentication, and key management.
Can the R5F5671CHDFM#10 operate with battery backup for RTC and registers?
Yes, the R5F5671CHDFM#10 supports battery backup via the VBATT pin, maintaining operation of the sub-clock oscillator, real-time clock (RTC), and 32 backup registers during main power loss. This functionality is validated across the industrial temperature range (–40°C to +85°C) and requires only a 1.8–3.6 V backup source. The R5F5671CHDFM#10 automatically switches to VBATT when VCC drops below the detection threshold, preserving timekeeping and critical state for applications like energy meters and alarm systems.
R5F5671CHDFM#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 44
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 10x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671CHDFM#10 FAQ
1.How can I place an order for R5F5671CHDFM#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671CHDFM#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671CHDFM#10 reliable?
The price and inventory of R5F5671CHDFM#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671CHDFM#10 is usually 5 days.
3.What payment methods are accepted for R5F5671CHDFM#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671CHDFM#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671CHDFM#10?
R5F5671CHDFM#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671CHDFM#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671CHDFM#10?
For technical support, including R5F5671CHDFM#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671CHDFM#10 requirements.
6.How does Aetrix verify that R5F5671CHDFM#10 is sourced from the original manufacturer or authorized distributors?
All R5F5671CHDFM#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671CHDFM#10 meets industry standards.
7.What is the process for return or replacement of R5F5671CHDFM#10?
All R5F5671CHDFM#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671CHDFM#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671CHDFM#10 part is unused and in its original packaging.
Return procedure for R5F5671CHDFM#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F5671CHDFM#10 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

