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Renesas R5F5671EDDFP#30
- Part No.:
- R5F5671EDDFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F5671EDDFP#30.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:167
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Product details
Overview
R5F5671EDDFP#30 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash with dual-bank support, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host interface, QSPIX, and capacitive touch sensing - deployed in industrial HMI and smart metering systems requiring real-time control and secure firmware updates.
For engineers reviewing the R5F5671EDDFP#30 datasheet, R5F5671EDDFP#30 pinout, R5F5671EDDFP#30 application, or R5F5671EDDFP#30 equivalent, key selection criteria include its 144-pin LFQFP package (PLQP0144KA-B), 120 MHz CPU performance (707 CoreMark), TSIP-based AES256/SHA256 encryption, 12-bit dual A/D converters (20 total channels), and IEC60730-compliant safety features including self-diagnostic ADC and oscillation-stop detection.
Technical Context
The R5F5671EDDFP#30 implements the RXv3 CPU core with 16×32-bit general-purpose registers, double-precision FPU (16×64-bit data registers), and collective register bank save for fast context switching. It supports little-endian or big-endian data arrangement and executes instructions at one per cycle at 120 MHz.
Its clock system integrates PLL, sub-clock oscillator (32.768 kHz), and dedicated IWDT 120-kHz oscillator, with independent domain clocks: ICLK (up to 120 MHz), PCLKA (up to 120 MHz for MTU/RSPI), PCLKB (up to 60 MHz for most peripherals), and ADCLK (up to 60 MHz for both S12AD units).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max - enables deterministic real-time execution with 707 CoreMark score and single-cycle instruction throughput. |
| Memory | 2 MB code flash (dual-bank), 8 KB data flash (100k erase cycles), 384 KB SRAM (no wait states), 4 KB standby RAM - supports background programming and secure firmware swapping. |
| FPU | Double-precision IEEE-754 coprocessor - delivers hardware-accelerated math for motor control algorithms and sensor fusion without software emulation overhead. |
| Security | Trusted Secure IP (TSIP) with AES128/192/256, SHA256, TRNG, and key protection - meets IEC60730 Class B requirements for secure boot and runtime integrity. |
| Analog | Dual 12-bit S12AD: Unit 0 (8 ch), Unit 1 (12 ch); conversion time 0.48 µs @12-bit - enables simultaneous sampling of multiple sensors with built-in disconnection detection. |
| Interfaces | CAN (2 ch, 32 mailboxes), USB 2.0 FS (host/function/OTG), SDHI (25 MB/s), QSPIX (fetch from serial flash), RIICHS (3.4 Mbps) - supports mixed-protocol connectivity in edge-node gateways. |
| Package | PLQP0144KA-B: 144-pin LFQFP, 20 × 20 mm, 0.50-mm pitch - provides 113 GPIOs (20×5-V tolerant), full signal routing for industrial I/O expansion. |
Pinout & Package
Package: PLQP0144KA-B - 144-pin Low-profile Quad Flat Package, 20 × 20 mm body, 0.50-mm lead pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Power supply inputs | Core/analog power domains (2.7–3.6 V); separate AVCC pins enable clean analog reference for 12-bit ADC accuracy. |
| VBATT | Backup power input | Supplies RTC and backup registers during main power loss - enables tamper-resistant timekeeping in energy meters. |
| XTAL, EXTAL | Main crystal oscillator terminals | Support 8–24 MHz external resonator; paired with internal PLL to generate stable 120 MHz ICLK with low jitter. |
| RTCIN, RTCOUT | Sub-clock oscillator terminals | Connect 32.768 kHz crystal for battery-backed RTC with leap-year and error compensation functions. |
| RES# | Active-low reset input | Hardware reset assertion; combined with POR and LVD circuits to ensure robust startup under brown-out conditions. |
| USB_DP, USB_DM | USB 2.0 full-speed differential pair | Integrated transceiver eliminates external PHY - enables direct connection to USB devices or hosts with embedded USB stack. |
| SD0_CMD, SD0_CLK, SD0_DAT0–3 | SD host interface signals | 1- or 4-bit SD bus supporting SD memory and SDIO cards per Physical Layer Spec v3.01 - used for field-upgradable firmware storage. |
| QSPIX_IO0–3, QSPIX_CLK, QSPIX_CS | Quad-SPI memory interface | Direct execution-from-flash capability via QSPIX - reduces boot time and external memory footprint in resource-constrained designs. |
Key Features
| Feature | Design Value |
|---|---|
| IEC60730 Safety Support | On-chip CRC accelerator, oscillation-stop detection, self-diagnostic ADC, register write protection - enables Class B certification without external safety monitors. |
| Capacitive Touch Sensing (CTSU) | 17-key self-capacitance or 64-key mutual-capacitance matrix - eliminates mechanical buttons in HMI panels with noise-immune sensing and low-power wake-on-touch. |
| Event Link Controller (ELC) | 99 internal event signals routed without CPU intervention - enables deterministic timer-triggered ADC sampling, PWM synchronization, and interrupt-free peripheral chaining. |
| Low-Power Modes | Four modes: Sleep, All-module clock stop, Software standby, Deep software standby - achieves µA-level current in deep standby while retaining RTC and 4 KB RAM. |
| Secure Boot & Firmware Updates | Trusted Memory (TM) function restricts code execution to protected flash areas; dual-bank flash allows atomic firmware updates with rollback recovery. |
Applications
| Industrial HMI Panel | Smart Energy Meter |
|---|---|
|
Use Scenario: Touch-enabled display interface with real-time energy monitoring, tariff switching, and local data logging. IC Role / Device Role / Timing Role: Main application controller executing GUI, managing capacitive touch input, driving SPI LCD, and synchronizing SD card writes via DMA. Use Value: CTSU unit supports 17-key panel with noise immunity; dual S12AD units simultaneously sample voltage/current transformers and temperature sensor (±1°C). |
Use Scenario: DIN-rail mounted electricity meter with metrology, communication (CAN/USB), tamper detection, and secure firmware updates. IC Role / Device Role / Timing Role: System-on-chip controller handling metrology data aggregation, RTC-backed timestamping, and encrypted CAN messaging to concentrators. Use Value: TSIP enables AES256-encrypted firmware updates; VBATT-powered RTC maintains accurate billing timestamps during mains failure. |
| Building Automation Gateway | Motor Control Edge Node |
|
Use Scenario: Protocol translator bridging BACnet MS/TP, Modbus RTU, and cloud-connected Wi-Fi/Ethernet interfaces. IC Role / Device Role / Timing Role: Central protocol engine managing multi-interface concurrency: RSPIA for SPI peripherals, SCIh for LIN, CAN for fieldbus, and USB for configuration. Use Value: 13-channel SCI + 2-channel CAN + QSPIX allow concurrent legacy and modern interface support; ELC links timer triggers to ADC for synchronized sensor polling. |
Use Scenario: Compact inverter drive with field-oriented control (FOC), current sensing, thermal monitoring, and overcurrent protection. IC Role / Device Role / Timing Role: Real-time motor controller using MTU3a complementary PWM outputs with programmable dead-time, triggered by TPUa encoder inputs. Use Value: Double-precision FPU accelerates FOC math; POE3a detects short-circuit faults and forces PWM pins to high-Z within nanoseconds. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F566TEADFP#30 | Same RXv3 core, 100-pin LFQFP, 1 MB flash, 256 KB SRAM, no SDHI or QSPIX - lacks serial memory fetch and high-speed storage interface. | Suitable for cost-sensitive motor control where SD card logging or external flash boot is unnecessary. | Select when board space and BOM cost constrain package size and peripheral count, but 120 MHz performance and TSIP remain essential. |
| R5F572MDHDFP#30 | RX72M group, 240 MHz CPU, 2 MB flash, 1.5 MB SRAM, enhanced EtherCAT slave support - higher performance and larger memory, but no CTSU or REMC. | Better suited for PLC controllers requiring real-time Ethernet motion control, not touch HMI or IR remote reception. | Choose for next-generation automation nodes needing deterministic EtherCAT timing, accepting trade-off of missing capacitive touch and remote control receiver. |
Compared with R5F5671EDDFP#30, the R5F566TEADFP#30 reduces footprint and cost at the expense of SD/QSPIX connectivity, while the R5F572MDHDFP#30 upgrades CPU speed and memory for Ethernet-centric applications but omits CTSU and REMC - making R5F5671EDDFP#30 uniquely balanced for touch-enabled, secure, field-upgradable edge devices.
Availability
R5F5671EDDFP#30 is available at Aetrix Electronics and suitable for industrial HMI, smart energy metering, building automation gateways, and motor control edge nodes requiring stable component supply across extended product lifecycles.
Supply support for R5F5671EDDFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for automotive, industrial, and IoT markets.
The RX671 Group targets high-integrity industrial applications demanding real-time performance, functional safety (IEC60730), and secure firmware - delivering an optimized balance of 120 MHz RXv3 processing, cryptographic acceleration, and rich analog/mixed-signal integration.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671EDDFP#30?
The R5F5671EDDFP#30 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark in benchmark testing. This performance stems from the RXv3 CPU core's single-cycle instruction execution, 16 general-purpose 32-bit registers, and efficient pipeline design - enabling deterministic real-time response in industrial control loops without software overhead.
Does the R5F5671EDDFP#30 support secure boot and firmware updates?
Yes, the R5F5671EDDFP#30 supports secure boot and firmware updates via its Trusted Memory (TM) function and Trusted Secure IP (TSIP). TM restricts code execution to protected flash areas, while TSIP provides AES256 encryption, SHA256 hashing, and true random number generation - enabling authenticated, encrypted firmware images and atomic dual-bank updates with rollback recovery in the R5F5671EDDFP#30.
What package type and pin count does the R5F5671EDDFP#30 use?
The R5F5671EDDFP#30 uses the PLQP0144KA-B package: a 144-pin Low-profile Quad Flat Package measuring 20 × 20 mm with 0.50-mm pitch. It provides 113 GPIOs (20 of which are 5-V tolerant), dedicated USB/SD/QSPIX pins, and an exposed thermal pad - designed for industrial PCB layouts requiring signal integrity and thermal reliability.
How many A/D converter channels does the R5F5671EDDFP#30 include, and what resolution options are available?
The R5F5671EDDFP#30 integrates two independent 12-bit A/D converters: S12AD unit 0 with 8 input channels and unit 1 with 12 input channels. Resolution is switchable between 8-, 10-, and 12-bit modes, with minimum conversion times of 0.42 µs, 0.45 µs, and 0.48 µs respectively - enabling flexible trade-offs between speed and precision for sensor interfacing in the R5F5671EDDFP#30.
Which communication interfaces are supported by the R5F5671EDDFP#30 for industrial connectivity?
The R5F5671EDDFP#30 supports CAN (2 channels, 32 mailboxes each), USB 2.0 Full-Speed (host/function/OTG), SD host interface (25 MB/s), QSPIX (serial flash fetch), RIICHS (3.4 Mbps), and 13-channel SCI - enabling simultaneous connectivity to fieldbuses, removable storage, secure peripherals, and legacy protocols in industrial gateways and edge controllers based on the R5F5671EDDFP#30.
R5F5671EDDFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671EDDFP#30 FAQ
1.How can I place an order for R5F5671EDDFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671EDDFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671EDDFP#30 reliable?
The price and inventory of R5F5671EDDFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671EDDFP#30 is usually 5 days.
3.What payment methods are accepted for R5F5671EDDFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671EDDFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671EDDFP#30?
R5F5671EDDFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671EDDFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671EDDFP#30?
For technical support, including R5F5671EDDFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671EDDFP#30 requirements.
6.How does Aetrix verify that R5F5671EDDFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F5671EDDFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671EDDFP#30 meets industry standards.
7.What is the process for return or replacement of R5F5671EDDFP#30?
All R5F5671EDDFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671EDDFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671EDDFP#30 part is unused and in its original packaging.
Return procedure for R5F5671EDDFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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