My Inquiry
My Account
Renesas R5F5671EDGFP#10
- Part No.:
- R5F5671EDGFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F5671EDGFP#10.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,402
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F5671EDGFP#10 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash with dual-bank support, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SDHI, QSPIX, and capacitive touch sensing - deployed in industrial HMI, smart metering, and secure IoT edge nodes.
For engineers reviewing the R5F5671EDGFP#10 datasheet, R5F5671EDGFP#10 pinout, R5F5671EDGFP#10 application, or R5F5671EDGFP#10 equivalent, key selection considerations include its 144-pin LFQFP package (PLQP0144KA-B), -40°C to +85°C temperature grade, TSIP-based AES256/SHA256 encryption, and real-time clock with battery-backed operation.
Technical Context
The R5F5671EDGFP#10 implements the RXv3 CPU core with 113 instructions, 16 general-purpose 32-bit registers, and hardware-accelerated 32×32→64-bit multiply/divide. Its memory subsystem includes dual-bank flash enabling background programming while executing from alternate bank, plus 384 KB zero-wait-state SRAM and 4 KB standby RAM backed by VBATT.
Peripherals are clocked independently: ICLK up to 120 MHz for CPU/QSPIX, PCLKA up to 120 MHz for MTU/RSPI/RIICHS, and PCLKB up to 60 MHz for most timers and A/D converters. The ELC enables hardware-triggered peripheral chaining without CPU intervention - critical for deterministic motor control and sensor fusion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max, 707 CoreMark score - delivers deterministic real-time performance for safety-critical firmware. |
| Memory | 2 MB code flash (dual-bank), 384 KB SRAM (no wait states), 8 KB data flash (100k erase cycles) - supports field firmware updates with zero downtime. |
| FPU | Double-precision IEEE-754 coprocessor - enables high-accuracy sensor fusion, motor control algorithms, and cryptographic operations. |
| Security | Trusted Secure IP (TSIP) with AES128/192/256, SHA256, TRNG, and key protection - meets IEC60730 Class B and secure boot requirements. |
| Timers & PWM | MTU3a (9-channel), TPUa (6-channel), CMTW (2×32-bit), IWDTa - supports 3-phase inverter control with dead-time compensation and synchronized ADC triggering. |
| Connectivity | CAN (2 channels, 32 mailboxes), USB 2.0 FS host/function, SDHI (25 MB/s), QSPIX (fetch from serial flash), RIICHS (3.4 Mbps) - enables robust industrial networking and local storage. |
| Analog | Two 12-bit S12AD units (8+12 ch), self-diagnostic, analog input disconnection detection - ensures reliable measurement in noisy environments. |
Pinout & Package
Package: PLQP0144KA-B, 144-pin LFQFP, 20 × 20 mm, 0.50-mm pitch, -40°C to +85°C operating range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V main supply; separate analog domains enable noise-isolated ADC operation. |
| VBATT | Backup power input | Supplies RTC, backup registers, and sub-clock oscillator during main power loss - enables timekeeping in deep standby. |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 8–24 MHz external crystal - provides precise system clock source for USB/SDHI timing compliance. |
| USB_DP / USB_DM | USB 2.0 full-speed differential pair | Integrated transceiver requires no external PHY - reduces BOM cost and board space for embedded USB device/host. |
| TXD0 / RXD0 | SCI channel 0 UART interface | Asynchronous serial port with programmable baud rate generator - used for debug console or host communication. |
| CTSU00–CTSU16 | Capacitive touch sensing inputs | 17 dedicated pins supporting self- or mutual-capacitance mode - enables up to 64-key touch panel without external controller. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables seamless firmware updates: execute from Bank A while programming Bank B - eliminates system downtime during OTA upgrades. |
| Event Link Controller (ELC) | Hardware interconnect between 99 internal events (e.g., timer overflow → ADC start → DMA transfer) - removes CPU polling overhead and improves real-time determinism. |
| Trusted Secure IP (TSIP) | On-die cryptographic accelerator with key protection and side-channel resistance - accelerates AES256/SHA256 by >10× vs. software-only implementation. |
| Capacitive Touch Sensing Unit (CTSU) | Self- and mutual-capacitance modes with built-in noise cancellation - achieves >60 dB noise immunity in industrial EMI environments. |
| Independent Watchdog (IWDTa) | Dedicated 120-kHz oscillator with windowed refresh - prevents both early and late watchdog resets, meeting IEC60730 Class B fault detection requirements. |
Applications
| Industrial HMI | Smart Energy Metering |
|---|---|
Use Scenario: Touch-enabled control panel for PLCs and motor drives with real-time diagnostics and secure firmware updates. IC Role / Device Role / Timing Role: Main application processor handling GUI rendering, CAN/USB communication, and encrypted data logging. Use Value: Dual-bank flash and TSIP enable secure, zero-downtime field updates; CTSU supports glove-compatible touch in harsh environments. | Use Scenario: DIN-rail mounted electricity meter with tamper detection, waveform analysis, and remote firmware validation. IC Role / Device Role / Timing Role: System-on-chip managing metrology ADC sampling, RTC-based billing, SDHI data storage, and TLS-secured cloud upload. Use Value: Integrated 12-bit dual S12AD with self-diagnostic meets IEC62053 accuracy; TSIP validates firmware signatures before execution. |
| Secure IoT Gateway | Motor Control Edge Node |
Use Scenario: Battery-powered gateway aggregating BLE/Zigbee sensors and forwarding encrypted data via CAN or USB to cloud infrastructure. IC Role / Device Role / Timing Role: Secure edge node performing protocol translation, AES-GCM encryption, and low-power scheduling. Use Value: TSIP's TRNG and key protection meet PSA Level 2; deep software standby with VBATT-backed RTC extends battery life >10 years. | Use Scenario: Compact inverter drive for HVAC compressors requiring precise 3-phase PWM, current sensing, and thermal monitoring. IC Role / Device Role / Timing Role: Real-time motion controller generating synchronized PWM, capturing ADC samples, and managing fault shutdowns. Use Value: MTU3a with complementary PWM and dead-time compensation ensures safe gate driving; ELC links PWM events to ADC triggers with <100 ns jitter. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5670EDGFP#10 | Same RX671 Group, 1 MB flash (vs. 2 MB), identical pinout and peripherals - lacks dual-bank flash capability. | Suitable for cost-sensitive designs where firmware update atomicity is not required. | Select when flash size and dual-bank operation are non-critical; retains full peripheral compatibility and footprint. |
| R5F566TEADFP#30 | RX66T Group, 160 MHz, 1.5 MB flash, optimized for motor control with 32-bit MTU3b and enhanced PWM resolution - no TSIP or SDHI. | Targeted at high-performance servo drives needing >120 MHz timing precision and advanced PWM features. | Choose for demanding motor control where TSIP and SDHI are unnecessary; requires PCB redesign due to different pinout. |
Compared with R5F5671EDGFP#10, the R5F5670EDGFP#10 offers identical packaging and peripheral set but reduced flash and no dual-bank support, while the R5F566TEADFP#30 trades security and storage interfaces for higher PWM resolution and CPU speed - making it unsuitable for secure IoT or data-logging roles.
Availability
R5F5671EDGFP#10 is available at Aetrix Electronics and suitable for industrial HMI, smart energy metering, secure IoT gateways, and motor control edge nodes requiring stable component supply across extended product lifecycles.
Supply support for R5F5671EDGFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise applications.
The RX671 Group targets secure, high-integrity embedded systems - combining real-time performance, cryptographic acceleration, and industrial-grade connectivity for next-generation IoT and industrial automation.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671EDGFP#10?
The R5F5671EDGFP#10 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark points under standard benchmark conditions. This performance stems from the RXv3 CPU core's efficient pipeline, dual-issue capability for certain instructions, and zero-wait-state access to 384 KB SRAM - all verified in Renesas' official R01DS0373EJ0120 datasheet. The R5F5671EDGFP#10 delivers deterministic real-time throughput essential for industrial control loops.
Does the R5F5671EDGFP#10 support dual-bank flash for firmware updates?
Yes, the R5F5671EDGFP#10 includes a dual-bank flash architecture enabling background programming - one bank can be executed while the other is erased or reprogrammed. This allows atomic firmware updates without halting application code, a requirement for IEC60730-compliant systems. The feature is implemented in hardware and documented in Section 1.1 of the R01DS0373EJ0120 datasheet. The R5F5671EDGFP#10 leverages this for secure over-the-air (OTA) updates in field-deployed devices.
What security features does the R5F5671EDGFP#10 provide for secure boot and firmware validation?
The R5F5671EDGFP#10 integrates Trusted Secure IP (TSIP) with AES128/192/256, SHA256, RSA, ECC, and a true random number generator (TRNG). It supports secure boot via signature verification of firmware images stored in flash, with protected key storage preventing extraction. These capabilities are certified for IEC60730 Class B and align with PSA Certified Level 2. The R5F5671EDGFP#10 uses TSIP to accelerate cryptographic operations in hardware - reducing latency and power versus software-only implementations.
Which package and temperature grade does the R5F5671EDGFP#10 use?
The R5F5671EDGFP#10 uses the PLQP0144KA-B package: a 144-pin LFQFP with 20 × 20 mm body and 0.50-mm pitch, rated for industrial temperature range (–40°C to +85°C). This package is explicitly listed in Table 1.2 of the R01DS0373EJ0120 datasheet and supports 113 GPIOs, including 20 5-V-tolerant pins. The R5F5671EDGFP#10's G-version counterpart (R5F5671EDGFP#30) offers extended temperature range up to +105°C.
Can the R5F5671EDGFP#10 operate from a backup battery and retain RTC functionality during main power loss?
Yes, the R5F5671EDGFP#10 supports battery backup via the VBATT pin, maintaining operation of the sub-clock oscillator, real-time clock (RTC), and backup registers during main power failure. This enables continuous timekeeping and event logging in deep software standby mode. The RTC includes leap-year correction, 30-second adjustment, and time-capture on external events - all detailed in Section 1.1 of the R01DS0373EJ0120 datasheet. The R5F5671EDGFP#10 guarantees RTC accuracy within ±1 ppm when using a 32.768 kHz crystal.
R5F5671EDGFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671EDGFP#10 FAQ
1.How can I place an order for R5F5671EDGFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671EDGFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671EDGFP#10 reliable?
The price and inventory of R5F5671EDGFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671EDGFP#10 is usually 5 days.
3.What payment methods are accepted for R5F5671EDGFP#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671EDGFP#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671EDGFP#10?
R5F5671EDGFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671EDGFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671EDGFP#10?
For technical support, including R5F5671EDGFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671EDGFP#10 requirements.
6.How does Aetrix verify that R5F5671EDGFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F5671EDGFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671EDGFP#10 meets industry standards.
7.What is the process for return or replacement of R5F5671EDGFP#10?
All R5F5671EDGFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671EDGFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671EDGFP#10 part is unused and in its original packaging.
Return procedure for R5F5671EDGFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F5671EDGFP#10 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
