Renesas R5F5671EHGFP#10
- Part No.:
- R5F5671EHGFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F5671EHGFP#10.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,432
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F5671EHGFP#10 from Renesas Electronics is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash with dual-bank support, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host interface, QSPIX, and capacitive touch sensing - deployed in industrial HMI and smart metering systems requiring real-time control, secure firmware updates, and low-power operation.
For engineers reviewing the R5F5671EHGFP#10 datasheet, R5F5671EHGFP#10 pinout, R5F5671EHGFP#10 application, or R5F5671EHGFP#10 equivalent, key selection considerations include its 144-pin LFQFP package (PLQP0144KA-B), -40°C to +105°C G-grade temperature rating, TSIP-based AES256/SHA256 encryption, 12-bit dual A/D converter (20-channel total), and IEC60730-compliant safety features including self-diagnostic ADC and oscillation-stop detection.
Technical Context
The R5F5671EHGFP#10 implements the RXv3 CPU core with 113 instructions, 16 general-purpose 32-bit registers, and double-precision FPU supporting 21 dedicated instructions. It integrates a memory protection unit (MPU) with eight configurable regions and supports little- or big-endian data arrangement.
Its clock system combines external crystal (8–24 MHz), sub-clock (32.768 kHz), and internal oscillators (LOCO/HOCO/IWDT-dedicated), enabling independent domain clocks: ICLK up to 120 MHz for CPU/QSPIX, PCLKA up to 120 MHz for MTU/RSPI/RIICHS, and PCLKB up to 60 MHz for most peripherals and ADCLK.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max, 707 CoreMark, double-precision IEEE-754 FPU |
| Memory | 2 MB code flash (dual-bank, BGO programming), 8 KB data flash (100k cycles), 384 KB SRAM (no wait states) |
| Package & Temp | PLQP0144KA-B (144-pin LFQFP, 20 × 20 mm, 0.50-mm pitch), G-grade (–40°C to +105°C) |
| Peripherals | 2× CAN (32 mailboxes/channel), 1× USB 2.0 FS host/function/OTG, 1× SDHI (25 MB/s), 1× QSPIX, 13× SCI, 3× RSPId, 1× RIICHS (3.4 Mbps) |
| Analog & Sensing | Two 12-bit S12AD units (8 + 12 channels), on-chip temperature sensor (±1°C), CTSU supporting 17 self-cap or 64 mutual-cap keys |
| Security & Safety | Trusted Secure IP (TSIP) with AES128/192/256, SHA256, TRNG, ECC, CRC-A, and IEC60730 compliance features |
Pinout & Package
Package: PLQP0144KA-B - 144-pin Low-profile Quad Flat Package, 20 × 20 mm body, 0.50 mm pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V main supply; separate analog domains enable noise-isolated ADC operation |
| VBATT | Backup power input | Enables RTC, backup registers, and sub-clock oscillator during main power loss |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external crystal for precise system timing and PLL reference |
| RES# | Active-low reset input | Hardware reset assertion; internally pulled up; compatible with open-drain reset supervisors |
| USB_DP / USB_DM | USB 2.0 full-speed differential pair | Integrated transceiver eliminates need for external PHY; supports host/function/OTG modes |
| SD_CLK / SD_CMD / SD_DAT0–3 | SD host interface signals | Direct 4-bit SD bus interface compliant with SD Physical Layer Spec v3.01 (no DDR) |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables seamless firmware updates via bank swap without halting execution or losing real-time responsiveness |
| Event Link Controller (ELC) | 99 internal event signals routed without CPU intervention - reduces latency for timer-triggered ADC sampling or PWM fault response |
| Capacitive Touch Sensing Unit (CTSU) | Supports both self- and mutual-capacitance modes on shared GPIO pins - enables robust touch HMI with minimal external components |
| IEC60730 safety suite | Includes hardware-accelerated CRC-A, IWDT windowing, oscillator stop detection, and ADC self-test - simplifies Class B certification |
| QSPIX interface | Fetches executable code directly from external quad-SPI flash - extends effective memory space while maintaining deterministic timing |
Applications
| Industrial Smart Meters | Human-Machine Interface (HMI) |
|---|---|
Use Scenario: Three-phase energy meter with tariff switching, tamper detection, and remote firmware update over PLC or RF link. IC Role / Device Role / Timing Role: Main application MCU managing metrology calculations, secure OTA updates via TSIP, and real-time RTC-based billing cycles. Use Value: Dual-bank flash allows safe background firmware upgrade; 12-bit dual A/D supports simultaneous voltage/current sampling; CAN/USB enable field service and diagnostics. |
Use Scenario: Panel-mounted industrial display with touch buttons, audio feedback, and SD card logging. IC Role / Device Role / Timing Role: Central controller handling capacitive touch decoding, serial audio playback via SSIE, and local data storage via SDHI. Use Value: Integrated CTSU eliminates external touch controller; SDHI supports FAT32 logging at 25 MB/s; 384 KB SRAM buffers graphics and audio streams. |
| Building Automation Gateway | Secure IoT Edge Node |
Use Scenario: Protocol translator bridging BACnet MS/TP, Modbus RTU, and KNX to Ethernet/Wi-Fi via external MAC. IC Role / Device Role / Timing Role: Protocol stack processor with deterministic timer-driven UART framing and CAN message arbitration. Use Value: 13-channel SCI supports concurrent legacy bus interfaces; MTU3a timers provide precise baud-rate generation and pulse-width modulation for actuator control. |
Use Scenario: Battery-powered sensor node performing encrypted sensor fusion (temp, touch, analog), BLE coexistence, and secure cloud upload. IC Role / Device Role / Timing Role: Low-power edge processor executing TLS handshake using TSIP crypto accelerators and managing deep software standby wake-up events. Use Value: Four low-power modes (deep software standby draws <1 µA); on-chip TRNG seeds secure key generation; VBATT-backed RTC maintains time across power cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5670EHGFP#10 | Same RX671 family, but 1 MB code flash (vs. 2 MB), no QSPIX interface, identical pinout and peripheral set otherwise | Suitable for cost-sensitive designs where external flash fetch is unnecessary and firmware size ≤1 MB | Select when flash capacity and QSPIX are not required - retains same thermal profile, security features, and toolchain compatibility |
| R5F566TEHGFP#10 | RX66T series; 160 MHz CPU, 1.5 MB flash, enhanced MTU3 for motor control, no TSIP or SDHI, different pinout (144-pin but incompatible signal mapping) | Targeted at inverter drives and servo control - prioritizes PWM resolution and encoder interface over connectivity/security | Choose only if motor control performance outweighs need for USB/SD/CAN/TSIP - requires PCB redesign due to non-pin-compatible layout |
Compared with R5F5671EHGFP#10, the R5F5670EHGFP#10 offers identical packaging and safety features at lower flash density, while the R5F566TEHGFP#10 trades connectivity and security for higher PWM precision and motor-specific timers - making it unsuitable as a drop-in replacement but viable for dedicated motion-control upgrades.
Availability
R5F5671EHGFP#10 is available at Aetrix Electronics and suitable for industrial HMI, smart metering, building automation gateways, and secure IoT edge nodes requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F5671EHGFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise markets.
The RX671 Group is designed for high-integrity industrial applications demanding real-time performance, functional safety (IEC60730), cryptographic security (TSIP), and rich connectivity - targeting smart infrastructure, energy management, and human-machine interaction systems.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671EHGFP#10?
The R5F5671EHGFP#10 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark under those conditions. This performance stems from the RXv3 CPU core's optimized pipeline, double-precision FPU, and zero-wait-state access to 384 KB SRAM. The R5F5671EHGFP#10 delivers deterministic real-time response critical for industrial control loops and protocol stacks.
Does the R5F5671EHGFP#10 support secure boot and firmware encryption?
Yes, the R5F5671EHGFP#10 integrates Trusted Secure IP (TSIP) supporting AES128/192/256, SHA256, ECC, and a true random number generator (TRNG). It enables secure boot verification, encrypted firmware updates, and key protection against illicit copying - all hardware-accelerated and compliant with IEC60730 Class B requirements. These capabilities are native to the R5F5671EHGFP#10 silicon.
What package type and thermal specifications apply to the R5F5671EHGFP#10?
The R5F5671EHGFP#10 uses the PLQP0144KA-B package: a 144-pin LFQFP with 20 × 20 mm body, 0.50 mm pitch, and exposed thermal pad. It is rated for the G-grade industrial temperature range of –40°C to +105°C, validated across full voltage (2.7–3.6 V) and frequency (up to 120 MHz) operation. This package ensures reliable thermal dissipation in enclosed industrial enclosures.
Can the R5F5671EHGFP#10 execute code directly from external quad-SPI flash memory?
Yes, the R5F5671EHGFP#10 includes a dedicated QSPIX interface that supports extended SPI, dual-SPI, and quad-SPI protocols - enabling direct XIP (execute-in-place) from external serial flash. Address width is configurable (8/16/24/32 bits), and the interface operates synchronously with ICLK up to 120 MHz, preserving real-time determinism without external memory controllers.
How many analog input channels does the R5F5671EHGFP#10 support, and what resolution options are available?
The R5F5671EHGFP#10 integrates two independent 12-bit A/D converter units: S12AD0 with 8 channels and S12AD1 with 12 channels - totaling 20 configurable analog inputs. Resolution is software-selectable per unit at 8-, 10-, or 12-bit modes, with conversion times of 0.42 µs (8-bit), 0.45 µs (10-bit), and 0.48 µs (12-bit) per channel. Both units support self-diagnostic and disconnection detection.
R5F5671EHGFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671EHGFP#10 FAQ
1.How can I place an order for R5F5671EHGFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671EHGFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671EHGFP#10 reliable?
The price and inventory of R5F5671EHGFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671EHGFP#10 is usually 5 days.
3.What payment methods are accepted for R5F5671EHGFP#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671EHGFP#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671EHGFP#10?
R5F5671EHGFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671EHGFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671EHGFP#10?
For technical support, including R5F5671EHGFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671EHGFP#10 requirements.
6.How does Aetrix verify that R5F5671EHGFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F5671EHGFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671EHGFP#10 meets industry standards.
7.What is the process for return or replacement of R5F5671EHGFP#10?
All R5F5671EHGFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671EHGFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671EHGFP#10 part is unused and in its original packaging.
Return procedure for R5F5671EHGFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F5671EHGFP#10 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

