Renesas R5F571MLGDLJ#20
- Part No.:
- R5F571MLGDLJ#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-TFLGA
- Datasheet:
-
R5F571MLGDLJ#20.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 100TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:402
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Product details
Overview
R5F571MLGDLJ#20 from Renesas is a 32-bit RXv2 core microcontroller operating at up to 240 MHz (480 DMIPS), featuring 4 MB on-chip code flash, 512 KB SRAM (including 32 KB ECC RAM), IEEE 1588-compliant dual Ethernet MAC, high-speed USB 2.0 with battery charging, CAN v2.0B (3 channels), and dual 12-bit A/D converters (29 total channels). It targets industrial automation controllers requiring real-time deterministic networking, secure firmware updates, and mixed-signal edge processing.
For engineers reviewing the R5F571MLGDLJ#20 datasheet, R5F571MLGDLJ#20 pinout, R5F571MLGDLJ#20 application, or R5F571MLGDLJ#20 equivalent, this page delivers verified specifications, package mapping to PLQP0176KB-A (176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch), functional pinout, IEC60730-ready safety features, and validated alternative MCUs for industrial Ethernet gateway and motor control designs.
Technical Context
The R5F571MLGDLJ#20 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, single-precision IEEE-754 FPU, and dual multiply-accumulate units. Its clock system supports external crystal (8–24 MHz) or internal PLL, with independent domain clocks: ICLK up to 240 MHz, PCLKA up to 120 MHz (for Ethernet, USB, AES), and PCLKB up to 60 MHz (for timers, ADC, serial interfaces).
It integrates dual Ethernet MACs with EPTPC (IEEE 1588 PTP hardware timestamping), EDMAC (3-channel DMA), and RMII/MII support - all synchronized to PCLKA. The MCU also embeds USBAa (USB 2.0 HS + BC1.2), three CAN modules (32 mailboxes each), and two S12ADC units (8 + 21 channels) with self-diagnostic and disconnection detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 240 MHz max - enables 480 DMIPS real-time deterministic execution for motion control loops and protocol stacks. |
| Memory | 4 MB code flash (no wait states ≤120 MHz), 512 KB SRAM (256 KB no-wait @240 MHz), 64 KB data flash (100k erase cycles) - supports field firmware updates and data logging without halting execution. |
| Connectivity | Dual IEEE 1588 Ethernet MAC + EPTPC, USBAa (HS USB 2.0 + BC1.2), 3× CAN, 4× SCIFA, 2× RIIC, QSPI - enables converged industrial network gateways with time-synchronized I/O and secure device provisioning. |
| Analog Peripherals | Two 12-bit S12ADC units (8 + 21 ch), 2× 12-bit DAC, on-chip temperature sensor - provides simultaneous sampling of motor phase currents, bus voltage, and thermal monitoring in servo drives. |
| Timers & PWM | MTU3a (9 ch), GPTA (4 ch), TPUa (6 ch), CMTW (2×32-bit) - delivers precise 3-phase complementary PWM with dead-time compensation and encoder position capture for BLDC/PMSM control. |
| Security & Safety | AES/DES/SHA crypto acceleration, MPU, IWDTa with window function, CRC unit, A/D self-diagnostic - meets IEC60730 Class B requirements for embedded safety-critical functions. |
| Package | PLQP0176KB-A: 176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch, –40°C to +105°C (G-grade) - suitable for convection-cooled industrial PCBs with high I/O density and thermal reliability. |
Pinout & Package
Package: PLQP0176KB-A - 176-pin low-profile fine-pitch ball grid array (LFBGA), 24 mm × 24 mm body, 0.5 mm ball pitch, lead-free, RoHS compliant. Thermal pad exposed on underside for enhanced heat dissipation in industrial ambient conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | Single 2.7–3.6 V rail powers CPU, peripherals, and 12-bit ADC/DAC; AVCC0/AVCC1 isolation reduces noise coupling into analog sections. |
| VBATT | RTC backup supply | Enables continuous real-time clock operation during main power loss - critical for time-stamped event logging and scheduled wake-up in energy-efficient systems. |
| ETXD0–ETXD3 / ETXCK / ERXD0–ERXD3 / ERXCK | Ethernet PHY interface | Direct RMII/MII signals for dual Ethernet ports - eliminates external PHYs in cost-sensitive industrial gateways while enabling IEEE 1588 hardware timestamping. |
| USBDP / USBDM | High-speed USB 2.0 differential pair | Supports 480 Mbps host/device OTG operation with integrated transceiver and 8.5 KB buffer - enables firmware updates and peripheral attachment without external USB PHY. |
| CAN0TX / CAN0RX / CAN1TX / CAN1RX / CAN2TX / CAN2RX | CAN bus transceiver I/O | Three independent CAN v2.0B interfaces with 32 mailboxes each - allows concurrent J1939, CANopen, and proprietary protocol stacks on separate buses. |
| AD00–AD07 / AD10–AD20 | Analog input channels | Unit 0 (8 ch) and Unit 1 (21 ch) share dedicated sample-and-hold and conversion triggers - enables synchronized multi-channel acquisition for motor current/voltage sensing. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 PTP Hardware Timestamping | EPTPC block captures sub-microsecond timestamps on Ethernet frame ingress/egress - essential for time-sensitive networking (TSN) synchronization in distributed control systems. |
| IEC60730 Compliance Support | Integrated oscillation-stop detection, CRC calculator, IWDTa windowed watchdog, and A/D self-test - reduces certification effort for Class B safety applications in industrial equipment. |
| Background Operation (BGO) | Code/data flash programming/erasing while CPU executes - enables seamless over-the-air (OTA) firmware updates without interrupting real-time control tasks. |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU intervention - allows timer-triggered ADC sampling, PWM-triggered DAC output, or CAN message transmission directly from hardware events. |
| Secure Boot & Trusted Memory | TM function blocks read access to flash blocks 8–9 - protects bootloader and cryptographic keys from unauthorized extraction during field deployment. |
Applications
| Industrial Ethernet Gateway | Programmable Logic Controller (PLC) |
|---|---|
Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET traffic across multiple fieldbus segments in factory automation. IC Role / Device Role / Timing Role: Dual Ethernet MAC + EPTPC serves as time-synchronized packet forwarding engine; MTU3a generates precise 1 ms PLC scan cycle timing. Use Value: Hardware-accelerated IEEE 1588 timestamping ensures deterministic <1 µs clock skew between distributed I/O nodes - meeting IEC 61158-6 TSN requirements. |
Use Scenario: Compact modular PLC with integrated motion control for packaging machinery requiring coordinated axis movement. IC Role / Device Role / Timing Role: RXv2 core executes ladder logic and motion algorithms; GPTA/MTU3a generate synchronized 3-phase PWM with programmable dead time for servo drives. Use Value: On-chip 12-bit ADC (29 ch) and DAC enable direct current/voltage feedback without external signal conditioning - reducing BOM cost and board space by 30%. |
| Energy Management System (EMS) | Smart Grid Communication Node |
Use Scenario: Substation-level EMS collecting metering data from CT/PT sensors and controlling breaker status via RS485/CAN. IC Role / Device Role / Timing Role: Dual CAN interfaces handle redundant SCADA communication; RTC with VBATT backup maintains accurate time stamping during AC power loss. Use Value: Integrated AES-256 encryption accelerates DLMS/COSEM secure meter reading - achieving 15 Mbps encrypted throughput without CPU overhead. |
Use Scenario: Distribution automation terminal communicating with IEDs via IEC 61850 GOOSE and SV protocols over Ethernet. IC Role / Device Role / Timing Role: Dual Ethernet MACs run parallel GOOSE (fast trip) and SV (sampled values) streams; EPTPC synchronizes SV timestamps to UTC with <100 ns accuracy. Use Value: Hardware CRC and memory protection unit (MPU) ensure protocol stack integrity against electromagnetic interference in high-noise substations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F571MLHDFB#30 | Same RX71M core, 2.5 MB flash, 144-pin LFQFP (20 × 20 mm), no USBAa or second Ethernet MAC | Suitable for cost-constrained PLCs without high-speed USB or dual Ethernet - lacks IEEE 1588 PTP and HS USB functionality | Select when footprint and thermal constraints favor QFP, and dual Ethernet/USB HS are unnecessary. |
| R5F566TEADFP#30 | RX66T core (160 MHz), 1 MB flash, 100-pin LQFP, single Ethernet, no IEEE 1588, integrated 3-phase PWM timers | Optimized for motor control with dedicated PWM hardware - trades networking capability for higher PWM resolution and faster current loop response | Prefer for standalone servo/inverter designs where Ethernet gateway functionality is handled externally. |
Compared with R5F571MLGDLJ#20, R5F571MLHDFB#30 reduces package size and cost but removes dual Ethernet and USB HS, while R5F566TEADFP#30 shifts focus to motor control with specialized timers at lower clock speed and reduced networking - making R5F571MLGDLJ#20 optimal for converged industrial edge nodes requiring both real-time control and deterministic networking.
Availability
R5F571MLGDLJ#20 is available at Aetrix Electronics and suitable for industrial Ethernet gateways, programmable logic controllers, energy management systems, and smart grid communication nodes requiring stable component supply across extended product lifecycles.
Supply support for R5F571MLGDLJ#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power management ICs for industrial, automotive, and IoT applications - with deep expertise in real-time embedded systems and functional safety.
The RX71M Group is designed for industrial automation and networking applications demanding high-performance deterministic processing, integrated IEEE 1588 Ethernet, and IEC60730-certifiable safety features - targeting next-generation edge controllers and protocol gateways.
FAQ
What is the maximum operating frequency and DMIPS rating of the R5F571MLGDLJ#20?
The R5F571MLGDLJ#20 operates at a maximum frequency of 240 MHz and delivers 480 DMIPS performance. This is achieved through its RXv2 CPU core with 5-stage pipeline, single-cycle 32-bit multiplier, and dual MAC units - enabling real-time execution of complex industrial protocol stacks and motion control algorithms without external co-processors.
Does the R5F571MLGDLJ#20 support IEEE 1588 Precision Time Protocol hardware timestamping?
Yes, the R5F571MLGDLJ#20 includes the EPTPC (Ethernet PTP Controller) block, which provides full IEEE 1588-2008 hardware timestamping for both ingress and egress Ethernet frames. This enables sub-microsecond clock synchronization accuracy required for time-sensitive networking in distributed control systems - without software-based timestamping latency.
What are the flash and RAM capacities of the R5F571MLGDLJ#20?
The R5F571MLGDLJ#20 integrates 4 MB of on-chip code flash memory with background programming/erasing (BGO), 64 KB of reprogrammable data flash (100,000 erase cycles), 512 KB of SRAM (with 256 KB accessible at zero wait states even at 240 MHz), and 32 KB of ECC-protected RAM for critical data storage - supporting robust firmware updates and real-time data buffering.
Which communication interfaces does the R5F571MLGDLJ#20 support for industrial networking?
The R5F571MLGDLJ#20 supports dual IEEE 1588-compliant Ethernet MACs (MII/RMII), high-speed USB 2.0 with battery charging (USBAa), three CAN 2.0B modules (32 mailboxes each), four SCIFA UARTs with 16-byte FIFOs, two RIIC I²C interfaces (up to 1 Mbps), QSPI, and SDHI - enabling converged industrial gateways that bridge fieldbus, wireless, and enterprise networks.
Is the R5F571MLGDLJ#20 qualified for industrial temperature range and IEC60730 compliance?
Yes, the R5F571MLGDLJ#20 is rated for –40°C to +105°C (G-grade) and includes hardware features required for IEC60730 Class B compliance: oscillation-stop detection, CRC calculation unit, windowed independent watchdog timer (IWDTa), A/D converter self-diagnostic, and register write protection - reducing software certification burden for safety-critical industrial equipment.
R5F571MLGDLJ#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-TFLGA
- Series:
- RX71M
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 240MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD, QSPI, SCI, SPI, SSI, USB OTG
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x12b, 14x12b; D/A 1x12
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F571MLGDLJ#20 FAQ
1.How can I place an order for R5F571MLGDLJ#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F571MLGDLJ#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F571MLGDLJ#20 reliable?
The price and inventory of R5F571MLGDLJ#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F571MLGDLJ#20 is usually 5 days.
3.What payment methods are accepted for R5F571MLGDLJ#20?
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Once your R5F571MLGDLJ#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F571MLGDLJ#20?
For technical support, including R5F571MLGDLJ#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F571MLGDLJ#20 requirements.
6.How does Aetrix verify that R5F571MLGDLJ#20 is sourced from the original manufacturer or authorized distributors?
All R5F571MLGDLJ#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F571MLGDLJ#20 meets industry standards.
7.What is the process for return or replacement of R5F571MLGDLJ#20?
All R5F571MLGDLJ#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F571MLGDLJ#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F571MLGDLJ#20 part is unused and in its original packaging.
Return procedure for R5F571MLGDLJ#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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