Renesas R5F572MDDGBG#20
- Part No.:
- R5F572MDDGBG#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LFBGA
- Datasheet:
-
R5F572MDDGBG#20.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 176LFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:152
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F572MDDGBG#20 from Renesas is a 32-bit RXv3 microcontroller with 240 MHz CPU, double-precision IEEE-754 FPU, 4 MB on-chip code flash, 1 MB SRAM (including 32 KB ECC RAM), and integrated EtherCAT slave controller - designed for real-time industrial automation systems requiring deterministic motion control, safety-compliant IEC 60730 operation, and IEEE 1588 time-synchronized Ethernet.
For engineers reviewing the R5F572MDDGBG#20 datasheet, R5F572MDDGBG#20 pinout, R5F572MDDGBG#20 application, or R5F572MDDGBG#20 equivalent, key selection criteria include dual-bank flash for safe firmware updates, 182 GPIOs with 5-V tolerance, 12-bit dual A/D converters (29 total channels), hardware-accelerated trigonometric functions (TFU), and support for EtherCAT two-port slave topology in G-version industrial temperature range (–40°C to +105°C).
Technical Context
The R5F572MDDGBG#20 implements the RXv3 CPU core with 1396 CoreMark at 240 MHz, featuring collective register bank save, MPU, JTAG/FINE debug, and dual-precision FPU with 16×64-bit registers. Its clock architecture supports independent domain scaling: ICLK up to 240 MHz, PCLKA up to 120 MHz (for ETHERC, ESC, GLCDC), and PCLKB up to 60 MHz (for timers, ADC, IWDT).
Real-time capability is reinforced by three dedicated DMA controllers (DMACAa: 8 ch, EXDMAC: 2 ch, DTCb: 1 ch), event-linking controller (ELC) for CPU-free peripheral coordination, and hardware time-stamping via EPTPC compliant with IEEE 1588-2008. The device integrates EtherCAT Slave Controller (ESC) IP core from Beckhoff and dual-channel Ethernet MAC with MII/RMII PHY interface.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 240 MHz max - enables real-time deterministic execution of motion control algorithms and EtherCAT frame processing without jitter. |
| Flash Memory | 4 MB code flash with dual-bank structure - allows background programming and seamless firmware update without halting application execution. |
| RAM | 1 MB SRAM (no wait states ≤120 MHz), 32 KB ECC RAM, 8 KB standby RAM - ensures data integrity and RTC backup during deep software standby. |
| EtherCAT | Integrated Beckhoff ESC IP core, two-port slave - eliminates external ASIC, reduces BOM cost, and guarantees cycle-accurate synchronization for multi-axis drives. |
| A/D Converter | Dual 12-bit S12AD units (8 + 21 channels), self-diagnostic and disconnection detection - meets IEC 60730 Class B functional safety requirements for analog sensor monitoring. |
| Operating Temp | –40°C to +105°C (G-version) - qualified for under-hood industrial PLCs, servo drives, and factory-floor HMIs exposed to thermal stress. |
| Package | PLBG0176GA-A, 176-pin LFBGA, 13 × 13 mm, 0.8-mm pitch - provides high I/O density and thermal performance for compact motor control modules. |
Pinout & Package
Package: PLBG0176GA-A, 176-pin Low-Profile Fine-Pitch Ball Grid Array (LFBGA), 13 mm × 13 mm, 0.8 mm ball pitch, RoHS-compliant, lead-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V operation; separate analog domains enable noise-isolated ADC reference and precision timing. |
| VBATT | Battery backup supply | Enables RTC operation during main power loss - critical for timestamped event logging in unattended machinery. |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 8–24 MHz external resonator for precise system clock generation and IEEE 1588 time base stability. |
| ESCL / ESDA | EtherCAT slave controller differential I/O | Direct connection to EtherCAT physical layer (two ports); no external transceiver required for basic topology. |
| MDIO / MDC | PHY management interface | Hardware-managed MDIO/MDC signaling for auto-negotiation and link status monitoring of external PHY chips. |
| IRQ0–IRQ15 | External interrupt inputs | 16 dedicated edge/level-sensitive pins for fast response to encoder Z-phase, emergency stop, or safety relay signals. |
Key Features
| Feature | Design Value |
|---|---|
| Trigonometric Function Unit (TFU) | Hardware-accelerated sine/cosine/arctangent - reduces CPU load by >90% vs. software library for servo position loop calculations. |
| Delta-Sigma Modulator Interface (DSMIF) | 6-channel sinc filter interface - enables direct connection to high-resolution current/voltage sensors (e.g., TI AMC130x) without external DSP. |
| Event Link Controller (ELC) | 137 internal event sources, programmable routing - eliminates polling and ISR overhead for timer-triggered ADC sampling or PWM dead-time compensation. |
| IEC 60730 Safety Support | Oscillation-stop detection, CRC accelerator, IWDT with window function, register write protection - satisfies Class B self-test requirements without external safety monitor. |
| Graphics & Display Engine | GLCDC + DRW2D - renders HMI graphics directly in SRAM, offloading CPU for concurrent motion control and UI rendering. |
Applications
| Industrial PLC Controller | Servo Drive Control Unit |
|---|---|
|
Use Scenario: Compact, DIN-rail-mounted programmable logic controller executing ladder logic, motion sequencing, and fieldbus communication in packaging lines. IC Role / Device Role / Timing Role: Main application processor with EtherCAT slave interface synchronizing I/O modules and axis controllers at 1 kHz cycle time. Use Value: Dual-bank flash enables zero-downtime firmware updates; TFU accelerates cam profile interpolation; 182 GPIOs support mixed digital/analog I/O expansion. |
Use Scenario: Integrated servo drive combining power stage control, current sensing, and real-time position loop execution in CNC machine tools. IC Role / Device Role / Timing Role: Real-time motion controller running position/velocity/current loops at 20 kHz, synchronized to master clock via IEEE 1588 timestamps. Use Value: DSMIF interfaces six isolated delta-sigma modulators for high-fidelity current feedback; GPTW timers generate complementary PWM with programmable dead time. |
| Factory Automation HMI | Energy Management Gateway |
|
Use Scenario: Touch-enabled operator panel with local visualization, alarm logging, and remote diagnostics over industrial Ethernet. IC Role / Device Role / Timing Role: Graphics subsystem host managing GLCDC display output, DRW2D rendering, and SDHI-based local storage for event history. Use Value: 1 MB SRAM buffers full-screen bitmap assets; USB FS host connects diagnostic tools; CAN interface links to legacy equipment. |
Use Scenario: Edge gateway aggregating metering data from smart sensors, performing local analytics, and forwarding to cloud via Ethernet/Wi-Fi bridge. IC Role / Device Role / Timing Role: Secure data concentrator with AES-256 encryption, trusted secure IP (TSIP), and dual Ethernet ports for upstream/downstream segmentation. Use Value: TSIP accelerates cryptographic operations; dual-channel Ethernet isolates OT and IT traffic; SDHI supports encrypted firmware OTA updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F572MDDBG#20 | Same RX72M core, 2 MB flash, 512 KB SRAM, identical package (PLBG0176GA-A) - lacks second 512 KB SRAM bank and dual-bank flash capability. | Suitable for cost-sensitive motion controllers where firmware update atomicity is not required. | Select when BOM cost reduction outweighs need for background flash programming and full 1 MB SRAM footprint. |
| R5F566TEADFP#30 | RX66T group, 160 MHz, 1 MB flash, 192 KB RAM, 100-pin LQFP - no EtherCAT, no IEEE 1588, no TFU, but higher PWM resolution (32-bit GPTP) and integrated op-amps. | Targeted at single-axis inverters with analog sensor conditioning and lower real-time networking demands. | Choose for analog-intensive motor control without industrial Ethernet, where smaller footprint and integrated signal conditioning reduce external components. |
Compared with R5F572MDDBG#20, the R5F572MDDGBG#20 delivers guaranteed firmware update safety and larger memory for complex HMI + control integration; versus R5F566TEADFP#30, it trades analog front-end integration for deterministic EtherCAT and IEEE 1588 time synchronization essential in multi-axis coordinated systems.
Availability
R5F572MDDGBG#20 is available at Aetrix Electronics and suitable for industrial PLCs, servo drives, factory HMIs, and energy gateways requiring stable component supply across extended product lifecycles and rigorous thermal qualification.
Supply support for R5F572MDDGBG#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power devices for automotive, industrial, and IoT markets.
The RX72M Group targets high-performance industrial automation, delivering deterministic real-time control, functional safety compliance, and integrated industrial Ethernet - specifically engineered for EtherCAT slave, motion control, and human-machine interface applications.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F572MDDGBG#20?
The R5F572MDDGBG#20 operates at a maximum frequency of 240 MHz and achieves 1396 CoreMark in benchmark testing. This performance level is enabled by the RXv3 CPU core's optimized pipeline, collective register bank save, and dual-precision floating-point unit - making it suitable for computationally intensive tasks such as real-time motion profiling and EtherCAT frame processing within strict cycle budgets.
Does the R5F572MDDGBG#20 support dual-bank flash for safe firmware updates?
Yes, the R5F572MDDGBG#20 includes a 4 MB on-chip code flash memory with dual-bank architecture. This allows background programming of one bank while executing code from the other, enabling atomic firmware updates without system interruption - a critical requirement for uptime-sensitive industrial equipment and certified IEC 60730 Class B applications.
What industrial Ethernet protocols does the R5F572MDDGBG#20 natively support?
The R5F572MDDGBG#20 integrates a Beckhoff EtherCAT Slave Controller (ESC) IP core supporting two-port topology and a dual-channel IEEE 802.3-compliant Ethernet MAC with IEEE 1588-2008 precision time protocol (PTP) support. It does not include native PROFINET, POWERLINK, or CC-Link IE hardware - those require external protocol stacks or companion ICs.
How many analog-to-digital converter channels does the R5F572MDDGBG#20 provide?
The R5F572MDDGBG#20 features two independent 12-bit A/D converter units: S12AD0 with 8 input channels and S12AD1 with 21 input channels, totaling 29 configurable analog inputs. Both units support self-diagnostic functions and analog input disconnection detection - fulfilling mandatory checks for IEC 60730 Class B safety certification in industrial control systems.
What is the operating temperature range and package type of the R5F572MDDGBG#20?
The R5F572MDDGBG#20 is rated for industrial operation from –40°C to +105°C (G-version) and housed in a PLBG0176GA-A package: a 176-ball LFBGA with 13 mm × 13 mm footprint and 0.8 mm ball pitch. This package supports high-density PCB layouts and efficient thermal dissipation in enclosed drive enclosures or PLC backplanes.
R5F572MDDGBG#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LFBGA
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit
- Speed:
- 240MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD, QSPI, SCI, SPI, SSI, USB OTG
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 136
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 1M x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F572MDDGBG#20 FAQ
1.How can I place an order for R5F572MDDGBG#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F572MDDGBG#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F572MDDGBG#20 reliable?
The price and inventory of R5F572MDDGBG#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F572MDDGBG#20 is usually 5 days.
3.What payment methods are accepted for R5F572MDDGBG#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F572MDDGBG#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F572MDDGBG#20?
R5F572MDDGBG#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F572MDDGBG#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F572MDDGBG#20?
For technical support, including R5F572MDDGBG#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F572MDDGBG#20 requirements.
6.How does Aetrix verify that R5F572MDDGBG#20 is sourced from the original manufacturer or authorized distributors?
All R5F572MDDGBG#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F572MDDGBG#20 meets industry standards.
7.What is the process for return or replacement of R5F572MDDGBG#20?
All R5F572MDDGBG#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F572MDDGBG#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F572MDDGBG#20 part is unused and in its original packaging.
Return procedure for R5F572MDDGBG#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F572MDDGBG#20 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

