Renesas R5F572MDDGFB#10
- Part No.:
- R5F572MDDGFB#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F572MDDGFB#10.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,849
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Product details
Overview
R5F572MDDGFB#10 from Renesas is a 32-bit RXv3 microcontroller operating at 240 MHz, featuring double-precision IEEE-754 FPU, 4 MB on-chip code flash, 1 MB SRAM (including 32 KB ECC RAM), EtherCAT slave controller with two ports, and IEEE 1588-compliant Ethernet MAC - deployed in industrial motion control systems requiring deterministic real-time communication and high-precision motor timing.
For engineers reviewing the R5F572MDDGFB#10 datasheet, R5F572MDDGFB#10 pinout, R5F572MDDGFB#10 application, or R5F572MDDGFB#10 equivalent, key selection criteria include dual-bank flash for safe firmware updates, 182 GPIOs with 5-V tolerance, integrated ESC IP core, 12-bit dual A/D converters (29 total channels), and support for deep software standby with 8 KB backup RAM.
Technical Context
The R5F572MDDGFB#10 implements the RXv3 CPU core with 16 general-purpose 32-bit registers, double-precision FPU (16×64-bit data registers), and collective register bank save for fast context switching. It integrates dedicated hardware accelerators including TFU for sine/cosine/arctangent, DSMIF for six delta-sigma modulators, and DRW2D for 2D graphics rendering.
Its clock architecture supports independent domain scaling: ICLK up to 240 MHz for CPU, PCLKA up to 120 MHz for MTU/ETHERC/GLCDC, PCLKB up to 60 MHz for TMR/CMT/SCIi, and BCLK up to 80 MHz for external bus access. The device includes three DMA controllers (DMACAa: 8 ch, EXDMAC: 2 ch, DTCb: 1 ch) and an event link controller (ELC) enabling 137 internal signal interlinks without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 240 MHz max, 1396 CoreMark, double-precision FPU, 113 instructions including DSP and FP ops |
| Memory | 4 MB code flash (dual-bank), 32 KB data flash (100k erase cycles), 1 MB SRAM (512 KB no-wait ≤120 MHz), 32 KB ECC RAM, 8 KB standby RAM |
| Timers | 4×32-bit GPTW, 9×16-bit MTU3a, 6×16-bit TPUa, 4×8-bit TMRa, 4×16-bit CMT, 2×32-bit CMTW, RTC with battery backup |
| Connectivity | EtherCAT slave (2-port), IEEE 1588 Ethernet MAC (2 ch), CAN (3 ch, 32 mailboxes each), USB 2.0 FS host/function, SDHI/MMCIF, QSPI, 13×SCI, 3×RIIC, 2×SSIE |
| Analog | Two 12-bit S12AD units (8 + 21 ch), 2×12-bit D/A, on-chip temperature sensor, TFU for trigonometric acceleration |
| Package & I/O | LFBGA-176 (PLQP0176KB-C, 24×24 mm, 0.5 mm pitch), 136 GPIOs, 19×5-V tolerant pins, open-drain, pull-up, switchable drive |
| Power & Temp | 2.7–3.6 V supply, four low-power modes (deep software standby), –40°C to +105°C (G-version) |
Pinout & Package
Package: PLQP0176KB-C, 176-pin LFBGA, 24 mm × 24 mm, 0.5 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Core & analog power supply | 2.7–3.6 V main supply; separate analog domains enable noise isolation for ADC/DAC operation |
| VBATT | Battery backup input | Supplies RTC during main power loss; enables calendar/timekeeping in deep software standby mode |
| RES# | Active-low reset input | Hardware reset assertion; synchronous release with internal POR/LVD logic and voltage monitoring |
| CLKIN, CLKOUT | External crystal interface | Supports 8–24 MHz crystal; connects to main oscillator circuit for PLL-based 240 MHz system clock generation |
| ETXD0–3, ERXD0–3 | Ethernet PHY interface | MII/RMII signals for 10/100 Mbps Ethernet; routed to integrated ETHERC and PMGI modules |
| ESC_CLK, ESC_DATA | EtherCAT slave interface | Dedicated differential pair for Beckhoff ESC IP core; enables real-time distributed clock synchronization |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash memory | Enables background programming and safe firmware update without halting execution; start-up bank selectable at reset |
| EtherCAT slave controller (ESC) | Integrated Beckhoff IP core with two physical ports; supports DC synchronization, process data exchange, and mailbox communication |
| IEEE 1588 Precision Time Protocol | Hardware timestamping in EPTPC module; sub-microsecond synchronization accuracy across Ethernet networks |
| Delta-sigma modulator interface (DSMIF) | Direct connection for up to six external ΔΣ modulators; sinc filter options (1st/2nd/3rd order) for high-resolution current/voltage sensing |
| Trigonometric function unit (TFU) | Hardware-accelerated sine/cosine/arctangent; eliminates software library overhead in motor vector control (FOC) loops |
| Event Link Controller (ELC) | 137 internal event sources mapped to peripherals; enables timer-triggered ADC sampling or PWM dead-time compensation without CPU ISR latency |
Applications
| Industrial Motion Control | Programmable Logic Controller (PLC) |
|---|---|
|
Use Scenario: High-speed servo drive with field-oriented control (FOC) and synchronized multi-axis positioning. IC Role / Device Role / Timing Role: Main controller executing real-time FOC algorithms, managing EtherCAT distributed clocks, and generating precise PWM waveforms via GPTW/MTU3a. Use Value: 240 MHz RXv3 core + TFU delivers <1 µs trig computation; dual-bank flash allows over-the-air firmware updates during runtime; 182 GPIOs support encoder feedback, I/O expansion, and safety monitoring. |
Use Scenario: Modular PLC base unit with EtherCAT I/O coupling, motion coordination, and HMI integration. IC Role / Device Role / Timing Role: Central processing node handling ladder logic execution, EtherCAT master/slave bridging, SD card logging, and GLCDC-driven local display. Use Value: Integrated EtherCAT slave + IEEE 1588 ensures deterministic cycle times (<100 µs); 4 MB flash stores multiple firmware images and configuration databases; DRW2D offloads GUI rendering from CPU. |
| Robotics Control Unit | Energy Monitoring Gateway |
|
Use Scenario: Compact robotic arm controller with torque sensing, real-time trajectory planning, and safety-critical stop functions. IC Role / Device Role / Timing Role: Real-time motion planner interfacing with six ΔΣ-based current sensors via DSMIF, driving 3-phase inverters using complementary PWM from MTU3a. Use Value: Six-channel DSMIF + 12-bit dual ADC enables simultaneous high-resolution current measurement; POE3a hardware protection prevents shoot-through during fault conditions; IEC60730 self-test features support functional safety certification. |
Use Scenario: Smart grid edge gateway aggregating metering data from CT/PT sensors and communicating via Ethernet/USB to SCADA systems. IC Role / Device Role / Timing Role: Sensor fusion hub performing RMS calculation, harmonic analysis, and time-stamped event logging using TFU and 12-bit ADCs. Use Value: Hardware TFU accelerates FFT preprocessing; IEEE 1588 timestamps ensure phase-aligned measurements across distributed meters; 32 KB ECC RAM protects critical calibration and security keys. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F572MDNDFB#10 | Same RX72M group, 144-pin LFQFP package (111 GPIOs), 2 MB flash, identical peripheral set except reduced external bus CS areas (6 vs 8) | Suitable for space-constrained designs where full 176-pin I/O count and 4 MB flash are unnecessary | Select when board layout favors QFP, cost sensitivity is higher, and external memory expansion is limited |
| R5F566TEBDFP#30 | RX66T group, 100-pin LFQFP, 240 MHz, 1 MB flash, no EtherCAT, no IEEE 1588, but enhanced motor control timers (GPTP) and 3-phase PWM output | Optimized for standalone inverter drives without networked motion control requirements | Choose for cost-sensitive single-axis motor drives where EtherCAT/1588 are not needed but advanced PWM timing is critical |
Compared with R5F572MDDGFB#10, the R5F572MDNDFB#10 offers identical real-time capabilities in a smaller footprint and lower cost but sacrifices 2 MB flash and 25 GPIOs; the R5F566TEBDFP#30 trades EtherCAT and 1588 for higher PWM resolution and lower package cost, making it suitable for non-networked motor control only.
Availability
R5F572MDDGFB#10 is available at Aetrix Electronics and suitable for industrial motion control, programmable logic controllers, robotics control units, and energy monitoring gateways requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F572MDDGFB#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for industrial, automotive, and IoT applications.
The RX72M Group, including R5F572MDDGFB#10, was designed specifically for real-time industrial automation systems requiring EtherCAT, IEEE 1588 synchronization, high-precision analog acquisition, and functional safety compliance (IEC60730).
FAQ
What is the maximum operating frequency and CoreMark score of the R5F572MDDGFB#10?
The R5F572MDDGFB#10 operates at a maximum frequency of 240 MHz and achieves 1396 CoreMark. This performance stems from the RXv3 CPU core's optimized pipeline, double-precision FPU, and zero-wait-state access to ROM cache and SRAM below 120 MHz. The R5F572MDDGFB#10 maintains deterministic timing even under heavy interrupt load due to its 256-vector interrupt controller and ELC hardware event routing.
Does the R5F572MDDGFB#10 support EtherCAT slave functionality, and what interface does it use?
Yes, the R5F572MDDGFB#10 integrates the Beckhoff EtherCAT Slave Controller (ESC) IP core with two physical ports. It uses dedicated ESC_CLK and ESC_DATA differential signal pairs routed to the LFBGA-176 package pins. The ESC supports distributed clocks, process data exchange, and mailbox communication per IEC 61158 Type 12, and is fully compatible with standard EtherCAT masters without external PHY translation.
What are the flash and RAM configurations of the R5F572MDDGFB#10?
The R5F572MDDGFB#10 includes 4 MB of on-chip code flash memory with dual-bank architecture, 32 KB of reprogrammable data flash (rated for 100,000 erase cycles), 1 MB of SRAM (split into 512 KB fast-access and 512 KB expansion), 32 KB of ECC-protected RAM, and 8 KB of battery-backed standby RAM. The R5F572MDDGFB#10 supports background programming/erasing and executes code directly from flash at up to 120 MHz with zero wait states when cache-hit.
Which analog peripherals are integrated into the R5F572MDDGFB#10?
The R5F572MDDGFB#10 integrates two independent 12-bit A/D converters (S12AD0 with 8 channels, S12AD1 with 21 channels), two 12-bit D/A converters, an on-chip temperature sensor, and a Delta-Sigma Modulator Interface (DSMIF) supporting up to six external ΔΣ modulators. It also includes a Trigonometric Function Unit (TFU) for hardware-accelerated sine/cosine/arctangent - all essential for high-fidelity motor current sensing and FOC computation in the R5F572MDDGFB#10.
What package type and thermal characteristics does the R5F572MDDGFB#10 use?
The R5F572MDDGFB#10 is housed in a PLQP0176KB-C 176-pin LFBGA package measuring 24 mm × 24 mm with 0.5 mm pitch and an exposed thermal pad. It is rated for operation from –40°C to +105°C (G-version), supports four low-power modes including deep software standby, and features a dedicated VBATT pin for RTC battery backup. The R5F572MDDGFB#10's thermal design enables sustained 240 MHz operation in industrial enclosures without forced air cooling.
R5F572MDDGFB#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit
- Speed:
- 240MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD, QSPI, SCI, SPI, SSI, USB OTG
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 1M x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F572MDDGFB#10 FAQ
1.How can I place an order for R5F572MDDGFB#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F572MDDGFB#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F572MDDGFB#10 reliable?
The price and inventory of R5F572MDDGFB#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F572MDDGFB#10 is usually 5 days.
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Once your R5F572MDDGFB#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F572MDDGFB#10?
For technical support, including R5F572MDDGFB#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F572MDDGFB#10 requirements.
6.How does Aetrix verify that R5F572MDDGFB#10 is sourced from the original manufacturer or authorized distributors?
All R5F572MDDGFB#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F572MDDGFB#10 meets industry standards.
7.What is the process for return or replacement of R5F572MDDGFB#10?
All R5F572MDDGFB#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F572MDDGFB#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F572MDDGFB#10 part is unused and in its original packaging.
Return procedure for R5F572MDDGFB#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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