Renesas R5F572NNDDLK#20
- Part No.:
- R5F572NNDDLK#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F572NNDDLK#20.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 145TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:155
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Product details
Overview
R5F572NNDDLK#20 from Renesas is a 32-bit RXv3 microcontroller operating at up to 240 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash, 1 MB SRAM (512 KB + 512 KB expansion), and integrated Ethernet MAC compliant with IEEE 1588. It delivers 1396 CoreMark performance and supports industrial motor control and networked HMI applications requiring real-time determinism, secure boot, and high-resolution graphics.
For engineers reviewing the R5F572NNDDLK#20 datasheet, R5F572NNDDLK#20 pinout, R5F572NNDDLK#20 application, or R5F572NNDDLK#20 equivalent, key selection criteria include its 176-pin LFBGA package (PLQP0176KB-C), dual-bank flash for safe firmware updates, 32 KB data flash rated for 100,000 erase/write cycles, and hardware-accelerated AES/TSIP encryption - all validated for IEC 60730 Class B compliance in safety-critical embedded systems.
Technical Context
The R5F572NNDDLK#20 implements the RXv3 CPU core with 16 general-purpose 32-bit registers, double-precision FPU (16×64-bit data registers), and collective register bank save for fast context switching. Its memory subsystem includes 2 MB code flash with ROM cache (8 KB), 32 KB data flash, 512 KB SRAM + 512 KB expansion RAM, and 32 KB ECC RAM supporting SEC-DED error correction.
Peripherals are clocked across four domains: ICLK (up to 240 MHz for CPU), PCLKA (up to 120 MHz for ETHERC/GLCDC), PCLKB (up to 60 MHz for TMR/CMT), and PCLKC/PCLKD (60 MHz for A/D converters). It integrates 2× Ethernet MACs with IEEE 1588 PTP support via EPTPC, 3× CAN channels (ISO 11898-1), and 13× serial interfaces including SCIi with 16-byte FIFOs and RIICa supporting 1 Mbps Fast-mode Plus.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 240 MHz max - enables deterministic real-time execution with 1396 CoreMark and single-cycle instruction throughput. |
| Memory | 2 MB code flash (dual-bank), 32 KB data flash (100k cycles), 1 MB SRAM (512 KB + 512 KB), 32 KB ECC RAM - supports robust firmware update, data logging, and safety-critical runtime integrity. |
| FPU | Double-precision IEEE-754 coprocessor - accelerates motor control algorithms, trigonometric calculations (via TFU), and floating-point signal processing without software emulation. |
| Connectivity | 2× IEEE 1588 Ethernet MAC, 3× CAN, 13× SCI, 3× I2C (1 Mbps), 3× RSPI, 1× QSPI, SDHI, MMCIF - enables converged industrial networking with time-synchronized motion control and fieldbus bridging. |
| Timers & PWM | 4× GPTW (32-bit), 9× MTU3a, 6× TPUa, 2× CMTW - provides synchronized multi-axis PWM generation with dead-time control, encoder input, and A/D trigger coordination for servo drives. |
| Analog | 2× 12-bit S12AD (8+21 ch), 2× 12-bit D/A, on-chip temperature sensor - supports closed-loop current/voltage sensing and analog feedback in motor control and power conversion. |
| Security | AES-128/192/256 + TSIP - enables secure boot, encrypted firmware storage, and cryptographic key management per IEC 62443 requirements. |
| Package | PLQP0176KB-C, 176-pin LFBGA, 24 × 24 mm, 0.5 mm pitch - optimized for high-density industrial PCB layouts with thermal and EMI performance validated for –40°C to +85°C operation. |
Pinout & Package
Package: PLQP0176KB-C - 176-pin Low-Profile Quad Flat Package (LFBGA), 24 mm × 24 mm body, 0.5 mm ball pitch, RoHS-compliant, lead-free, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V main supply; separate analog domains ensure noise isolation for ADC/DAC accuracy. |
| VBATT | Battery backup supply | Enables RTC operation during main power loss - critical for timestamping and alarm retention in energy metering. |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 8–24 MHz external crystal for precise system timing and IEEE 1588 synchronization stability. |
| ETH_MDC / ETH_MDIO | PHY management interface | Provides MDIO/MDC bus for auto-negotiation and PHY register configuration without CPU overhead. |
| ETXD0–ETXD3 / ERXD0–ERXD3 | Ethernet MAC data lines | 4-bit nibble-wide RMII/MII interface - enables compact 10/100 Mbps Ethernet with minimal pin count and PCB routing. |
| TXD0 / RXD0 | SCI0 asynchronous interface | Dedicated UART pins for bootloader communication, debug console, or host MCU command interface. |
| PE0–PE15 | General-purpose I/O port E | 16-bit parallel bus capable of GLCDC data interface or PDC camera input - supports direct CMOS sensor connection. |
| RESET# | Active-low reset input | Asynchronous hardware reset with internal pull-up; triggers full system initialization including flash controller and peripheral state machines. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol (PTP) | Hardware-accelerated timestamping in EPTPC module synchronizes distributed motor drives to sub-microsecond accuracy over Ethernet. |
| Dual-bank flash memory | Enables seamless firmware updates: one bank executes while the other is reprogrammed - eliminates downtime in industrial PLCs and HMIs. |
| Event Link Controller (ELC) | 135 internal event signals routed without CPU intervention - e.g., TPU capture triggers ADC conversion, reducing jitter in sensor sampling. |
| Trigonometric Function Unit (TFU) | Hardware sine/cosine/arctangent calculation - accelerates field-oriented control (FOC) loops in inverters without floating-point library overhead. |
| Graphic LCD Controller (GLCDC) | Direct RGB interface driving up to WXGA (1366×768) panels - offloads GUI rendering from CPU, enabling responsive touch-based HMIs. |
| IEC 60730 Class B support | Integrated oscillation-stop detection, CRC accelerator (CRCA), self-diagnostic A/D, and register write protection - simplifies functional safety certification. |
Applications
| Industrial Motor Drive | Networked HMI Terminal |
|---|---|
|
Use Scenario: High-performance servo drive controlling PMSM/BLDC motors with field-oriented control and real-time current loop closure. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, generating synchronized 3-phase PWM via GPTW/MTU3a, and sampling current via dual 12-bit ADCs with hardware-triggered conversion. Use Value: 240 MHz RXv3 core + TFU + dual-bank flash enables <1 µs current loop latency and safe firmware updates during operation. |
Use Scenario: Touch-enabled factory floor HMI displaying real-time machine status, alarms, and production KPIs over EtherNet/IP. IC Role / Device Role / Timing Role: Application processor running FreeRTOS/GUI framework, managing GLCDC-driven display, Ethernet MAC for protocol stack, and SDHI for local data logging. Use Value: Integrated IEEE 1588 PTP ensures synchronized alarm timestamps across distributed HMIs; 1 MB SRAM buffers video frames and protocol stacks. |
| Energy Metering Gateway | Secure Industrial Gateway |
|
Use Scenario: Smart electricity meter aggregating data from multiple CT/PT sensors and communicating via Power Line Communication (PLC) or cellular backhaul. IC Role / Device Role / Timing Role: Data concentrator performing harmonic analysis (via FPU), RTC-based billing interval counting, and secure firmware OTA updates using TSIP. Use Value: On-chip 32 KB data flash stores 30+ days of metering logs; VBATT-backed RTC maintains accurate time stamping during grid outages. |
Use Scenario: Edge gateway connecting legacy Modbus RTU devices to cloud platforms via MQTT over TLS-secured Ethernet. IC Role / Device Role / Timing Role: Secure bridge implementing TLS handshake acceleration (AES), protocol translation, and firewall rules via packet filtering in ETHERC. Use Value: Hardware AES/TSIP reduces TLS handshake latency by >70% vs. software-only; dual Ethernet ports enable isolated control/data networks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F572MNDHLK#20 | Same RX72N Group, 144-pin LFQFP (PLQP0144KA-B), 2 MB flash, but lacks Ethernet MAC and GLCDC. | Suitable for cost-sensitive motor control where Ethernet and graphics are unnecessary. | Select when board space allows larger QFP footprint and Ethernet/graphics are omitted to reduce BOM cost. |
| R5F566TKEDFP#30 | RX66T Group, 100-pin LFQFP, 1.25 MB flash, 240 MHz, no Ethernet MAC or TSIP, but adds dedicated timer for motor control (MTU3b). | Optimized for single-axis servo drives with tighter timing constraints on PWM generation. | Prefer for compact, high-speed motor control without networking - lower pin count and no Ethernet PHY interface required. |
Compared with R5F572NNDDLK#20, the R5F572MNDHLK#20 sacrifices Ethernet and graphics for smaller footprint and lower cost, while the R5F566TKEDFP#30 trades security and networking for enhanced motor-control-specific peripherals and reduced package size - making R5F572NNDDLK#20 the only choice for converged industrial edge nodes requiring time-synchronized networking, graphics, and cryptographic trust anchors.
Availability
R5F572NNDDLK#20 is available at Aetrix Electronics and suitable for industrial motor drives, networked HMI terminals, energy metering gateways, and secure industrial gateways requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F572NNDDLK#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX72N Group, including R5F572NNDDLK#20, was designed for high-end industrial automation applications demanding real-time determinism, functional safety, networked connectivity, and rich human-machine interaction - integrating Ethernet, graphics, security, and motor control in a single chip.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F572NNDDLK#20?
The R5F572NNDDLK#20 operates at a maximum frequency of 240 MHz and achieves 1396 CoreMark performance. This score reflects its RXv3 CPU core efficiency, double-precision FPU, and optimized memory subsystem - validated under conditions specified in Renesas document R01DS0343EJ0120. The R5F572NNDDLK#20 sustains this performance across its full operating temperature range (–40°C to +85°C) with no thermal throttling.
Does the R5F572NNDDLK#20 support IEEE 1588 Precision Time Protocol, and how is it implemented?
Yes, the R5F572NNDDLK#20 supports IEEE 1588 through its dedicated EPTPC (Precision Time Protocol Controller) module, which works in conjunction with the ETHERC Ethernet MAC. It provides hardware timestamping of PTP packets at the physical layer, enabling sub-microsecond synchronization accuracy. This capability is integral to the R5F572NNDDLK#20's architecture and does not require external timing ICs or software compensation.
What are the flash memory configurations supported by the R5F572NNDDLK#20?
The R5F572NNDDLK#20 integrates 2 MB of on-chip code flash memory with a dual-bank structure, allowing background programming and safe firmware updates. It also includes 32 KB of data flash rated for 100,000 erase/write cycles. Both memories support programming via on-board or off-board methods, and the R5F572NNDDLK#20's ROM cache (8 KB) enables zero-wait-state execution at up to 120 MHz or on cache hits at 240 MHz.
Which package type and pin count does the R5F572NNDDLK#20 use?
The R5F572NNDDLK#20 uses the PLQP0176KB-C package: a 176-pin Low-Profile Quad Flat Package (LFBGA) with 24 mm × 24 mm body size and 0.5 mm ball pitch. This package is thermally and electrically optimized for industrial applications and matches the pinout defined in Renesas' RX72N Group datasheet R01DS0343EJ0120 for 176-pin variants.
Does the R5F572NNDDLK#20 include hardware encryption, and what standards does it support?
Yes, the R5F572NNDDLK#20 includes optional hardware encryption via AES-128/192/256 and Trusted Secure IP (TSIP). TSIP provides key management, secure boot, and cryptographic acceleration compliant with IEC 62443-3-3 Annex A. These features are silicon-verified and documented in the R5F572NNDDLK#20's security reference manual, enabling certified secure firmware deployment without external crypto co-processors.
R5F572NNDDLK#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX72N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 240MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD, QSPI, SCI, SPI, SSI, USB OTG
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 1M x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F572NNDDLK#20 FAQ
1.How can I place an order for R5F572NNDDLK#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F572NNDDLK#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F572NNDDLK#20 reliable?
The price and inventory of R5F572NNDDLK#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F572NNDDLK#20 is usually 5 days.
3.What payment methods are accepted for R5F572NNDDLK#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F572NNDDLK#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F572NNDDLK#20?
R5F572NNDDLK#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F572NNDDLK#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F572NNDDLK#20?
For technical support, including R5F572NNDDLK#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F572NNDDLK#20 requirements.
6.How does Aetrix verify that R5F572NNDDLK#20 is sourced from the original manufacturer or authorized distributors?
All R5F572NNDDLK#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F572NNDDLK#20 meets industry standards.
7.What is the process for return or replacement of R5F572NNDDLK#20?
All R5F572NNDDLK#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F572NNDDLK#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F572NNDDLK#20 part is unused and in its original packaging.
Return procedure for R5F572NNDDLK#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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