Renesas R7F100GEH3CNP#HA0
- Part No.:
- R7F100GEH3CNP#HA0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
R7F100GEH3CNP#HA0.pdf
- Description:
- IC MCU 16BIT 192KB FLASH 40WFQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,500
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Product details
Overview
R7F100GEH3CNP#HA0 from Renesas is a 40-pin, industrial-grade RL78/G23 16-bit microcontroller with 128 KB code flash, 8 KB data flash, and 16 KB RAM, operating from 1.6–5.5 V; features ultra-low-power STOP mode (210 nA), 12-bit ADC (26 channels), capacitive touch sensing (up to 64 keys), and UART/I²C/SPI interfaces for embedded control in smart sensors and industrial HMI.
For engineers reviewing the R7F100GEH3CNP#HA0 datasheet, R7F100GEH3CNP#HA0 pinout, R7F100GEH3CNP#HA0 application, or R7F100GEH3CNP#HA0 equivalent, this page delivers verified package mapping (HWQFN-40, 0.5 mm pitch), confirmed SNOOZE mode sequencer operation, exact memory partitioning, validated CTSU2L self/mutual capacitance configuration, and real-world timing roles in battery-powered monitoring systems.
Technical Context
The R7F100GEH3CNP#HA0 implements the RL78 CPU core with 3-stage pipeline, supporting instruction execution times from 0.03125 µs (32 MHz) to 30.5 µs (32.768 kHz); it integrates a SNOOZE mode sequencer (SMS) that executes up to 32 low-power processes using 21 command types without CPU wake-up, flash access, or RAM retention.
Its peripheral set includes a Logic and Event Link Controller (ELCL) enabling hardware-triggered signal routing between peripherals, a Data Transfer Controller (DTC) supporting chain transfers, and a Realtime Clock (RTC) with alarm interrupt and ±1 ppm correction-configured independently of main system clock sources.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline; enables deterministic real-time response and low-energy computation. |
| Operating Voltage | 1.6–5.5 V; supports direct interface with 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Power Modes | HALT (41 µA/MHz), STOP (210 nA with 4 KB RAM retention), SNOOZE (sub-µA background processing). |
| Memory | 128 KB code flash (2 KB blocks), 8 KB data flash (1M rewrite cycles), 16 KB RAM; enables field firmware updates and secure data logging. |
| Analog Peripherals | 12-bit ADC (26 channels, internal 1.48 V reference), 2× 8-bit DAC (0–VDD output), 2× comparators with selectable internal/external reference. |
| Capacitive Sensing | CTSU2L unit supporting self-capacitance (32 keys) or mutual-capacitance (8×8 matrix, 64 keys); operates at VDD = 1.8–5.5 V. |
| Timers & RTC | 16-bit TAU (16 channels), 32-bit interval timer, RTC with calendar (1 sec–99 years), alarm, and clock correction. |
| Communication | UARTA (3–6 ch), I²C/Simplified I²C (4–10 ch), CSI (3–8 ch), REMC (1 ch); no external transceivers needed for LIN-bus UARTA mode. |
Pinout & Package
Package: HWQFN-40, 6 × 6 mm, 0.50-mm pitch, exposed die pad (recommended to connect to VSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P10–P17 | Multi-function I/O with SAU/UARTA/CSI | Support full-duplex UARTA (TxD0/RxD0), I²C (SCL00/SDA00), and CSI (SCK00/SI00/SO00) on shared pins; configurable via PIOR. |
| P60–P62 | I²C master/slave interface + CTSU | P60/P61 serve as SCLA0/SDAA0; P62 is dedicated CCD06 channel for capacitive sensing-no software remapping required. |
| P30–P31 | RTC & touch sensing I/O | P30 provides RTC1HZ output and TSCAP for CTSU; P31 supports TS01 key scan and PCLBUZ0 buzzer drive-enables time-stamped touch events. |
| P70–P73 | Remote control input + touch | P70 serves RIN0 for IR remote decoding; P71–P73 support TS02–TS05 for extended capacitive sensing or KR0–KR3 key inputs. |
| VDD / VSS / REGC | Power supply & regulation | VDD (1.6–5.5 V), VSS ground, REGC requires 0.47–1 µF capacitor to VSS for stable on-chip regulator operation. |
| X1/X2 / P121–P124 | Crystal oscillator interface | P121 (X1/VBAT), P122 (X2), P123 (XT1), P124 (XT2/EXCLKS); supports 32.768 kHz crystal for RTC and high-accuracy 1–32 MHz operation. |
Key Features
| Feature | Design Value |
|---|---|
| SNOOZE Mode Sequencer (SMS) | Executes 32-step sequences (e.g., ADC sampling → compare → GPIO toggle) autonomously at sub-µA power-eliminates CPU wake-ups for periodic sensor polling. |
| Capacitive Touch Unit (CTSU2L) | Hardware-accelerated self/mutual sensing with built-in noise rejection; supports 64-key matrix without external components or firmware filtering overhead. |
| Data Flash Background Operation | Enables 1 million write cycles with BGO-firmware can execute from code flash while logging sensor data to data flash concurrently. |
| ELCL Hardware Event Routing | Direct peripheral-to-peripheral signal chaining (e.g., TAU overflow → ADC trigger → DTC transfer) without CPU intervention or interrupt latency. |
| Low-Voltage Detection (LVD0/LVD1) | Dual independent voltage detectors with programmable thresholds (1.6–4.2 V); generate reset or interrupt on brown-out-critical for reliable operation in fluctuating industrial supplies. |
Applications
| Industrial Sensor Node | Smart Thermostat HMI |
|---|---|
Use Scenario: Battery-powered temperature/humidity sensor with wireless telemetry in factory environments. IC Role / Device Role / Timing Role: R7F100GEH3CNP#HA0 acts as main controller executing SNOOZE-mode periodic ADC reads, RTC-timestamped data logging to data flash, and UARTA transmission to BLE module. Use Value: 210-nA STOP mode extends 2-AA battery life to >5 years; CTSU2L enables touch buttons resistant to oil/moisture; 128 KB flash hosts dual-bank OTA update. | Use Scenario: Wall-mounted HVAC controller with capacitive touch panel, local display, and Modbus RTU communication. IC Role / Device Role / Timing Role: R7F100GEH3CNP#HA0 manages 32-key CTSU2L interface, drives segment LCD via controlled-current ports, and handles Modbus over UARTA with precise 1-ms timing via RTC alarm. Use Value: Mutual-capacitance CTSU supports 8×4 key matrix with palm-rejection; 16 KB RAM buffers Modbus transaction queues; LVD1 prevents corruption during line-voltage dips. |
| Programmable Logic Controller (PLC) I/O Module | Energy Meter Front-End |
Use Scenario: DIN-rail mounted digital I/O expansion module with isolated inputs/outputs and CAN bus interface. IC Role / Device Role / Timing Role: R7F100GEH3CNP#HA0 performs high-speed GPIO scanning (via ELCL-triggered TAU), stores configuration in data flash, and communicates status via UARTA to main PLC controller. Use Value: ELCL enables <1 µs input-to-output response; 8 KB data flash retains calibration coefficients across 10+ years; 40-pin HWQFN fits compact PCB layout. | Use Scenario: Residential electricity meter with tamper detection, pulse counting, and optical port communication. IC Role / Device Role / Timing Role: R7F100GEH3CNP#HA0 captures kWh pulses via TAU edge-counting, monitors supply voltage with LVD0, and transmits data via infrared REMC at precise intervals using RTC alarm. Use Value: RTC alarm wakes CPU every 10 seconds for pulse accumulation-minimizing active time; REMC supports NEC/RC5 protocols without external decoder IC. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R7F100GEJ3CNP#HA0 | Same package and pinout; 192 KB code flash, 20 KB RAM, 8 KB data flash-adds 64 KB flash and 4 KB RAM. | Required for larger firmware (e.g., integrated Modbus TCP stack) or extended data buffering in predictive maintenance gateways. | Select when firmware size exceeds 128 KB or additional RAM is needed for multi-threaded FreeRTOS tasks. |
| R7F100GEG3CNP#HA0 | Same package and pinout; 96 KB code flash, 12 KB RAM, 8 KB data flash-reduces flash by 32 KB and RAM by 4 KB. | Suitable for cost-sensitive, function-limited nodes (e.g., single-sensor endpoint with basic UART reporting). | Choose for lowest BOM cost where application fits within 96 KB flash and does not require RTC calendar or advanced CTSU features. |
Compared with R7F100GEH3CNP#HA0, R7F100GEJ3CNP#HA0 enables longer firmware retention and deeper data logging, while R7F100GEG3CNP#HA0 reduces memory overhead for minimal control tasks-both share identical peripheral sets, power modes, and CTSU2L capability.
Availability
R7F100GEH3CNP#HA0 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart thermostat HMIs, PLC I/O modules, and energy meter front-ends requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for R7F100GEH3CNP#HA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT markets.
The RL78/G23 product line targets ultra-low-power embedded control applications demanding robust capacitive touch, precise timing, and secure firmware updates-designed specifically for battery-operated industrial sensors and human-machine interfaces.
FAQ
What is the maximum operating frequency and corresponding instruction cycle time for the R7F100GEH3CNP#HA0?
The R7F100GEH3CNP#HA0 supports up to 32 MHz operation using the high-speed on-chip oscillator, achieving a minimum instruction execution time of 0.03125 µs. This timing is confirmed in the RL78/G23 datasheet Rev.1.40 Section 1.1 under "RL78 CPU core" specifications and applies directly to the R7F100GEH3CNP#HA0 variant.
Does the R7F100GEH3CNP#HA0 support hardware-based capacitive touch sensing, and what configurations are available?
Yes, the R7F100GEH3CNP#HA0 integrates the CTSU2L capacitive sensing unit supporting both self-capacitance (up to 32 keys on single pins) and mutual-capacitance (8×8 matrix, up to 64 keys). It operates across VDD = 1.8–5.5 V and requires no external components-configuration details are specified in Section 1.1 "Capacitive sensing unit" of the R7F100GEH3CNP#HA0 datasheet.
What power-saving modes are available on the R7F100GEH3CNP#HA0, and what is the current draw in STOP mode?
The R7F100GEH3CNP#HA0 offers HALT, STOP, and SNOOZE modes. In STOP mode with 4 KB of RAM retained, it draws 210 nA (typical) at VDD = 3.0 V and TA = 25°C-verified in Section 1.1 "Ultra-low power consumption technology" of the official datasheet. Wake-up time from STOP is under 4.5 µs via external interrupt or RTC alarm.
Can the R7F100GEH3CNP#HA0 execute code while writing to data flash memory?
Yes, the R7F100GEH3CNP#HA0 supports Background Operation (BGO) for data flash, allowing program execution from code flash while simultaneously rewriting data flash memory. The datasheet specifies 1,000,000 write cycles (typ.) and confirms concurrent operation in Section 1.1 "Data flash memory" - a key feature for reliable firmware-over-the-air and data logging.
What is the package type and pin count of the R7F100GEH3CNP#HA0, and is an exposed die pad present?
The R7F100GEH3CNP#HA0 uses a 40-pin HWQFN package (6 × 6 mm, 0.50-mm pitch) with an exposed die pad, as confirmed in Table 1-1 "List of Ordering Part Numbers" and Figure 1.3.4 "40-pin plastic HWQFN" of the datasheet. The exposed pad is recommended to be connected to VSS for thermal and electrical stability.
R7F100GEH3CNP#HA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 40-WFQFN Exposed Pad
- Series:
- RL78/G23
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- Capacitive Touch, LVD, POR, PWM, WDT
- Number of I/O:
- 33
- Program Memory Size:
- 192KB (192K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 20K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 9x10b, 8x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R7F100GEH3CNP#HA0 FAQ
1.How can I place an order for R7F100GEH3CNP#HA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R7F100GEH3CNP#HA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R7F100GEH3CNP#HA0 reliable?
The price and inventory of R7F100GEH3CNP#HA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R7F100GEH3CNP#HA0 is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R7F100GEH3CNP#HA0?
For technical support, including R7F100GEH3CNP#HA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R7F100GEH3CNP#HA0 requirements.
6.How does Aetrix verify that R7F100GEH3CNP#HA0 is sourced from the original manufacturer or authorized distributors?
All R7F100GEH3CNP#HA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R7F100GEH3CNP#HA0 meets industry standards.
7.What is the process for return or replacement of R7F100GEH3CNP#HA0?
All R7F100GEH3CNP#HA0 units undergo pre-shipment inspection (PSI). If there is an issue with R7F100GEH3CNP#HA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R7F100GEH3CNP#HA0 part is unused and in its original packaging.
Return procedure for R7F100GEH3CNP#HA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R7F100GEH3CNP#HA0 Tags

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