Renesas R7F100GFG2DFP#HA0
- Part No.:
- R7F100GFG2DFP#HA0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 44-LQFP
- Datasheet:
-
R7F100GFG2DFP#HA0.pdf
- Description:
- IC MCU 16BIT 128KB FLASH 44LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,000
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Product details
Overview
R7F100GFG2DFP#HA0 from Renesas is an RL78/G23 16-bit MCU with 256 KB code flash, 8 KB data flash, and 24 KB RAM, operating at 1.6–5.5 V; features include 12-bit A/D converter (26 channels), capacitive touch sensing (up to 64 keys), real-time clock, and ultra-low-power STOP mode (210 nA data retention); used in battery-powered industrial HMI and sensor nodes.
For engineers reviewing the R7F100GFG2DFP#HA0 datasheet, R7F100GFG2DFP#HA0 pinout, R7F100GFG2DFP#HA0 application, or R7F100GFG2DFP#HA0 equivalent, key selection criteria include its 44-pin LQFP-0.8mm package, -40°C to +85°C industrial temperature grade, integrated CTSU2L for self/mutual capacitance sensing, and SNOOZE mode sequencer for autonomous low-power peripheral sequencing without CPU wake-up.
Technical Context
The R7F100GFG2DFP#HA0 implements the RL78 CPU core with 3-stage pipeline, supporting instruction execution times from 0.03125 µs (32 MHz) to 30.5 µs (32.768 kHz), and includes a dedicated SNOOZE mode sequencer (SMS) capable of executing 32 sequential commands across 21 instruction types-enabling autonomous analog monitoring, timer triggering, and I/O control while the CPU remains halted.
It integrates a Logic and Event Link Controller (ELCL) that routes event signals between peripherals (e.g., ADC completion → DMA trigger → UART transmit), plus a Data Transfer Controller (DTC) supporting chain transfer and block/normal/repeat modes activated by 128 interrupt sources-reducing CPU load during high-throughput data movement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline and multiply/divide/accumulate instructions |
| Flash Memory | 256 KB code flash + 8 KB data flash with background operation (BGO) and 1M rewrite cycles |
| RAM | 24 KB on-chip RAM with 210-nA data retention current in STOP mode |
| Operating Voltage | 1.6 V to 5.5 V single supply-supports direct interface with 1.8/2.5/3.0 V logic systems |
| A/D Converter | 12-bit resolution, 26 input channels, internal 1.48 V reference and temperature sensor |
| Capacitive Sensing | CTSU2L unit supporting self-capacitance (32 keys) or mutual-capacitance (8×8 matrix = 64 keys) |
| Timers | 16-bit TAU (16 channels), 32-bit interval timer (1×32-bit + 2×16-bit + 4×8-bit), RTC with alarm/correction |
| Communication | Up to 10 I²C/Simplified I²C, 6 UART/UARTA (LIN-supported), 8 CSI/SPI channels |
Pinout & Package
Package: 44-pin plastic LQFP (10 × 10 mm, 0.80-mm pitch), industrial-grade (–40°C to +85°C), embossed tape packaging (#HA0).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | Analog input / UARTA TX | 12-bit ADC channel ANI17 and TxD1 output; supports TS26 touch-sensing function |
| P01 | Analog input / UARTA RX | 12-bit ADC channel ANI16 and RxD1 input; supports TS27 touch-sensing function |
| P10–P17 | Serial interface I/O | Configurable SCK00/SI00/SO00 (SPI), SDA00/SCL00 (I²C), TxD0/RxD0 (UARTA), PCLBUZ0/1 (buzzer output) |
| P20–P23 | Analog front-end | ADC inputs ANI0–ANI3 with AVREFP/AVREFM references; IVREF0/IVREF1 for comparator bias |
| P30–P31 | Capacitive sensing / RTC | TSCAP and TS01 pins for CTSU2L; RTC1HZ output and key interrupt INTP3/INTP4 |
| P50–P51 | Serial array unit (SAU) | SI11/SDA11 and SO11 interfaces for I²C/SPI; also serve as CCD02/CCD03 for capacitive sensing |
| P60–P61 | I²C master/slave | SCLA0 and SDAA0 pins-dedicated hardware I²C interface with clock stretching support |
| RESET | System reset input | Active-low asynchronous reset with built-in power-on-reset (POR) and dual voltage detectors (LVD0/LVD1) |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power STOP mode | 210 nA retention current for full 24 KB RAM-enables multi-year battery life in metering applications |
| SNOOZE mode sequencer (SMS) | Executes up to 32 autonomous operations (e.g., ADC sampling → compare → GPIO toggle) without CPU intervention |
| Capacitive Touch Sensing Unit (CTSU2L) | Hardware-accelerated self/mutual capacitance measurement with noise immunity-no firmware filtering required |
| Data Flash Background Operation (BGO) | Execute code from flash while rewriting 8 KB data flash-enables seamless firmware parameter updates |
| Event Link Controller (ELCL) | Configurable hardware routing between 128+ peripherals-eliminates software polling and ISR overhead |
| Controlled current drive ports | 6–8 pins with programmable 2–12 mA sink/source-directly drives LEDs or small solenoids without external drivers |
Applications
| Smart Thermostat Interface | Industrial Sensor Node |
|---|---|
Use Scenario: Wall-mounted HVAC controller with capacitive touch buttons, ambient temperature/humidity sensing, and wireless backhaul via UART-to-LoRa module. IC Role / Device Role / Timing Role: R7F100GFG2DFP#HA0 serves as main system controller-managing CTSU2L touch detection, 12-bit ADC acquisition, RTC-based scheduling, and UART communication. Use Value: Integrated CTSU2L and 26-channel ADC reduce BOM count; STOP mode extends AA-battery life beyond 5 years. | Use Scenario: DIN-rail mounted environmental monitor measuring vibration, temperature, and gas concentration in factory settings. IC Role / Device Role / Timing Role: R7F100GFG2DFP#HA0 acts as data acquisition engine-triggering ADC conversions, timestamping readings via RTC, and buffering results in 24 KB RAM before UART transmission. Use Value: 210-nA STOP mode enables energy harvesting compatibility; ELCL links ADC EOC to DTC for zero-CPU data movement to UART FIFO. |
| Programmable Logic Controller (PLC) I/O Module | Home Appliance Control Board |
Use Scenario: Compact 4-channel digital input/output expansion module for modular PLC systems, accepting 24 V DC sensors and driving 12 V relays. IC Role / Device Role / Timing Role: R7F100GFG2DFP#HA0 provides isolation-aware GPIO control, PWM generation for analog outputs, and UART-based Modbus RTU communication. Use Value: Controlled-current drive ports directly interface with optocouplers; 1.6–5.5 V operation simplifies auxiliary power design. | Use Scenario: Washing machine main control board managing motor drive timing, water level sensing, user interface, and safety interlocks. IC Role / Device Role / Timing Role: R7F100GFG2DFP#HA0 functions as safety-certified system manager-running watchdog-timed state machines, monitoring thermistors via 12-bit ADC, and controlling buzzer/PWM outputs. Use Value: Dual LVDs (LVD0/LVD1) enable configurable brown-out detection; hardware RTC ensures accurate cycle timing independent of main loop jitter. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R7F100GFJ2DFP#HA0 | Same 44-pin LQFP package and RL78/G23 core, but with 192 KB code flash, 20 KB RAM, and identical peripherals | Lower memory configuration suits cost-sensitive designs where firmware footprint < 192 KB and RAM usage ≤ 20 KB | Select when application firmware fits within reduced memory and lower BOM cost is prioritized over future scalability |
| R7F100GFL2DFP#HA0 | Same package and core, with 384 KB code flash and 32 KB RAM-higher memory capacity but identical I/O and peripheral set | Targeted at feature-rich applications requiring larger OTA update partitions or complex UI rendering buffers | Choose when firmware growth headroom or extended data logging capability justifies higher unit cost |
Compared with R7F100GFJ2DFP#HA0, the R7F100GFG2DFP#HA0 offers 64 KB more code flash and 4 KB more RAM-enabling larger secure bootloaders and deeper sensor fusion buffers; versus R7F100GFL2DFP#HA0, it trades 128 KB flash and 8 KB RAM for lower cost and power, making it optimal for mid-complexity industrial controls.
Availability
R7F100GFG2DFP#HA0 is available at Aetrix Electronics and suitable for industrial HMI, battery-powered sensor nodes, programmable logic controller modules, and home appliance control boards requiring stable component supply across multi-year production cycles.
Supply support for R7F100GFG2DFP#HA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT markets.
The RL78/G23 product line delivers true low-power performance for cost-sensitive industrial and consumer applications-designed around ultra-low active current (41 µA/MHz), sub-µA STOP mode, and integrated human-machine interface peripherals including CTSU2L and buzzer controllers.
FAQ
What is the maximum operating frequency and corresponding instruction execution time for the R7F100GFG2DFP#HA0?
The R7F100GFG2DFP#HA0 operates at up to 32 MHz using the high-speed on-chip oscillator. At this frequency, the minimum instruction execution time is 0.03125 µs. The core also supports ultra-low-speed operation at 32.768 kHz (30.5 µs/instruction) for RTC and standby functions-both modes are selectable without external crystals.
Does the R7F100GFG2DFP#HA0 support hardware-based capacitive touch sensing, and how many keys can it handle?
Yes, the R7F100GFG2DFP#HA0 integrates the CTSU2L capacitive sensing unit. It supports self-capacitance mode for up to 32 independent keys using single-pin configuration, or mutual-capacitance mode in 8×8 matrix layout for up to 64 keys-both with built-in noise cancellation and automatic calibration, eliminating need for external components or firmware compensation.
What are the power supply requirements and low-power modes supported by the R7F100GFG2DFP#HA0?
The R7F100GFG2DFP#HA0 requires a single 1.6 V to 5.5 V supply, compatible with 1.8 V, 2.5 V, and 3.0 V logic domains. It supports HALT (core stop, peripherals active), STOP (peripherals halted, RAM retained at 210 nA), and SNOOZE modes. SNOOZE enables autonomous peripheral sequencing-including ADC sampling, comparison, and GPIO toggling-without CPU wake-up or flash access.
Can the R7F100GFG2DFP#HA0 perform simultaneous read and write operations on its flash memory?
No-the R7F100GFG2DFP#HA0 does not support concurrent read-while-write on code flash. However, it supports Background Operation (BGO) on its separate 8 KB data flash: instructions can be executed from code flash while data flash is being rewritten, enabling seamless parameter updates or logging without system interruption.
What communication interfaces are available on the R7F100GFG2DFP#HA0, and which support LIN bus protocol?
The R7F100GFG2DFP#HA0 provides up to 6 UART/UARTA channels, all of which support LIN bus protocol per ISO 17987-4. It also includes up to 10 I²C/Simplified I²C channels (with clock stretching), 8 CSI/SPI channels, and a remote control signal receiver (REMC) for NEC/RC5 protocols-making it suitable for automotive body electronics and industrial network gateways.
R7F100GFG2DFP#HA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 44-LQFP
- Series:
- RL78/G23
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- Capacitive Touch, LVD, POR, PWM, WDT
- Number of I/O:
- 37
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b/12b; D/A 2x8b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R7F100GFG2DFP#HA0 FAQ
1.How can I place an order for R7F100GFG2DFP#HA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R7F100GFG2DFP#HA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R7F100GFG2DFP#HA0 reliable?
The price and inventory of R7F100GFG2DFP#HA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R7F100GFG2DFP#HA0 is usually 5 days.
3.What payment methods are accepted for R7F100GFG2DFP#HA0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R7F100GFG2DFP#HA0 transactions.
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R7F100GFG2DFP#HA0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R7F100GFG2DFP#HA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R7F100GFG2DFP#HA0?
For technical support, including R7F100GFG2DFP#HA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R7F100GFG2DFP#HA0 requirements.
6.How does Aetrix verify that R7F100GFG2DFP#HA0 is sourced from the original manufacturer or authorized distributors?
All R7F100GFG2DFP#HA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R7F100GFG2DFP#HA0 meets industry standards.
7.What is the process for return or replacement of R7F100GFG2DFP#HA0?
All R7F100GFG2DFP#HA0 units undergo pre-shipment inspection (PSI). If there is an issue with R7F100GFG2DFP#HA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R7F100GFG2DFP#HA0 part is unused and in its original packaging.
Return procedure for R7F100GFG2DFP#HA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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