Renesas R7F100GLG2DFB#AA0
- Part No.:
- R7F100GLG2DFB#AA0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R7F100GLG2DFB#AA0.pdf
- Description:
- IC MCU 8/16BT 128KB FLSH 64LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:604
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R7F100GLG2DFB#AA0 from Renesas is a 64-pin LFQFP, 512-KB code flash, 48-KB RAM RL78/G23 16-bit MCU with true low-power operation (41 µA/MHz), integrated capacitive touch sensing (CTSU2L), and industrial-grade temperature range (−40 to +105°C). It integrates UARTA, IICA, SAU, RTC, 16-bit TAU, 12-bit ADC, 8-bit DAC, and SNOOZE mode sequencer for battery-powered HMI and sensor control applications.
For engineers reviewing the R7F100GLG2DFB#AA0 datasheet, R7F100GLG2DFB#AA0 pinout, R7F100GLG2DFB#AA0 application, or R7F100GLG2DFB#AA0 equivalent, key selection criteria include its 64-pin LFQFP-0.5 mm pitch package, 512-KB flash/48-KB RAM configuration, −40 to +105°C industrial rating, and support for self-programming with flash shield window and background data flash rewriting.
Technical Context
The R7F100GLG2DFB#AA0 implements the RL78 CPU core with CISC architecture and 3-stage pipeline, supporting instruction execution times from 0.03125 µs (32 MHz) to 30.5 µs (32.768 kHz). Its power management includes HALT, STOP, and SNOOZE modes - the latter enabling ultra-low-power intermittent operation via a dedicated sequencer that executes up to 32 processes without CPU, flash, or RAM activation.
Peripheral integration includes a Logic and Event Link Controller (ELCL) for configurable signal routing between peripherals, a Data Transfer Controller (DTC) with chain transfer capability, and a capacitive sensing unit (CTSU2L) supporting both self-capacitance (up to 32 keys) and mutual capacitance (8×8 matrix, up to 64 keys) under VDD = 1.8–5.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and multiply/divide/accumulate instructions |
| Flash / RAM | 512 KB code flash (2-KB block size, security lockable) + 48 KB on-chip RAM |
| Operating Voltage | 1.6–5.5 V single supply - enables direct interface with 1.8/2.5/3.0-V peripherals |
| Power Consumption | 41 µA/MHz active current; 210 nA data retention current for full 4 KB RAM |
| Temperature Range | −40 to +105°C (industrial grade, marked "3C" in part number) |
| Capacitive Sensing | CTSU2L unit supporting self-capacitance (32-key single-pin) and mutual-capacitance (64-key 8×8 matrix) |
| Timers & RTC | 16-bit Timer Array Unit (TAU) with 8–16 channels; 32-bit interval timer; RTC with alarm, correction, and 1-s to 99-year counting |
| ADC/DAC | 12-bit ADC with 26 analog inputs, internal 1.48-V reference, and temperature sensor; dual 8-bit DACs with 0–VDD output range |
Pinout & Package
Package: 64-pin LFQFP (10 × 10 mm, 0.50-mm pitch), RoHS-compliant, tray-packaged (#AA0).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P121 / X1 / XT1 / EI121 | Primary crystal oscillator input | Supports external 32.768-kHz crystal for RTC or high-accuracy clock source |
| P122 / X2 / XT2 / EXCLK / EXCLKS / EI122 | Crystal oscillator output / external clock input | Completes crystal circuit or accepts external clock up to 20 MHz |
| P137 / EI137 / INTP0 | External interrupt input | Dedicated edge-triggered interrupt pin for fast system wake-up or event capture |
| P30 / VCOUT0 / TSCAP / EI30 / INTP3 / RTC1HZ / SCK11 / SCL11 | Capacitive touch sense channel / RTC output | Single pin serves as CTSU2L sensor electrode and provides 1-Hz RTC tick signal |
| P60 / EO60 / CCD04 / SCLA0 | I²C bus clock line / CTSU2L channel | Shared function enables hardware I²C communication or capacitive sensing with minimal pin count |
| P61 / EO61 / CCD05 / SDAA0 | I²C bus data line / CTSU2L channel | Enables dual-role use: standard I²C slave/master or additional CTSU2L sensing node |
| P10–P17 / P20–P25 / P31 / P40 / P50–P51 / P70–P73 | Multi-function GPIO / peripheral I/O | Configurable digital ports with TTL/CMOS logic, N-ch open-drain option, and on-chip pull-up resistors |
| VDD / VSS / REGC | Power supply / ground / regulator capacitor | REGC requires 0.47–1 µF capacitor to VSS for stable internal voltage regulation |
Key Features
| Feature | Design Value |
|---|---|
| SNOOZE Mode Sequencer (SMS) | Executes up to 32 preconfigured operations (e.g., ADC sampling, CTSU measurement, comparison) autonomously - no CPU, flash, or RAM required |
| Background Data Flash Operation | Permits full program execution from code flash while rewriting 8 KB data flash - enables seamless firmware updates and logging |
| Capacitive Touch Sensing Unit (CTSU2L) | Supports both self- and mutual-capacitance methods on shared pins - eliminates need for external touch controller in HMI designs |
| Event Link Controller (ELCL) | Hardware-configurable logic links between peripherals (e.g., trigger ADC conversion on timer match) - reduces CPU overhead and ISR latency |
| Self-Programming with Flash Shield Window | Enables secure in-field firmware update with programmable memory protection - prevents unauthorized access to critical boot or parameter sectors |
| Low-Power Real-Time Clock (RTC) | Operates in STOP mode with independent 32.768-kHz subsystem clock - maintains timekeeping at sub-µA current draw |
Applications
| Smart Thermostat Interface | Industrial Sensor Node |
|---|---|
Use Scenario: Wall-mounted HVAC controller with touch slider, temperature/humidity sensing, and wireless backhaul. IC Role / Device Role / Timing Role: Main application MCU managing capacitive touch UI, 12-bit ADC acquisition, RTC-based scheduling, and UARTA communication to Wi-Fi module. Use Value: Integrated CTSU2L and 48 KB RAM enable responsive multi-key touch response and local data buffering without external components. | Use Scenario: Battery-powered vibration/temperature monitor deployed in factory machinery with 10-year field life. IC Role / Device Role / Timing Role: Low-power sensor aggregator using STOP mode between 10-second measurements, waking via RTC alarm or external interrupt. Use Value: 210-nA RAM retention and SNOOZE sequencer reduce average current to <1 µA - extends CR2032 battery life beyond 5 years. |
| Programmable Logic Controller (PLC) I/O Module | Home Appliance Control Board |
Use Scenario: DIN-rail mounted I/O expansion module with analog input, digital I/O, and Modbus RTU over RS-485. IC Role / Device Role / Timing Role: Peripheral controller handling isolated analog front-end, 16-bit TAU for PWM motor control, and UARTA with LIN-bus support for protocol translation. Use Value: 512 KB flash accommodates dual-application firmware (Modbus + vendor-specific protocol), while ELCL enables deterministic signal routing between timers and UART. | Use Scenario: Washing machine main control board requiring water-level sensing, motor drive timing, buzzer feedback, and touch panel. IC Role / Device Role / Timing Role: System-on-chip MCU executing real-time motor control (TAU PWM), CTSU2L touch detection, and audio feedback (PCLBUZ0/1). Use Value: Dual 8-bit DACs generate precise buzzer tones; controlled-current drive ports directly drive LEDs without external drivers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R7F100GLL2DFB#AA0 | Same 64-pin LFQFP package and 512-KB flash, but 32-KB RAM (vs. 48 KB); identical peripheral set and temperature grade | Lower RAM capacity limits complex state machines or large buffer requirements (e.g., audio streaming, multi-sensor fusion) | Select when application fits within 32 KB RAM and cost optimization is prioritized over headroom |
| R7F100GLK3CFA#AA0 | 64-pin LQFP (0.65-mm pitch), 384-KB flash, 24-KB RAM, same −40 to +105°C rating; lacks HWQFN-compatible pinout | Larger footprint and lower memory reduce suitability for space-constrained or high-performance logging applications | Choose only if legacy LQFP layout reuse is mandatory and 384 KB flash suffices for firmware scope |
Compared with R7F100GLL2DFB#AA0 and R7F100GLK3CFA#AA0, the R7F100GLG2DFB#AA0 delivers highest on-chip RAM (48 KB) in the 64-pin LFQFP industrial variant - enabling larger real-time buffers, deeper nested interrupts, and more robust firmware-over-the-air staging without external memory.
Availability
R7F100GLG2DFB#AA0 is available at Aetrix Electronics and suitable for industrial automation interfaces, battery-powered sensor nodes, smart appliance control boards, and touch-enabled HMI systems requiring stable component supply across extended product lifecycles.
Supply support for R7F100GLG2DFB#AA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets.
The RL78/G23 product line targets ultra-low-power, cost-sensitive industrial and consumer applications requiring integrated analog peripherals, capacitive touch, and secure firmware update - with design emphasis on minimizing external components and PCB area.
FAQ
What is the maximum operating frequency and corresponding instruction cycle time for the R7F100GLG2DFB#AA0?
The R7F100GLG2DFB#AA0 supports a maximum CPU operating frequency of 32 MHz using the high-speed on-chip oscillator. At this speed, the minimum instruction execution time is 0.03125 µs. The device also supports ultra-low-speed operation at 32.768 kHz (30.5 µs per instruction) using the subsystem clock, enabling precise RTC timing with minimal power consumption.
Does the R7F100GLG2DFB#AA0 support in-system programming and secure firmware updates?
Yes, the R7F100GLG2DFB#AA0 supports full in-system programming via on-chip debugging and self-programming capabilities. It includes a flash shield window feature that allows selective write-protection of memory regions, and supports boot swapping to enable fail-safe firmware updates. These features are fully operational in the R7F100GLG2DFB#AA0's 512-KB code flash with 2-KB erasable blocks.
How many capacitive touch channels does the R7F100GLG2DFB#AA0 support, and what configurations are available?
The R7F100GLG2DFB#AA0 integrates the CTSU2L capacitive sensing unit supporting up to 32 self-capacitance keys (one pin per key) or up to 64 mutual-capacitance keys (8×8 matrix). Pin assignments such as P30 (TSCAP), P60 (CCD04), and P61 (CCD05) are designated for CTSU2L operation and can be configured via register settings - all within the device's specified VDD = 1.8–5.5 V operating range.
What communication interfaces are available on the R7F100GLG2DFB#AA0, and how many instances of each are implemented?
The R7F100GLG2DFB#AA0 provides multiple serial interfaces: up to 6 UARTA channels (including LIN-bus support), up to 10 I²C/Simplified I²C channels, and up to 8 Simplified SPI (CSI) channels. Specific instance counts depend on pin multiplexing - for example, P60/P61 serve as SCLA0/SDAA0 for I²C, while P10–P12 support CSI0/SAU0 functions. All interfaces operate across the full −40 to +105°C temperature range.
Is the R7F100GLG2DFB#AA0 pin-compatible with other RL78/G23 variants in the same 64-pin LFQFP package?
Yes, all RL78/G23 devices in the 64-pin LFQFP (FB) package - including R7F100GLG2DFB#AA0, R7F100GLL2DFB#AA0, and R7F100GLK2DFB#AA0 - share identical pinouts and mechanical dimensions. Function allocation (e.g., ADC channel mapping, timer outputs) is consistent across the family, enabling hardware reuse when migrating between flash/RAM configurations within the same package.
R7F100GLG2DFB#AA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RL78/G23
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 8/16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- Capacitive Touch, LVD, POR, PWM, WDT
- Number of I/O:
- 54
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 12x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R7F100GLG2DFB#AA0 FAQ
1.How can I place an order for R7F100GLG2DFB#AA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R7F100GLG2DFB#AA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R7F100GLG2DFB#AA0 reliable?
The price and inventory of R7F100GLG2DFB#AA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R7F100GLG2DFB#AA0 is usually 5 days.
3.What payment methods are accepted for R7F100GLG2DFB#AA0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R7F100GLG2DFB#AA0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R7F100GLG2DFB#AA0?
R7F100GLG2DFB#AA0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R7F100GLG2DFB#AA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R7F100GLG2DFB#AA0?
For technical support, including R7F100GLG2DFB#AA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R7F100GLG2DFB#AA0 requirements.
6.How does Aetrix verify that R7F100GLG2DFB#AA0 is sourced from the original manufacturer or authorized distributors?
All R7F100GLG2DFB#AA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R7F100GLG2DFB#AA0 meets industry standards.
7.What is the process for return or replacement of R7F100GLG2DFB#AA0?
All R7F100GLG2DFB#AA0 units undergo pre-shipment inspection (PSI). If there is an issue with R7F100GLG2DFB#AA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R7F100GLG2DFB#AA0 part is unused and in its original packaging.
Return procedure for R7F100GLG2DFB#AA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R7F100GLG2DFB#AA0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

