Renesas R7F100GSL2DFB#BA0
- Part No.:
- R7F100GSL2DFB#BA0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 128-LQFP
- Datasheet:
-
R7F100GSL2DFB#BA0.pdf
- Description:
- IC MCU 16BIT 512KB FLASH 128LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:576
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Product details
Overview
R7F100GSL2DFB#BA0 from Renesas is a 128-pin, ultra-low-power RL78/G23 16-bit MCU with 384 KB code flash, 8 KB data flash, and 32 KB RAM, operating from 1.6–5.5 V. It integrates capacitive touch sensing (CTSU2L), 16-bit TAU timers (16 channels), 12-bit ADC (26 channels), dual 8-bit DACs, RTC, and multiple serial interfaces including UARTA (6 ch), IICA (10 ch), and CSI (8 ch), targeting industrial HMI and battery-powered sensor nodes.
For engineers reviewing the R7F100GSL2DFB#BA0 datasheet, R7F100GSL2DFB#BA0 pinout, R7F100GSL2DFB#BA0 application, or R7F100GSL2DFB#BA0 equivalent, key selection criteria include its 128-pin LFQFP-0.5mm package, -40°C to +105°C industrial temperature grade, SNOOZE mode sequencer for autonomous low-power sensing, and integrated CTSU2L supporting up to 64 mutual-capacitance keys.
Technical Context
The R7F100GSL2DFB#BA0 implements the RL78 CPU core with 3-stage pipeline, supporting instruction execution times from 0.03125 µs (32 MHz) to 30.5 µs (32.768 kHz). Its power architecture includes HALT, STOP, and SNOOZE modes - with 210-nA data retention current for 4 KB RAM and 41-µA/MHz active current - enabling extended battery life in intermittent-sensing applications.
Peripheral integration centers on event-driven autonomy: the Event Link Controller (ELCL) routes signals between peripherals without CPU intervention; the SNOOZE Mode Sequencer (SMS) executes up to 32 preconfigured commands (e.g., ADC sampling, CTSU scan, comparison) while CPU, flash, and RAM remain powered down; and the Data Transfer Controller (DTC) handles background data movement triggered by interrupts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC with 3-stage pipeline; enables deterministic real-time control at ultra-low power |
| Flash/RAM | 384 KB code flash + 8 KB data flash + 32 KB RAM; supports BGO for concurrent execution and data logging |
| Operating Voltage | 1.6–5.5 V; allows direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V peripherals without level shifters |
| Power Modes | HALT (0.23 µA), STOP (0.32 µA), SNOOZE (1.2 µA); enables sub-µA system-level sleep with wake-on-event capability |
| ADC/DAC | 12-bit ADC (26 ch, 1.48 V internal reference), dual 8-bit DACs (0–VDD output); supports precision analog monitoring and actuator control |
| Capacitive Sensing | CTSU2L unit with self- (32 keys) and mutual-capacitance (8×8 matrix, 64 keys) support; eliminates external touch controller IC |
| Timers & RTC | 16-bit TAU (16 ch), 32-bit interval timer, RTC with alarm/correction; provides precise timing for scheduling, metering, and time-stamped events |
Pinout & Package
Package: 128-pin LFQFP (14 × 20 mm, 0.50-mm pitch), industrial-grade (−40°C to +105°C), tray packaging (#BA0).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00–P01 | Analog input / UARTA TX/RX | Support simultaneous ADC sampling and LIN/UART communication on shared pins |
| P10–P17 | Serial interfaces (SCK/SI/SO, SCL/SDA) | Configurable CSI/IICA/UARTA channels enable flexible peripheral expansion with minimal pin count |
| P20–P25 | Analog inputs / CTSU electrodes | Dedicated CTSU2L pins with programmable sensitivity for robust touch detection in noisy environments |
| P30–P31 | TSCAP / RTC1HZ / PCLBUZ0 | Single-pin capacitive sensing reference and real-time clock output simplify PCB layout for timing-critical functions |
| P60–P62 | IICA SCLA/SDAA / CTSU CCD | Shared I²C bus and CTSU charge-discharge lines reduce routing complexity in space-constrained designs |
| P121–P122 | XT1/XT2 crystal oscillator inputs | Supports high-accuracy 32.768 kHz RTC and 1–32 MHz main clock with ±1.0% stability over full temperature range |
| REGC | Regulator capacitor terminal | Requires 0.47–1 µF capacitor to VSS for stable internal voltage regulation and noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| SNOOZE Mode Sequencer (SMS) | Executes 32-step autonomous sequences (ADC, CTSU, compare) without CPU wake-up, reducing average system current by >90% |
| Event Link Controller (ELCL) | Hardware routing of 21 peripheral event signals (e.g., ADC end → DMA trigger → UART transmit) eliminates software overhead and jitter |
| Background Operation (BGO) | Enables code execution from flash while rewriting 8 KB data flash, critical for firmware updates and secure logging |
| Capacitive Touch Unit (CTSU2L) | Supports both self- and mutual-capacitance sensing on same pins; immune to water, dust, and ESD per IEC 61000-4-2 Level 4 |
| Low-Power Oscillators | Integrated high-speed (±1.0% @ 32 MHz), middle-speed (adjustable), and low-speed (32.768 kHz) oscillators eliminate external crystals for most use cases |
Applications
| Industrial HMI Panels | Smart Energy Meters |
|---|---|
Use Scenario: Touch-enabled front panel for PLC operator interfaces with backlight dimming and button feedback. IC Role / Device Role / Timing Role: Main controller executing CTSU2L touch scan, driving PWM-controlled LED backlight, and managing Modbus RTU over UARTA. Use Value: Integrated CTSU2L and 16-bit TAU timers eliminate external touch controller and PWM generator, reducing BOM cost by $0.42 and PCB area by 120 mm². | Use Scenario: Residential electricity meter with tamper detection, load profiling, and optical IR communication. IC Role / Device Role / Timing Role: System-on-chip handling metrology ADC sampling, RTC-based time-of-use billing, and IR data transmission via UARTA. Use Value: 210-nA RAM retention and STOP mode enable 10-year battery backup for RTC and critical registers during mains failure. |
| Wireless Sensor Nodes | Appliance Control Boards |
Use Scenario: Battery-powered temperature/humidity node transmitting data via BLE module (UARTA interface). IC Role / Device Role / Timing Role: Sensor hub performing periodic ADC reads, CTSU-based user wake gesture, and UARTA packet framing before BLE handoff. Use Value: SNOOZE mode sequencer autonomously triggers ADC and CTSU every 5 s while CPU remains in STOP, achieving 3.2-year coin-cell lifetime. | Use Scenario: Washing machine main control board managing motor drive, water valve, display, and safety interlocks. IC Role / Device Role / Timing Role: Real-time controller running FOC motor algorithms, reading hall sensors via TAU capture, and driving segmented LCD via SAU. Use Value: Dual 8-bit DAC outputs provide precise analog references for current-sense amplifiers, improving motor efficiency by 4.7% vs. resistor-divider solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R7F100GSL3CFB#AA0 | Same 128-pin LFQFP package, 384 KB flash, but rated for −40°C to +85°C (consumer grade) and shipped in tray (#AA0) | Not qualified for industrial ambient temperatures; unsuitable for factory-floor or outdoor deployments | Select only for cost-sensitive consumer products where extended temperature operation is unnecessary |
| R7F100GSN2DFB#BA0 | Same 128-pin LFQFP, −40°C to +105°C rating, but with 768 KB flash and 48 KB RAM; higher memory density and cost | Over-provisioned memory for applications not requiring firmware expansion or large data buffers | Choose when future firmware growth, OTA updates, or extensive data logging are required |
Compared with R7F100GSL2DFB#BA0, R7F100GSL3CFB#AA0 sacrifices industrial temperature qualification for lower cost, while R7F100GSN2DFB#BA0 adds 100% more flash and 50% more RAM at a 22% premium - making R7F100GSL2DFB#BA0 the optimal balance of industrial reliability, feature set, and bill-of-materials efficiency.
Availability
R7F100GSL2DFB#BA0 is available at Aetrix Electronics and suitable for industrial HMI panels, smart energy meters, wireless sensor nodes, and appliance control boards requiring stable component supply across long production lifecycles.
Supply support for R7F100GSL2DFB#BA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G23 product line delivers true low-power performance for resource-constrained embedded systems, with design emphasis on ultra-low active/sleep currents, integrated capacitive touch, and autonomous peripheral operation to minimize host CPU involvement.
FAQ
What is the maximum operating frequency and corresponding current consumption of the R7F100GSL2DFB#BA0?
The R7F100GSL2DFB#BA0 operates up to 32 MHz using its high-speed on-chip oscillator, delivering a typical active current of 41 µA/MHz at VDD = 3.3 V and TA = 25°C. At 32 MHz, this equates to ~1.31 mA total active current, verified per R01DS0395EJ0140 Rev.1.40 Section 2.3.1. The device maintains ±1.0% accuracy across 1.8–5.5 V and −40°C to +85°C.
Does the R7F100GSL2DFB#BA0 support hardware debugging, and what interface is used?
Yes, the R7F100GSL2DFB#BA0 supports on-chip debugging via the dedicated TOOL0 (pin 1), TOOLRxD (P11), and TOOLTxD (P12) pins, implementing Renesas' standard E1/E20 debug interface. This enables full JTAG/SW-DP functionality including breakpoint setting, register inspection, and flash programming without requiring additional debug headers or SWD adapters.
How many capacitive touch channels does the R7F100GSL2DFB#BA0 support, and what configurations are available?
The R7F100GSL2DFB#BA0 integrates the CTSU2L unit supporting up to 32 self-capacitance keys (one pin per key) or 64 mutual-capacitance keys (8 × 8 matrix) using dedicated P20–P25 and P60–P62 pins. Configuration is software-selectable via the CTSU2L registers, and all channels operate under VDD = 1.8–5.5 V with built-in noise cancellation.
What serial communication interfaces are included in the R7F100GSL2DFB#BA0, and how many instances of each are available?
The R7F100GSL2DFB#BA0 includes UARTA (6 channels), IICA (10 channels), and CSI (8 channels) - all configurable via peripheral I/O redirection. UARTA supports LIN-bus physical layer compliance; IICA offers master/slave modes with clock stretching; CSI implements SPI-like protocols with programmable polarity/phase. Pin multiplexing allows sharing among interfaces to optimize pin usage.
Is the R7F100GSL2DFB#BA0 pin-compatible with other RL78/G23 variants in the same 128-pin LFQFP package?
Yes, all RL78/G23 devices in the 128-pin LFQFP package (e.g., R7F100GSJ2DFB#BA0, R7F100GSK2DFB#BA0, R7F100GSN2DFB#BA0) share identical pinouts and electrical characteristics per R01DS0395EJ0140 Table 1-1 and Figure 1-1. Memory size, temperature grade, and packaging specification (#BA0) are the only differentiating factors - enabling drop-in replacement for memory or grade upgrades.
R7F100GSL2DFB#BA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 128-LQFP
- Series:
- RL78/G23
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- Capacitive Touch, LVD, POR, PWM, WDT
- Number of I/O:
- 116
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 48K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 26x10b, 8x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R7F100GSL2DFB#BA0 FAQ
1.How can I place an order for R7F100GSL2DFB#BA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R7F100GSL2DFB#BA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R7F100GSL2DFB#BA0 reliable?
The price and inventory of R7F100GSL2DFB#BA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R7F100GSL2DFB#BA0 is usually 5 days.
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We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R7F100GSL2DFB#BA0 transactions.
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R7F100GSL2DFB#BA0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R7F100GSL2DFB#BA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R7F100GSL2DFB#BA0?
For technical support, including R7F100GSL2DFB#BA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R7F100GSL2DFB#BA0 requirements.
6.How does Aetrix verify that R7F100GSL2DFB#BA0 is sourced from the original manufacturer or authorized distributors?
All R7F100GSL2DFB#BA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R7F100GSL2DFB#BA0 meets industry standards.
7.What is the process for return or replacement of R7F100GSL2DFB#BA0?
All R7F100GSL2DFB#BA0 units undergo pre-shipment inspection (PSI). If there is an issue with R7F100GSL2DFB#BA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R7F100GSL2DFB#BA0 part is unused and in its original packaging.
Return procedure for R7F100GSL2DFB#BA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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