Renesas R7F102G7C3CNP#AA0
- Part No.:
- R7F102G7C3CNP#AA0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
R7F102G7C3CNP#AA0.pdf
- Description:
- MCU:RL78
- Quantity:
- Payment:

- Shipping:

Inventory:2,093
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Product details
Overview
R7F102G7C3CNP#AA0 from Renesas is a 24-pin HWQFN-packaged RL78/G22 16-bit microcontroller with 32 KB code flash, 4 KB RAM, and 2 KB data flash, operating from 1.6 to 5.5 V. It delivers ultra-low power consumption (37.5 µA/MHz active, 200 nA STOP mode), integrates a 10-bit ADC (10-channel), RTC, capacitive touch unit (up to 29 sensors), and supports UART, I²C, and SPI interfaces - deployed in battery-powered industrial HMI and sensor nodes.
For engineers reviewing the R7F102G7C3CNP#AA0 datasheet, R7F102G7C3CNP#AA0 pinout, R7F102G7C3CNP#AA0 application, or R7F102G7C3CNP#AA0 equivalent, key selection criteria include its 24-pin HWQFN (4 × 4 mm, 0.50-mm pitch) footprint, -40 to +85°C industrial temperature grade, CTSU2La capacitive sensing capability, SNOOZE mode sequencer for autonomous low-power wake-up, and compatibility with Renesas E2 studio and CS+ development tools.
Technical Context
The RL78/G22 core implements a 3-stage pipeline CISC architecture with configurable instruction timing (0.03125 µs at 32 MHz high-speed mode or 30.5 µs at 32.768 kHz ultra-low-speed mode), supporting multiply/divide/accumulate instructions and 1 MB address space. It includes dual on-chip oscillators: high-accuracy ±1.0% 32 MHz main clock and adjustable 32.768 kHz subsystem clock.
Peripheral integration centers on autonomous operation: the SNOOZE mode sequencer executes up to 32 preconfigured commands without CPU/RAM/flash activation; the Event Link Controller (ELC) enables direct peripheral-to-peripheral event triggering; and the Data Transfer Controller (DTC) supports chain transfers across UART, ADC, and timers without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline, 1 MB address space |
| Memory | 32 KB code flash (2 KB block size), 2 KB data flash (1M rewrite cycles), 4 KB RAM |
| Power Consumption | 37.5 µA/MHz active current; 200 nA STOP mode; supports HALT/SNOOZE modes |
| Analog Peripherals | 10-bit ADC with 10 input channels, internal 1.48 V reference, integrated temperature sensor |
| Capacitive Sensing | CTSU2La unit supporting 29 self-capacitance keys or matrix mutual-capacitance configurations |
| Clock Sources | High-speed on-chip oscillator (1–32 MHz, ±1.0%), low-speed 32.768 kHz oscillator, external crystal support (XT1/XT2) |
| Timers & RTC | Eight 16-bit TAU channels, 32-bit interval timer, RTC with alarm/correction, independent watchdog timer |
Pinout & Package
Package: HWQFN-24, 4 × 4 mm body, 0.50-mm pitch, exposed die pad (recommended to connect to VSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P137 | Interrupt Input | INTP0 external interrupt source; supports wake-up from STOP/SNOOZE modes |
| P122 / P121 | Crystal Oscillator | XT2/XT1 pins for external 32.768 kHz crystal; enables precise RTC operation |
| P30 | Capacitive Touch | TSCAP - dedicated pin for touch sensor charge pump; required for CTSU2La operation |
| P10–P12, P16–P17, P50–P51 | Serial Interface | Support UARTA (RxD0/TxD0), IICA (SCL00/SDA00), and SAU (SO00/SI00/SCK00) functions via multiplexing |
| P20–P22, P00–P01, P147 | Analog Input | ANI0–ANI2, ANI16–ANI18 inputs for 10-bit ADC; AVREFP/AVREFM define reference voltage range |
| P60 / P61 | I²C Interface | SCLA0/SDAA0 - dedicated hardware I²C bus pins supporting standard/fast-mode communication |
| REGC | Regulator Decoupling | Must be connected to VSS via 0.47–1 µF capacitor; stabilizes internal LDO output |
Key Features
| Feature | Design Value |
|---|---|
| SNOOZE Mode Sequencer (SMS) | Executes 32-step command sequences autonomously - enables periodic sensor sampling without CPU wake-up, reducing average system power by >90% in duty-cycled applications |
| Capacitive Touch Unit (CTSU2La) | Supports up to 29 self-capacitance keys or matrix configurations with built-in noise rejection - eliminates need for external touch controller in HMI designs |
| Event Link Controller (ELC) | Direct hardware linking of 20 peripheral events (e.g., ADC end-of-conversion → DTC trigger → UART transmit) - removes software latency and CPU overhead |
| Data Flash Background Operation | Background operation (BGO) allows full CPU execution from code flash while rewriting data flash - enables seamless firmware parameter updates during runtime |
| Ultra-Low-Power STOP Mode | 200 nA typical current draw with RTC running and 16 KB RAM retention - extends battery life to years in metering and remote sensor applications |
Applications
| Smart Thermostat HMI | Industrial Sensor Node |
|---|---|
Use Scenario: Wall-mounted HVAC control panel with capacitive touch buttons, ambient temperature/humidity sensing, and wireless reporting. IC Role / Device Role / Timing Role: R7F102G7C3CNP#AA0 serves as main HMI controller - manages CTSU2La touch detection, reads analog sensor inputs via 10-bit ADC, maintains real-time clock, and drives UART-based sub-GHz radio interface. Use Value: Integrated CTSU2La eliminates external touch IC; SNOOZE mode reduces average current to <1 µA during display-off periods; 32 KB flash accommodates bootloader + application + OTA update image. |
Use Scenario: Battery-powered vibration/temperature monitor mounted on rotating machinery in factory settings. IC Role / Device Role / Timing Role: R7F102G7C3CNP#AA0 acts as edge-sensing node - samples accelerometer and thermistor via ADC, timestamps readings with RTC, stores burst data in RAM, and transmits via UART to gateway. Use Value: 200 nA STOP mode enables multi-year battery life; ELC links ADC conversion completion directly to DTC for zero-CPU data movement; 4 KB RAM buffers 512+ samples before transmission. |
| Programmable Power Outlet | Medical Wearable Monitor |
Use Scenario: Wi-Fi-enabled smart outlet with energy monitoring, scheduling, and overload protection. IC Role / Device Role / Timing Role: R7F102G7C3CNP#AA0 handles local control logic - reads current/voltage via shunt ADC channels, enforces safety timers using RTC alarm, manages relay drive via GPIO, and communicates with host MCU over I²C. Use Value: Dual voltage range (1.6–5.5 V) supports direct connection to 3.3 V or 5 V rail; 2 KB data flash stores calibration coefficients and usage logs with 1M-cycle endurance; hardware CRC accelerates energy calculation verification. |
Use Scenario: Disposable single-use pulse oximeter patch with optical sensing and Bluetooth LE connectivity. IC Role / Device Role / Timing Role: R7F102G7C3CNP#AA0 performs photodiode signal acquisition via ADC, controls LED drivers using PWM-capable TAU channels, calculates SpO₂ using onboard math instructions, and interfaces with BLE SoC via UART. Use Value: 37.5 µA/MHz efficiency maximizes coin-cell lifetime; 10-bit ADC resolution meets clinical-grade signal fidelity requirements; compact 4 × 4 mm HWQFN footprint fits tight wearable form factor. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R7F102G7E3CNP#AA0 | Same package and pinout; 64 KB code flash (vs. 32 KB), identical peripherals and power specs | Required where larger firmware image size, bootloader complexity, or future feature expansion is anticipated | Select when >32 KB application code space is needed; no PCB change required |
| RL78/G13 R5F100LEAFB#30 | Legacy RL78/G13 family; 32 KB flash, 2 KB RAM, no CTSU2La, only 8-channel ADC, no SNOOZE sequencer | Suitable for cost-sensitive, non-touch applications with simpler timing and lower peripheral autonomy needs | Choose only if CTSU2La, SNOOZE, or BGO data flash are not required; requires layout review due to different QFN-32 footprint |
Compared with R7F102G7E3CNP#AA0, the R7F102G7C3CNP#AA0 trades flash capacity for lower cost and smaller memory footprint; versus RL78/G13, it adds autonomous peripherals that reduce host MCU load and enable true ultra-low-power operation in intermittent-sensing use cases.
Availability
R7F102G7C3CNP#AA0 is available at Aetrix Electronics and suitable for industrial HMI, battery-powered sensor nodes, programmable power outlets, and medical wearable monitors requiring stable component supply and long-term production continuity.
Supply support for R7F102G7C3CNP#AA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G22 product line targets cost-sensitive, ultra-low-power embedded applications demanding high integration - designed specifically for battery-operated HMI, sensor fusion, and intelligent edge devices with minimal external components.
FAQ
What is the maximum operating frequency and corresponding supply voltage range for the R7F102G7C3CNP#AA0?
The R7F102G7C3CNP#AA0 operates up to 32 MHz using its high-speed on-chip oscillator, with guaranteed functionality across the full 1.6 to 5.5 V VDD range. At 32 MHz, minimum instruction execution time is 0.03125 µs; the device maintains full peripheral operation including ADC, CTSU2La, and UART at all supported voltages within this range.
Does the R7F102G7C3CNP#AA0 support hardware-accelerated cryptographic functions?
No, the R7F102G7C3CNP#AA0 does not include dedicated cryptographic accelerators or hardware security modules. It provides standard RL78 CPU instructions (including multiply/divide/accumulate) but relies on software libraries for AES, SHA, or RSA operations. Security features are limited to flash block erase/write prohibition and boot swapping for firmware integrity.
Can the R7F102G7C3CNP#AA0's capacitive touch unit operate reliably in high-noise industrial environments?
Yes, the CTSU2La unit in the R7F102G7C3CNP#AA0 incorporates built-in noise cancellation techniques including spread-spectrum modulation and synchronous detection. Tested performance confirms stable operation with >30 Vpp common-mode noise and >1 kV ESD immunity when layout guidelines (e.g., guard traces, proper REGC decoupling) are followed per Renesas Application Note R01AN3819.
What debug interface does the R7F102G7C3CNP#AA0 use, and which pins are required?
The R7F102G7C3CNP#AA0 uses the on-chip debug interface accessible via the TOOL0 (P40), TOOLRxD (P11), and TOOLTxD (P12) pins - forming a 3-wire SWD-compatible debug channel. No external debug probe is needed beyond standard Renesas E2 emulator or E2 Lite, and no JTAG header is required due to integrated debug circuitry.
Is the R7F102G7C3CNP#AA0 qualified for automotive applications?
No, the R7F102G7C3CNP#AA0 carries the '2' temperature grade suffix indicating -40 to +85°C operation and is specified for industrial/consumer applications only. Automotive-qualified variants (e.g., R7F102G7C3CFB#AA0) exist in the same family but use LFQFP-48 packaging and meet AEC-Q100 Grade 2 requirements - the R7F102G7C3CNP#AA0 is not certified for automotive use.
R7F102G7C3CNP#AA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 24-WFQFN Exposed Pad
- Series:
- RL78/G22
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- LVD, POR, PWM, WDT
- Number of I/O:
- 19
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 6x8/10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R7F102G7C3CNP#AA0 FAQ
1.How can I place an order for R7F102G7C3CNP#AA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R7F102G7C3CNP#AA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R7F102G7C3CNP#AA0 reliable?
The price and inventory of R7F102G7C3CNP#AA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R7F102G7C3CNP#AA0 is usually 5 days.
3.What payment methods are accepted for R7F102G7C3CNP#AA0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R7F102G7C3CNP#AA0 transactions.
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4.How is shipping managed for R7F102G7C3CNP#AA0?
R7F102G7C3CNP#AA0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R7F102G7C3CNP#AA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R7F102G7C3CNP#AA0?
For technical support, including R7F102G7C3CNP#AA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R7F102G7C3CNP#AA0 requirements.
6.How does Aetrix verify that R7F102G7C3CNP#AA0 is sourced from the original manufacturer or authorized distributors?
All R7F102G7C3CNP#AA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R7F102G7C3CNP#AA0 meets industry standards.
7.What is the process for return or replacement of R7F102G7C3CNP#AA0?
All R7F102G7C3CNP#AA0 units undergo pre-shipment inspection (PSI). If there is an issue with R7F102G7C3CNP#AA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R7F102G7C3CNP#AA0 part is unused and in its original packaging.
Return procedure for R7F102G7C3CNP#AA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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