Renesas R9A02G0214CNH#UA0
- Part No.:
- R9A02G0214CNH#UA0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
R9A02G0214CNH#UA0.pdf
- Description:
- 32-BIT MCU GP 48 MHZ RISC-V 128K
- Quantity:
- Payment:

- Shipping:

Inventory:470
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R9A02G0214CNH#UA0 from Renesas is a 32-bit RISC-V microcontroller featuring a 48 MHz ultra-low-power core, 128 KB code flash, 16 KB SRAM (12 KB parity + 4 KB ECC), 12-bit ADC with 8 input channels, dual 8-bit DACs, and integrated safety features including SRAM ECC, CAC, CRC, DOC, TRNG, and IWDT. It targets industrial sensor nodes and battery-powered control systems requiring functional safety compliance.
For engineers reviewing the R9A02G0214CNH#UA0 datasheet, R9A02G0214CNH#UA0 pinout, R9A02G0214CNH#UA0 application, or R9A02G0214CNH#UA0 equivalent, key selection criteria include its 32-pin HWQFN package, -40°C to +125°C operating range, 1.6–5.5 V supply, dual I²C interfaces, SAU-based UART/SPI/I²C flexibility, and hardware safety accelerators for ASIL-B–capable designs.
Technical Context
This MCU implements the RISC-V RV32I base ISA with M, A, C, Zifencei, Ziscr, and B extensions-including bit manipulation (Zba/Zbb/Zbs)-and supports machine-mode privilege only. Its debug interface uses cJTAG with four hardware breakpoints and trace capability via external debug support.
The system architecture integrates an Event Link Controller (ELC) for CPU-free peripheral triggering, a Data Transfer Controller (DTC) for autonomous memory transfers, and a Clock Frequency Accuracy Measurement Circuit (CAC) that validates clock sources against reference oscillators-critical for fail-safe timing in safety-critical applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Renesas RISC-V RV32I with M/A/C/Zifencei/Ziscr/B extensions; machine-mode only; no user/supervisor mode. |
| Max Operating Frequency | 48 MHz - enables real-time deterministic response for motor control and closed-loop sensing. |
| Memory | 128 KB code flash, 4 KB data flash, 16 KB SRAM (12 KB parity + 4 KB ECC) - supports firmware updates and safe data logging. |
| Analog Peripherals | 12-bit ADC (8 channels), dual 8-bit DACs, 2 comparators, temperature sensor - enables local signal conditioning without external components. |
| Safety Features | SRAM ECC, flash area protection, CAC, CRC calculator, DOC, TRNG, IWDT, register write protection - meets requirements for IEC 61508 SIL-2 and ISO 26262 ASIL-B. |
| I/O & Connectivity | 26 general-purpose I/O pins; SAU × 2 (supports 3 UART/3 SPI/3 I²C); IICA × 1; REMC; RTC with 1 Hz output - suitable for compact industrial HMI and sensor fusion nodes. |
| Power & Environment | 1.6–5.5 V supply; -40°C to +125°C operation; low-power modes with ELC/DTC wake-up - optimized for wide-input battery and rail-powered edge devices. |
Pinout & Package
Package: 32-pin HWQFN (5 mm × 5 mm, 0.5 mm pitch), moisture sensitivity level (MSL) 3, RoHS-compliant, Sn (tin) terminal finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual power domains: VCC powers digital logic; VSS is common ground; requires 0.1 µF decoupling per supply pin. |
| EXTAL / XT1 / XT2 | External clock input / Sub-clock oscillator | Supports crystal (1–20 MHz) or external clock on EXTAL; sub-clock (32.768 kHz) on XT1/XT2 for RTC accuracy. |
| RES / MD / NMI | Reset / Mode select / Non-maskable interrupt | RES is active-low reset; MD sets boot mode; NMI provides hard-fault escalation path independent of ICU. |
| P000–P001 / P100–P111 / P200–P207 / P300–P307 / P400–P403 | General-purpose I/O | 26 configurable GPIOs with open-drain, pull-up, and 5V-tolerant options (P010/P011/P101–P103) - enable mixed-voltage interfacing. |
| ANI0–ANI5 / ANI16–ANI19 / DACOUT0–DACOUT1 / VCOUT0–VCOUT1 | Analog I/O | 8-channel ADC inputs (including internal TSN and reference); dual DAC outputs usable as comparator references or analog actuator drives. |
| TxD0–TxD2 / RxD0–RxD2 / SCK00–SCK21 / SDA00–SDA21 / SCLA0 / SDAA0 | SAU & IICA interfaces | SAU channels support UART/SPI/I²C on shared pins; IICA0 provides full I²C bus master/slave with wakeup capability. |
| RTC1HZ / TI00–TI07 / TO00–TO07 / CLKA0–CLKA1 | Timer & clock outputs | RTC provides 1 Hz output; TAU timers support capture/compare; UARTA clocks enable synchronous serial communication. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Safety Accelerators | CAC validates clock accuracy in real time; CRC/DOC detect memory and data-path corruption; TRNG seeds secure key generation. |
| Autonomous Peripheral Operation | ELC links peripherals (e.g., ADC → DTC → SRAM) without CPU intervention; reduces latency and power in sensor polling loops. |
| Flexible Analog Integration | Dual 8-bit DACs serve as programmable voltage references for comparators or analog output stages-eliminating external DACs in feedback control. |
| RISC-V ISA Compliance | Full RV32IMACB support with atomic instructions, bit manipulation, and compressed code - improves code density and deterministic execution. |
| Industrial Temperature Range | -40°C to +125°C operation with guaranteed parametric performance - validated for under-hood automotive and factory-floor deployment. |
Applications
| Industrial Sensor Node | Smart Actuator Control |
|---|---|
Use Scenario: Compact, battery-operated environmental monitor measuring temperature, humidity, and gas concentration in remote locations. IC Role / Device Role / Timing Role: Central controller executing sensor fusion, local decision-making, and low-duty-cycle wireless transmission using SAU UART and RTC alarm wake-up. Use Value: Ultra-low-power RISC-V core + ELC-triggered ADC sampling + 128 KB flash for OTA firmware updates extends battery life beyond 5 years. | Use Scenario: Closed-loop valve or motor driver in HVAC or process automation requiring precise analog feedback and safety monitoring. IC Role / Device Role / Timing Role: Real-time motion controller with ADC-driven current sensing, DAC-based reference generation, and IWDT-enforced fault recovery. Use Value: Integrated SRAM ECC, CAC, and register write protection ensure deterministic behavior during voltage transients and EMI events. |
| Functional Safety PLC Module | Edge Gateway Interface |
Use Scenario: DIN-rail-mounted safety I/O module validating field device status and enforcing emergency stop logic per IEC 61508. IC Role / Device Role / Timing Role: Safety-certified subsystem managing discrete inputs, analog diagnostics, and watchdog supervision with dual-clock domain validation. Use Value: Hardware CRC, DOC, and independent IWDT provide layered fault detection-reducing software certification burden for SIL-2 compliance. | Use Scenario: Protocol translator bridging legacy RS-485 fieldbus to Ethernet/Wi-Fi, aggregating data from multiple sensors before cloud upload. IC Role / Device Role / Timing Role: Protocol stack host with SAU-based UART/RS-485 transceivers, IICA for EEPROM configuration, and RTC timestamping. Use Value: 26 GPIOs support opto-isolated level shifting; 1.6–5.5 V operation accommodates wide-input industrial power supplies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RISC-V microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R9A02G0214CNE#UA0 | 48-pin HWQFN; 42 GPIOs; 10 ADC channels; SAU × 2 with full 6 SPI/3 UART/6 I²C; sub-clock oscillator enabled. | Higher I/O count and analog channel count support complex multi-sensor hubs or motor drive boards. | Select when needing >26 GPIOs, full sub-clock RTC accuracy, or additional SAU channels for protocol stacking. |
| R9A02G0214CNK#UA0 | 24-pin HWQFN; 18 GPIOs; 6 ADC channels; SAU × 2 with reduced 3 SPI/3 UART/3 I²C; no sub-clock oscillator. | Space-constrained cost-sensitive endpoints like smart switches or simple thermostats. | Select for minimal footprint and BOM cost where RTC accuracy and analog channel count are relaxed. |
Compared with R9A02G0214CNE#UA0 and R9A02G0214CNK#UA0, the R9A02G0214CNH#UA0 delivers optimal balance: sufficient I/O (26 pins) and analog resources (8 ADC, 2 DAC) for mid-tier industrial nodes, while retaining sub-clock support and full safety feature set-without over-provisioning package size or cost.
Availability
R9A02G0214CNH#UA0 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart actuator control, functional safety PLC modules, and edge gateway interfaces requiring stable component supply across extended temperature and long product lifecycles.
Supply support for R9A02G0214CNH#UA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets, with deep expertise in microcontrollers, analog, power, and connectivity technologies.
The R9A02G021 series is part of Renesas' RISC-V-based RA2E2 group-designed specifically for ultra-low-power, safety-aware industrial and consumer edge applications demanding high integration, robustness, and long-term supply assurance.
FAQ
What is the maximum operating frequency and core architecture of the R9A02G0214CNH#UA0?
The R9A02G0214CNH#UA0 features a Renesas-optimized RISC-V 32-bit core compliant with RV32IMACB instruction set, supporting integer, multiplication/division, atomic, compressed, and bit-manipulation extensions. Its maximum operating frequency is 48 MHz, validated across the full -40°C to +125°C temperature range and 1.6–5.5 V supply voltage.
Does the R9A02G0214CNH#UA0 support hardware functional safety features required for IEC 61508 or ISO 26262 compliance?
Yes, the R9A02G0214CNH#UA0 includes multiple hardware safety mechanisms: SRAM ECC error detection and correction, flash area protection, Clock Frequency Accuracy Measurement Circuit (CAC), Cyclic Redundancy Check (CRC) calculator, Data Operation Circuit (DOC), True Random Number Generator (TRNG), Independent Watchdog Timer (IWDT), and register write protection-all documented in the R01DS0422EJ0110 datasheet as part of its safety concept.
How many analog-to-digital converter (ADC) channels and digital-to-analog converter (DAC) outputs does the R9A02G0214CNH#UA0 provide?
The R9A02G0214CNH#UA0 integrates a 12-bit successive approximation ADC with 8 selectable input channels (ANI0–ANI5 and ANI16–ANI19), plus an on-chip temperature sensor. It also includes two independent 8-bit DAC outputs (DACOUT0 and DACOUT1), each usable as analog actuator drivers or programmable reference voltages for the dual comparators.
What communication interfaces are available on the R9A02G0214CNH#UA0, and how are they implemented?
The R9A02G0214CNH#UA0 provides Serial Array Units (SAU × 2) supporting up to 3 UART, 3 SPI, and 3 I²C channels on shared pins; one I²C Bus Interface (IICA0); and Remote Control Signal Receiver (REMC). No UARTA or second IICA is present-unlike the 48-pin variant-making SAU the primary serial engine for flexible, pin-multiplexed protocol implementation.
What is the package type, pin count, and operating temperature range of the R9A02G0214CNH#UA0?
The R9A02G0214CNH#UA0 is housed in a 32-pin HWQFN package (5 mm × 5 mm, 0.5 mm pitch) with Sn (tin) terminal finish. It operates across the industrial temperature range of -40°C to +125°C and supports supply voltages from 1.6 V to 5.5 V-enabling deployment in harsh environments such as factory automation, building controls, and transportation systems.
R9A02G0214CNH#UA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 32-WFQFN Exposed Pad
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RISC-V
- Core Size:
- 32-Bit
- Speed:
- 48MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 26
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 8x12b SAR; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R9A02G0214CNH#UA0 FAQ
1.How can I place an order for R9A02G0214CNH#UA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R9A02G0214CNH#UA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R9A02G0214CNH#UA0 reliable?
The price and inventory of R9A02G0214CNH#UA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R9A02G0214CNH#UA0 is usually 5 days.
3.What payment methods are accepted for R9A02G0214CNH#UA0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R9A02G0214CNH#UA0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R9A02G0214CNH#UA0?
R9A02G0214CNH#UA0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R9A02G0214CNH#UA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R9A02G0214CNH#UA0?
For technical support, including R9A02G0214CNH#UA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R9A02G0214CNH#UA0 requirements.
6.How does Aetrix verify that R9A02G0214CNH#UA0 is sourced from the original manufacturer or authorized distributors?
All R9A02G0214CNH#UA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R9A02G0214CNH#UA0 meets industry standards.
7.What is the process for return or replacement of R9A02G0214CNH#UA0?
All R9A02G0214CNH#UA0 units undergo pre-shipment inspection (PSI). If there is an issue with R9A02G0214CNH#UA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R9A02G0214CNH#UA0 part is unused and in its original packaging.
Return procedure for R9A02G0214CNH#UA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R9A02G0214CNH#UA0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

