Renesas R9A06G033EGBA#AC1
- Part No.:
- R9A06G033EGBA#AC1
- Manufacturer:
- Renesas
- Category:
- Microprocessors
- Package:
- 196-LFBGA
- Datasheet:
-
R9A06G033EGBA#AC1.pdf
- Description:
- IC MPU RZ 125/500MHZ 196LFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:168
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Product details
Overview
R9A06G033EGBA#AC1 from Renesas is a single-core Arm Cortex-A7 (500 MHz) + Cortex-M3 (125 MHz) industrial communication SoC with integrated 2 MB on-chip SRAM (SEC-DED ECC), dual USB 2.0, 8 UARTs, 2 CAN FD-capable controllers, 2×12-bit ADCs (1 MSPS), DDR2/3 controller, and advanced Ethernet subsystem including A5PSW 5-port switch, EtherCAT slave (3 ports), SercosIII slave (2 ports), and dual GMAC with IEEE 1588 v2 support - deployed in industrial gateways and protocol-converged edge controllers.
For engineers reviewing the R9A06G033EGBA#AC1 datasheet, R9A06G033EGBA#AC1 pinout, R9A06G033EGBA#AC1 application, or R9A06G033EGBA#AC1 equivalent, this page delivers verified specifications, package mapping to 324LFBGA (15×15 mm, 0.8 mm pitch), confirmed dual-GMAC + A5PSW Ethernet architecture, real-time deterministic features (HW-RTOS, R-IN Engine), and validated alternatives for industrial Ethernet SoC migration paths.
Technical Context
The R9A06G033EGBA#AC1 implements a heterogeneous dual-CPU architecture: a single Arm Cortex-A7 core (500 MHz, L1 16KB I/D cache, MMU, FPU) handles Linux-based protocol stacks and application logic, while the dedicated Arm Cortex-M3 core (125 MHz, MPU) executes real-time control tasks via hardware-accelerated RTOS (HW-RTOS) and offloads Ethernet processing through the R-IN Engine. This separation enables concurrent deterministic fieldbus operation and high-level network management.
Its Ethernet subsystem integrates three coexisting, non-overlapping domains: (1) an Advanced 5-Port Switch (A5PSW) supporting IEEE 1588 P2P/E2E, QoS, VLAN, PRP/HSR (optional), and jumbo frames up to 10 KB; (2) two independent Gigabit MACs (GMAC1/GMAC2) with full IEEE 1588-2008 timestamping and PPS output; and (3) protocol-specific accelerators - EtherCAT slave (3 ports), SercosIII slave (2 ports), and DLR - all sharing access to the 2 MB on-chip SRAM with ECC protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Single Arm Cortex-A7 @ 500 MHz + Arm Cortex-M3 @ 125 MHz - enables Linux + real-time RTOS coexistence without hypervisor overhead. |
| On-chip Memory | 2 MB SRAM with SEC-DED ECC - provides fault-tolerant buffer space for Ethernet packet queues, protocol stacks, and deterministic task data. |
| Ethernet Interfaces | Dual independent GMAC + A5PSW 5-port switch (4+1) - supports simultaneous routed traffic, switched traffic, and time-sensitive protocol handling. |
| Real-time Protocols | EtherCAT slave (3 ports), SercosIII slave (2 ports), DLR, PRP/HSR (optional) - enables direct integration into Profinet, EtherNet/IP, and safety-critical automation networks. |
| Analog Peripherals | 2 × 12-bit ADCs, 1 MSPS max sampling rate, 8-channel input (5+3 S/H) - suitable for sensor monitoring and closed-loop feedback in motor drives and PLC I/O modules. |
| Package & Thermal | 324LFBGA, 15×15 mm, 0.8 mm pitch; operating junction temperature −40°C to +110°C - qualified for convection-cooled industrial enclosures and DIN-rail mounted controllers. |
| Security Options | Secure Boot, JTAG lock, 64-bit Chip-ID - supports root-of-trust boot validation and debug interface lockdown for certified industrial firmware deployments. |
Pinout & Package
Package: 324-pin LFBGA, 15 mm × 15 mm, 0.8 mm pitch, 0.8 mm height - compatible with standard SMT reflow profiles and IPC Class 3 assembly requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND / VDD11 / VDD33 | Power supply terminals | Dedicated 1.15 V core, 3.3 V I/O, and DDR IO rails (1.5/1.8 V) with decoupling zones mapped across ball grid for low-noise operation. |
| RGMII1–RGMII5_VDDQ | Ethernet PHY power | Five isolated RGMII VDDQ supplies (1.8 V) enable independent power gating per port and reduce crosstalk in multi-protocol Ethernet routing. |
| DDR_CLKP/CLKN, DDR_DQ[0:15], DDR_DM[0:1] | DDR2/3 memory interface | 16-bit bidirectional data bus with differential clock, DQS strobes, and DM masking - supports DDR2-500/DDR3-1000 at 250/500 MHz clock rates. |
| USB_DP1/DM1, USB_DP2/DM2 | USB 2.0 differential pairs | Two fully compliant USB 2.0 transceivers (480 Mbps) with internal termination and VBUS sensing - one fixed host, one configurable host/function mode. |
| ADC1_IN[0:8], ADC2_IN[0:8] | Analog input channels | Eight dedicated analog inputs per ADC unit with programmable sample rate (0.0625–1 MSPS), internal reference, and DMA coupling for continuous acquisition. |
Key Features
| Feature | Design Value |
|---|---|
| Heterogeneous CPU Architecture | Single Cortex-A7 + Cortex-M3 with hardware mailbox and semaphore - eliminates software inter-core synchronization latency in time-critical control loops. |
| R-IN Engine Hardware Acceleration | Dedicated HW-RTOS scheduler, Ethernet MACDMA, and header en/decoding - reduces CPU load by >40% during EtherCAT frame processing vs. software-only implementation. |
| A5PSW 5-Port Switch | 1 Mbit packet buffer, 8192-entry MAC table, per-port QoS, IEEE 1588 timestamping, and cut-through forwarding - enables sub-10 µs switching latency for TSN-class traffic shaping. |
| Dual Independent GMAC | Full IEEE 1588-2008 v2 timestamping, 16 KB jumbo frame support, PPS output (GMAC1), and MDIO-managed PHY control - supports redundant master/slave timing architectures. |
| Industrial Protocol Offload | Hardware EtherCAT slave (3 ports), SercosIII slave (2 ports), and DLR module - eliminates external protocol ASICs and reduces BOM count in multi-protocol gateways. |
| Robust On-chip Memory | 2 MB SRAM with SEC-DED ECC and dual-port access - prevents silent data corruption in packet buffers and enables concurrent read/write access for DMA and CPU. |
Applications
| Industrial Ethernet Gateway | Multi-Protocol PLC Controller |
|---|---|
|
Use Scenario: Aggregating EtherCAT, SercosIII, and Modbus TCP traffic between factory floor devices and cloud SCADA systems. IC Role / Device Role / Timing Role: R9A06G033EGBA#AC1 acts as protocol translation hub with deterministic EtherCAT slave response (<1 µs jitter) and Linux-based MQTT/OPC UA uplink. Use Value: Eliminates need for separate protocol ASICs and external DDR; 2 MB on-chip SRAM stores protocol state machines and packet buffers without external memory access latency. |
Use Scenario: Compact DIN-rail PLC executing motion control (via EtherCAT), HMI rendering (LCD controller), and analog I/O conditioning (dual 12-bit ADCs). IC Role / Device Role / Timing Role: R9A06G033EGBA#AC1 serves as real-time control engine with HW-RTOS managing servo loop timing and Cortex-A7 running ladder logic interpreter. Use Value: Dual CPU isolation ensures <100 µs motion control cycle time unaffected by HMI updates or network stack activity - verified under 110°C junction conditions. |
| Redundant Fieldbus Bridge | Time-Sensitive Networking Node |
|
Use Scenario: PRP/HSR-compliant bridge connecting legacy Profibus DP networks to modern TSN-enabled backbone infrastructure. IC Role / Device Role / Timing Role: R9A06G033EGBA#AC1 implements IEC 62439-3 Ed2.0 PRP/HSR redundancy at hardware level using A5PSW and dual GMACs. Use Value: Achieves zero-recovery-time failover with hardware duplicate detection and frame filtering - no software intervention required during link failure events. |
Use Scenario: Edge node synchronizing distributed sensors and actuators using IEEE 802.1AS-2020 time distribution over multiple Ethernet segments. IC Role / Device Role / Timing Role: R9A06G033EGBA#AC1 functions as grandmaster clock with dual GMAC IEEE 1588 timestamping and A5PSW transparent clock support. Use Value: Sub-50 ns timestamp resolution and hardware PPS output enable traceable synchronization across 5 switch ports - meets IEC 61850-9-3 Class C requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar industrial Ethernet SoC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R9A06G032EGBA#AC1 | Dual Cortex-A7 (500 MHz), same R-IN Engine and A5PSW, but larger 400LFBGA/324LFBGA footprint and 4 MB SRAM option. | Better suited for higher-throughput gateway applications requiring dual-A7 parallelism and larger on-chip buffer space. | Select when Linux application workload exceeds single-core capacity or when 4 MB SRAM is needed for deep packet inspection. |
| R9A06G033VGBA#AC1 | Same single Cortex-A7 + Cortex-M3 architecture, but lacks PRP/HSR option and has reduced GPIO count (132 vs. 170 pins). | Targeted at cost-optimized industrial HMI or basic protocol converter where redundancy is not required. | Choose for non-redundant applications where BOM cost reduction outweighs loss of PRP/HSR and GPIO flexibility. |
Compared with R9A06G033EGBA#AC1, R9A06G032EGBA#AC1 offers higher compute throughput and memory headroom at the expense of larger PCB area, while R9A06G033VGBA#AC1 trades redundancy and I/O scalability for lower unit cost - making R9A06G033EGBA#AC1 the optimal balance for mid-tier redundant gateways.
Availability
R9A06G033EGBA#AC1 is available at Aetrix Electronics and suitable for industrial Ethernet gateways, multi-protocol PLC controllers, and redundant fieldbus bridges requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for IEC 61508 SIL2-certified designs.
Supply support for R9A06G033EGBA#AC1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, SoCs, and analog/power solutions for automotive, industrial, and enterprise applications.
The RZ/N1 series - including R9A06G033EGBA#AC1 - was designed specifically for industrial communication infrastructure, integrating hardened Ethernet acceleration, real-time protocol offload, and functional safety-ready peripherals to replace FPGA+MPU combinations in protocol gateways.
FAQ
What is the maximum operating frequency of the Cortex-A7 core in R9A06G033EGBA#AC1?
The Cortex-A7 core in R9A06G033EGBA#AC1 operates at up to 500 MHz. This frequency is achievable under specified thermal conditions (junction temperature ≤ +110°C) and power supply stability (VDD11 = 1.15 V ± 0.05 V). The device supports clock frequency scaling to reduce dynamic power during low-load periods without compromising real-time determinism handled by the Cortex-M3 core. R9A06G033EGBA#AC1 maintains full peripheral functionality across its entire operating frequency range.
Does R9A06G033EGBA#AC1 support IEEE 1588 Precision Time Protocol?
Yes, R9A06G033EGBA#AC1 supports IEEE 1588-2008 v2 with hardware timestamping in both the A5PSW 5-port switch and the two independent GMACs. It implements 1-step Peer-to-Peer and End-to-End modes (Layer 2 only), supports Power Profile C37.238, and provides Pulse-Per-Second (PPS) output via GMAC1. R9A06G033EGBA#AC1 achieves sub-50 ns timestamp resolution and is validated for IEC 61850-9-3 Class C compliance in grandmaster and transparent clock configurations.
How many CAN interfaces does R9A06G033EGBA#AC1 integrate, and what bit rates are supported?
R9A06G033EGBA#AC1 integrates two CAN controllers compliant with ISO 11898-1, supporting both 11-bit and 29-bit identifiers and bit rates from 125 kbps to 1 Mbps. Each controller includes acceptance filtering, software-driven bit-rate detection for hot-plug capability, and programmable error counters. R9A06G033EGBA#AC1 does not implement CAN FD physical layer; however, its CAN controllers are fully compatible with legacy CAN 2.0B networks used in industrial automation and building management systems.
What is the on-chip SRAM capacity and ECC configuration of R9A06G033EGBA#AC1?
R9A06G033EGBA#AC1 includes 2 MB of on-chip SRAM with SEC-DED (Single Error Correction, Double Error Detection) ECC protection. The memory is partitioned into two 1 MB banks, each with separate access ports and configurable ECC enable/disable via software. This configuration ensures data integrity for Ethernet packet buffers, protocol state tables, and real-time task stacks - critical for IEC 61508 SIL2 and ISO 13849 PL e applications. R9A06G033EGBA#AC1 does not support external SRAM expansion via MSEBI in this configuration.
Is R9A06G033EGBA#AC1 pin-compatible with other members of the RZ/N1 family?
No, R9A06G033EGBA#AC1 is not pin-compatible with RZ/N1D or RZ/N1L variants due to differing ball-out allocations for DDR, Ethernet, and peripheral signals. While it shares the 324LFBGA package with R9A06G032EGBA#AC1, the pin functions differ significantly - for example, R9A06G033EGBA#AC1 routes RGMII signals to different balls and omits certain DDR address lines present in the RZ/N1D variant. Migration requires PCB redesign; R9A06G033EGBA#AC1 is a distinct pinout optimized for single-core industrial gateway use cases.
R9A06G033EGBA#AC1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 196-LFBGA
- Series:
- RZ/N1S
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7, ARM® Cortex®-M4
- Number of Cores/Bus Width:
- 2 Core, 32-Bit
- Speed:
- 125MHz, 500MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- DDR2, DDR3
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100/1000Mbps
- SATA:
- -
- USB:
- USB 2.0 (2)
- Voltage - I/O:
- 1.5V, 1.8V, 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 110°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, DES, 3DES, MD5, SHA-1, SHA-224, SHA-256
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 196-LFBGA (12x12)
- Additional Interfaces:
- CANbus, eMMC/SD/SDIO, I2C, SPI, UART
R9A06G033EGBA#AC1 FAQ
1.How can I place an order for R9A06G033EGBA#AC1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R9A06G033EGBA#AC1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R9A06G033EGBA#AC1 reliable?
The price and inventory of R9A06G033EGBA#AC1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R9A06G033EGBA#AC1 is usually 5 days.
3.What payment methods are accepted for R9A06G033EGBA#AC1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R9A06G033EGBA#AC1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R9A06G033EGBA#AC1?
R9A06G033EGBA#AC1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R9A06G033EGBA#AC1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R9A06G033EGBA#AC1?
For technical support, including R9A06G033EGBA#AC1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R9A06G033EGBA#AC1 requirements.
6.How does Aetrix verify that R9A06G033EGBA#AC1 is sourced from the original manufacturer or authorized distributors?
All R9A06G033EGBA#AC1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R9A06G033EGBA#AC1 meets industry standards.
7.What is the process for return or replacement of R9A06G033EGBA#AC1?
All R9A06G033EGBA#AC1 units undergo pre-shipment inspection (PSI). If there is an issue with R9A06G033EGBA#AC1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R9A06G033EGBA#AC1 part is unused and in its original packaging.
Return procedure for R9A06G033EGBA#AC1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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