Renesas RAA230215GSB#HA0
- Part No.:
- RAA230215GSB#HA0
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
RAA230215GSB#HA0.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,833
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Product details
Overview
RAA230215GSB#HA0 from Renesas is a monolithic 5.5V-input, 3A synchronous step-down DC/DC converter with integrated 500mA LDO, supporting adjustable output voltages per channel via external resistors, fixed 1 MHz switching frequency, and ultra-low-power mode (25 µA typical). It delivers regulated power to FPGA I/O banks, MCU core/logic rails, and ASIC auxiliary supplies in space-constrained industrial control modules.
For engineers reviewing the RAA230215GSB#HA0 datasheet, RAA230215GSB#HA0 pinout, RAA230215GSB#HA0 application, or RAA230215GSB#HA0 equivalent, this page provides verified technical context, validated pin functions, confirmed dual-channel sequencing behavior, and real-world design constraints for embedded power management integration.
Technical Context
The RAA230215GSB#HA0 integrates two independent regulation channels: ch1 uses current-mode PWM control with synchronous rectification, internal MOSFETs, and 100% duty-cycle capability; ch2 is a foldback-current-limited LDO with ultra-low-power mode activation via DSTB pin. Both channels share a common VREG supply, thermal shutdown (≥150°C), and UVLO (2.9 V start / 2.8 V stop).
Sequencing is controlled by SHDNB1/SHDNB2 logic states-supporting three patterns (ch1→ch2, ch2→ch1, or simultaneous startup)-and digital soft-start (2 ms fixed) ramps both outputs linearly using 64-step reference voltage generation. Power-good (PG) is open-drain, triggered when both outputs exceed 90% of nominal voltage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.0 V to 5.5 V - supports single-supply operation from standard 3.3 V or 5 V system rails. |
| ch1 Output Current | 3 A - sufficient for FPGA I/O banks or MCU cores requiring high transient current delivery. |
| ch2 Output Current | 500 mA - powers low-noise analog peripherals or communication interfaces without external LDO. |
| Switching Frequency | 1 MHz (fixed) - enables compact external components (e.g., 2.2 µH inductor, 22 µF output cap). |
| Ultra-Low-Power Mode | 25 µA typical quiescent current - extends battery life in always-on sensor nodes while maintaining ch2 LDO output. |
| Output Accuracy | ±2.5% (ch1), ±1% (ch2) - ensures stable voltage margins for 1.2 V/1.8 V/3.3 V logic domains. |
| Thermal Shutdown | ≥150°C with timer-latch recovery - protects against sustained overload in sealed enclosures. |
Pinout & Package
RAA230215GSB#HA0 is housed in a thermally enhanced 20-pin HTSSOP package with exposed pad for PCB-level heat dissipation. Pin functions are validated per Renesas R18DS0013EJ0102 Rev.1.02 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (TEST1) | Test pin | Must be connected to AGND; no functional role in normal operation. |
| 2 (II1) | Inverting input, ch1 error amplifier | Connects to ch1 feedback divider; sets output voltage when used with external resistors. |
| 3–4 (PGND11, PGND12) | Power ground, ch1 | Dedicated low-impedance return path for high-current ch1 switching loop. |
| 5–6 (LOUT11, LOUT12) | Ch1 inductor connection | Parallel pins reduce conduction loss and EMI; connect to same inductor terminal. |
| 7–8 (VPIN11, VPIN12) | Ch1 high-side MOSFET supply | Input power path for ch1 synchronous rectifier; requires local 10 µF ceramic decoupling. |
| 9 (VPIN2) | Ch2 LDO input supply | Accepts same input as ch1 or separate rail; dropout voltage ≤0.5 V at 20 mA. |
| 10 (OUT2) | Ch2 regulated output | 500 mA LDO output; requires ≥10 µF ceramic capacitor for stability. |
| 11 (II2) | Inverting input, ch2 error amplifier | Feedback node for ch2; supports adjustable output using external resistor divider. |
| 12 (PG) | Open-drain power-good indicator | Signals valid output only when both ch1 and ch2 exceed 90% of set voltage; needs 100 kΩ pull-up. |
| 13 (AVDD) | Analog power supply | Primary IC bias rail (3.0–5.5 V); powers internal regulators, comparators, and control logic. |
| 14 (AGND) | Analog ground | Reference for sensitive analog blocks (error amps, references); must be star-connected to PGND. |
| 15 (TEST2) | Test pin | Connect to VREG; unused in production designs. |
| 16 (VREG) | Internal 2.4 V regulator output | Supplies internal circuitry; requires 1 µF ceramic capacitor to AGND for stability. |
| 17 (TEST3) | Test pin | No connection required; leave floating. |
| 18 (DSTB) | Ultra-low-power mode enable | High = ch1 disabled, ch2 active at 25 µA IQ; low = full dual-channel operation. |
| 19 (SHDNB2) | Ch2 ON/OFF control | Active-low; controls ch2 startup/shutdown sequence relative to ch1 based on logic state pairing. |
| 20 (SHDNB1) | Ch1 ON/OFF control | Active-low; determines overall sequencing pattern together with SHDNB2 (see datasheet Table on p.17). |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulation channels | ch1: 3 A buck converter with current-mode control; ch2: 500 mA LDO with foldback current limiting - eliminates need for discrete secondary regulators. |
| Programmable output voltage per channel | RAA230215GSB#HA0 supports adjustable outputs (0.9 V to VIN×0.8) using external resistor dividers - enables precise rail matching for mixed-voltage SoCs. |
| Digital soft-start with fixed timing | 2 ms fixed ramp time for both channels - prevents inrush current damage to input capacitors and downstream loads during cold start. |
| Configurable power sequencing | Three startup orders (ch1→ch2, ch2→ch1, simultaneous) controlled solely by SHDNB1/SHDNB2 logic levels - no external timers or controllers needed. |
| Integrated discharge circuit | Internal MOSFETs rapidly discharge ch1 and ch2 outputs upon shutdown - avoids floating rails and ensures deterministic reset behavior. |
| Ultra-low-power retention mode | 25 µA typical quiescent current with ch2 active and ch1 disabled - sustains real-time clock or sensor interface power during deep sleep. |
Applications
| Industrial PLC I/O Module | Smart Meter MCU Power |
|---|---|
|
Use Scenario: Powering isolated digital I/O banks and analog front-end circuitry in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: RAA230215GSB#HA0 provides tightly regulated 3.3 V (ch2) for isolation drivers and 1.2 V (ch1) for ARM Cortex-M7 core, with sequenced startup to meet IEC 61000-4-5 surge immunity requirements. Use Value: Integrated sequencing and discharge eliminate external timing components and prevent latch-up during rapid power cycling in factory environments. |
Use Scenario: Supplying metrology SoC, RF transceiver, and LCD controller in battery-backed utility meters operating 15+ years. IC Role / Device Role / Timing Role: RAA230215GSB#HA0 delivers 1.8 V (ch1) to metrology ADC and 3.3 V (ch2) to sub-GHz radio, entering ultra-low-power mode during sleep intervals to extend battery life. Use Value: 25 µA quiescent current in LDO-only mode reduces annual battery drain by >40% versus discrete solutions. |
| FPGA Configuration Subsystem | Building Automation Controller |
|
Use Scenario: Generating configuration voltage (2.5 V), core voltage (1.0 V), and auxiliary I/O voltage (3.3 V) for Xilinx Artix-7 FPGAs in edge AI gateways. IC Role / Device Role / Timing Role: RAA230215GSB#HA0 implements ch1→ch2 sequencing to satisfy FPGA's strict power-up order (VCCINT before VCCAUX), with PG signal enabling configuration status monitoring. Use Value: Single-chip dual-channel solution reduces BOM count by 3 discrete regulators and simplifies layout in 4-layer PCB constrained designs. |
Use Scenario: Powering HVAC controller MCU, CAN transceiver, temperature sensors, and display backlight in commercial building management systems. IC Role / Device Role / Timing Role: RAA230215GSB#HA0 supplies 3.3 V (ch2) to CAN FD PHY and 1.2 V (ch1) to ARM Cortex-M4, with simultaneous startup ensuring deterministic boot across distributed nodes. Use Value: Internal short-circuit protection (ch1) and overcurrent limiting (ch2) prevent field failures due to wiring faults in harsh mechanical installations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RGZR | 3-channel buck + LDO; 2.25 MHz switching; no ultra-low-power mode; 24-pin QFN | Higher switching frequency allows smaller inductors but lacks 25 µA standby mode for battery backup | Prefer when board space is critical and continuous low-IQ operation is unnecessary |
| MAX20029ATPA/VY+ | Dual buck only (no integrated LDO); 2.2 MHz; automotive AEC-Q100 qualified; 20-pin TQFN | Requires external LDO for noise-sensitive analog rails; rated for –40°C to +125°C junction | Prefer for automotive under-hood applications where extended temperature range is mandatory |
Compared with TPS65023RGZR and MAX20029ATPA/VY+, the RAA230215GSB#HA0 uniquely combines adjustable dual outputs, integrated LDO, and verified 25 µA ultra-low-power mode in a single 20-pin HTSSOP - making it optimal for industrial and smart infrastructure designs requiring long-term battery support and compact power architecture.
Availability
RAA230215GSB#HA0 is available at Aetrix Electronics and suitable for industrial PLCs, smart meters, FPGA-based edge gateways, and building automation controllers requiring stable component supply across multi-year production cycles.
Supply support for RAA230215GSB#HA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog power management, and embedded solutions for industrial, automotive, and IoT markets.
The RAA23021x family was designed to consolidate multi-rail power delivery in space- and efficiency-constrained embedded systems, targeting applications where sequencing, low quiescent current, and reliability under thermal stress are critical.
FAQ
What output voltage options does the RAA230215GSB#HA0 support?
The RAA230215GSB#HA0 supports adjustable outputs: ch1 ranges from 0.9 V to VIN×0.8, and ch2 is similarly adjustable, both set via external resistor dividers referenced to 0.8 V internal thresholds. Unlike fixed-output variants (e.g., RAA230214GSB#HA0), RAA230215GSB#HA0 does not include internal resistors - enabling precise rail tuning for mixed-voltage SoCs and FPGAs.
How does the ultra-low-power mode function in the RAA230215GSB#HA0?
In ultra-low-power mode (DSTB = high), the RAA230215GSB#HA0 disables ch1 entirely while maintaining ch2 LDO operation at 25 µA typical quiescent current. This mode retains regulated 3.3 V or 1.8 V output for always-on peripherals like RTCs or sensors, with no external components required - a key advantage over discrete buck+LDO solutions.
Can the RAA230215GSB#HA0 support independent sequencing of its two channels?
Yes - the RAA230215GSB#HA0 supports three sequencing patterns (ch1→ch2, ch2→ch1, or simultaneous) controlled exclusively by the logic states of SHDNB1 and SHDNB2 pins. No external timers or firmware intervention is needed, and soft-start timing remains fixed at 2 ms per channel regardless of sequence order.
What protection features are active during ultra-low-power mode in the RAA230215GSB#HA0?
Per Renesas R18DS0013EJ0102 Rev.1.02, all protection circuits - including short-circuit protection (ch1), overcurrent protection (ch2), thermal shutdown, and UVLO - are disabled during ultra-low-power mode. Only the ch2 LDO remains operational, with no fault detection or automatic recovery until returning to normal mode.
Is the RAA230215GSB#HA0 pin-compatible with other devices in the RAA23021x family?
Yes - all RAA23021x variants (including RAA230214GSB#HA0 and RAA230215GSB#HA0) share identical 20-pin HTSSOP packaging and pinout. The only functional difference lies in internal resistor configuration: RAA230215GSB#HA0 omits internal feedback resistors to enable external adjustment, while RAA230214GSB#HA0 fixes ch1/ch2 outputs at 3.3 V.
RAA230215GSB#HA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 1MHz
- Voltage/Current - Output 1:
- 0.9V ~ 4.4V, 3A
- Voltage/Current - Output 2:
- 0.9V ~ 4.4V, 500mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP
RAA230215GSB#HA0 FAQ
1.How can I place an order for RAA230215GSB#HA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for RAA230215GSB#HA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RAA230215GSB#HA0 reliable?
The price and inventory of RAA230215GSB#HA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RAA230215GSB#HA0 is usually 5 days.
3.What payment methods are accepted for RAA230215GSB#HA0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RAA230215GSB#HA0 transactions.
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4.How is shipping managed for RAA230215GSB#HA0?
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Once your RAA230215GSB#HA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RAA230215GSB#HA0?
For technical support, including RAA230215GSB#HA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RAA230215GSB#HA0 requirements.
6.How does Aetrix verify that RAA230215GSB#HA0 is sourced from the original manufacturer or authorized distributors?
All RAA230215GSB#HA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RAA230215GSB#HA0 meets industry standards.
7.What is the process for return or replacement of RAA230215GSB#HA0?
All RAA230215GSB#HA0 units undergo pre-shipment inspection (PSI). If there is an issue with RAA230215GSB#HA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RAA230215GSB#HA0 part is unused and in its original packaging.
Return procedure for RAA230215GSB#HA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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