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STMicroelectronics RH-DAC1612K1

Part No.:
RH-DAC1612K1
Manufacturer:
STMicroelectronics
Category:
Digital to Analog Converters (DAC)
Package:
24-CFlatpack
Datasheet:
AetrixRH-DAC1612K1.pdf
Description:
RAD-HARD HIGH RESOLUTION DAC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,418

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Product details

Overview

RH-DAC1612K1 from STMicroelectronics is a radiation-hardened 16-bit sigma-delta digital-to-analog converter optimized for space-grade telemetry and interferometry systems. It delivers 96 dB SNR at 3 kHz bandwidth, supports 12 ksps sampling with 3 MHz internal master clock, features SPI interface with read/write capability, and provides internally filtered single-ended voltage output with dedicated OFB pin for high-precision closed-loop sensing.

For engineers reviewing the RH-DAC1612K1 datasheet, RH-DAC1612K1 pinout, RH-DAC1612K1 application, or RH-DAC1612K1 equivalent, this device serves as a TID-hardened (100 krad), SEL-immune (125 MeV·cm²/mg), low-noise DAC for mission-critical analog control in LEO/GEO satellite subsystems where long-term stability and single-event effect resilience are mandatory.

Technical Context

The RH-DAC1612K1 implements a sigma-delta modulation architecture with 32-bit SPI register interface, supporting both straight binary and two's complement input formats. Its digital core includes asynchronous reset (ARSTN), power-down (PDN), and SYNC OUT for sample-rate synchronization - enabling precise timing alignment in daisy-chain–incompatible but radiation-tolerant stand-alone configurations.

Analog operation relies on external VREFIN (compatible with RHF100 1.2 V reference), internal VREFBOOST current source, and four external filter capacitors (Ca–Cd) to achieve 3 kHz bandwidth. Output feedback (OFB) enables high-accuracy sensing loops, while dual supply domains (AVCC 3–3.6 V, DVCC/IOVCC 1.8/3.3 V) enforce strict power sequencing per MIL-STD-883 compliance.

Key Specifications

Parameter Value and Actual Design Meaning
Resolution 16-bit effective resolution with 96 dB SNR at 3 kHz - ensures sub-LSB linearity for precision actuator control in interferometric sensors.
Sampling Rate 12 ksps at 3 MHz master clock - matches telemetry downlink timing budgets without requiring external oversampling logic.
Radiation Tolerance 100 krad TID (MIL-STD-883 TM 1019.7), SEL immune up to 125 MeV·cm²/mg - qualified for QML-V Class V spaceflight use without derating.
Interface SPI with 32-bit frame (7-bit address + 1-bit R/W + 24-bit data), MSB-first, CS-synchronized - enables deterministic register access and fault-detectable read-back of config/data registers.
Output Type Internally filtered, single-ended buffered voltage output with dedicated OFB pin - supports closed-loop calibration and drift compensation in high-stability instrumentation.
Power Dissipation 15 mW at 12 ksps - minimizes thermal load in thermally constrained satellite payload bays while maintaining full dynamic range.
Digital Supply 1.8 V / 3.3 V IOVCC & DVCC - compatible with modern low-voltage FPGAs and microcontrollers in radiation-hardened SoC designs.

Pinout & Package

Package: Ceramic flatpack (SMD 5962R16211), 24-pin, hermetically sealed, mass 1.25 g - designed for zero-outgassing vacuum environments and mechanical shock resistance per MIL-STD-883.

Pin/Terminal Circuit Role Design Meaning
PDN (Pin 1) Power-down control Active-low entry into standby mode; required to write Vseries/RC EN bits; maintains HiZ output during sleep.
SDOUT (Pin 2) SPI serial data output Reads back register contents (01h/02h); driven low during write transactions; enables real-time configuration verification.
SDIN (Pin 3) SPI serial data input Accepts 32-bit frames MSB-first; requires exact 32 SCLK edges under active CS to avoid transaction abort.
SCLK (Pin 4) SPI clock input Drives internal shift register on rising edge; frequency must support 12 ksps update rate with margin for calibration overhead.
CS (Pin 5) Chip select Active-low SPI enable; falling edge initiates transaction; rising edge latches register writes or triggers read response.
SYNC OUT (Pin 6) Master clock divided-by-OSR output Provides timing reference for synchronous DAC updates; used to align SPI writes with internal sample clock in closed-loop systems.
OFB (Pin 23) Output feedback Direct connection point for external op-amp feedback loop - enables real-time correction of gain/offset drift in metrology applications.
OUT (Pin 24) Analog output Buffered, single-ended voltage output (0 to 2×VREFIN); impedance-matched for driving 10 kΩ+ loads without external buffering.

Key Features

Feature Design Value
SEL immunity up to 125 MeV·cm²/mg Eliminates need for external watchdog circuits in GEO orbit; prevents catastrophic latch-up during solar particle events.
Two-stage auto-calibration (offset + Vref boost) Ensures <1 LSB error after power-up; internal VREFBOOST sequence charges external filter caps to stabilize VREFIN within 440 ms TWU period.
Dual data format support Configurable straight binary or two's complement input via bit 7 of register 01h - simplifies integration with signed-control algorithms in FPGA-based flight software.
Register read-back capability Enables periodic SEFI detection by comparing stored vs. live values of registers 01h (config) and 02h (DAC data) - critical for autonomous fault recovery.
Asynchronous reset (ARSTN) Hardware-level priority reset that forces all registers to POR state (00h) and disables SPI until ARSTN returns high - guarantees known state after radiation-induced upset.

Applications

Telemetry Downlink Calibration Spacecraft Interferometry

Use Scenario: Generating precise reference voltages for ADC calibration in satellite telemetry front-ends during in-orbit commissioning.

IC Role / Device Role / Timing Role: Radiation-hardened DAC providing stable, traceable analog references synchronized to spacecraft timebase via SYNC OUT.

Use Value: 96 dB SNR and 100 krad TID tolerance ensure calibration integrity over 15-year GEO missions without recalibration drift or failure.

Use Scenario: Driving piezoelectric actuators in optical path length control loops of space-based interferometers (e.g., LISA pathfinder).

IC Role / Device Role / Timing Role: Low-noise, closed-loop DAC using OFB pin to maintain sub-nanometer position stability under thermal cycling.

Use Value: Internally filtered 3 kHz bandwidth suppresses switching noise while preserving phase coherence required for fringe tracking.

High-Accuracy Instrumentation Radiation Monitoring Systems

Use Scenario: Setting bias points for cryogenic sensor amplifiers in deep-space probe scientific payloads operating at -223°C.

IC Role / Device Role / Timing Role: Precision voltage source with 1.8 V/3.3 V digital interface, enabling direct FPGA control without level-shifting circuitry.

Use Value: 15 mW power dissipation prevents localized heating in thermally isolated sensor modules, preserving measurement accuracy.

Use Scenario: Generating programmable thresholds for radiation detector pulse-height analyzers aboard nuclear-powered probes.

IC Role / Device Role / Timing Role: SEL-immune DAC setting comparator reference levels; register read-back detects SEFI-induced threshold shifts.

Use Value: Dual-supply isolation (AVCC/DVCC) prevents digital noise coupling into analog threshold generation path.

Equivalent & Alternatives

The following parts are listed as comparable options for similar radiation-hardened DAC applications.

Alternative Part Technical Difference Application Difference Selection Advice
AD5791RH 20-bit DAC, no integrated filter, requires external reconstruction filter; higher power (30 mW); TID = 100 krad but SEL immunity not specified. Lacks OFB pin and internal filtering - demands additional op-amp stage and layout area for 3 kHz bandwidth; unsuitable for compact interferometer PCBs. Select when absolute resolution >16-bit is required and board space allows external signal conditioning.
MAX5177RH 16-bit string DAC (not sigma-delta); 100 krad TID; no SPI read-back; no SYNC OUT; 80 dB SNR at 10 kHz. No auto-calibration or VREFBOOST - requires manual offset trimming; lower SNR limits use in low-drift metrology loops. Select for simpler control firmware where closed-loop feedback and ultra-low noise are not required.

Compared with AD5791RH and MAX5177RH, RH-DAC1612K1 uniquely integrates sigma-delta noise shaping, internal filtering, OFB feedback, and full register read-back - making it the only option for space-qualified, self-validating, low-power 3 kHz instrumentation DACs.

Availability

RH-DAC1612K1 is available at Aetrix Electronics and suitable for satellite telemetry downlinks, spacecraft interferometry systems, high-accuracy instrumentation, and radiation monitoring equipment requiring stable component supply across extended mission lifetimes.

Supply support for RH-DAC1612K1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and aerospace-grade ICs, with decades of heritage in radiation-hardened component development for ESA and NASA missions.

RH-DAC1612K1 belongs to ST's RHR (Radiation-Hardened by Design) product line, engineered specifically for high-reliability analog signal generation in extreme space environments where TID, SEL, and SEFI resilience are non-negotiable.

FAQ

What is the minimum external reference voltage supported by RH-DAC1612K1?

The device is compatible with the RHF100 1.2 V reference, and its transfer function scales linearly with VREFIN. With straight binary input, VOUT = 2 × VREFIN × Data / 65536, so a 1.2 V reference yields 0–2.4 V output range. Operation below 1.2 V is not characterized or guaranteed.

How does the OFB (output feedback) pin improve system accuracy?

OFB provides direct access to the DAC's internal output amplifier node, enabling external op-amps to close a precision feedback loop. This compensates for gain drift, temperature-induced offset, and output buffer nonlinearity - achieving sub-LSB stability over -55°C to +125°C without factory recalibration.

Can RH-DAC1612K1 operate with an external master clock?

Yes - setting RC EN = 0 in register 01h disables the internal 3 MHz oscillator and enables MCLKIN (Pin 10). External clock must be 2.4–3.6 MHz, clean, and stable; unused MCLKIN must be tied to DGND. Clock source selection is only writable in PDN = 0 (standby) mode.

What happens to the output during power-up sequencing?

Upon AVCC ramp-up, internal POR resets the device. During wake-up (PDN transition from 0→1), VOUT is forced to VREFIN with low-Z drive for ≤440 ms (TWU + CALT). Only after calibration completes does VOUT track the code in register 02h - preventing uncontrolled transients in sensitive analog subsystems.

RH-DAC1612K1 Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
24-CFlatpack
Packaging:
Strip
Product Status:
Active
Programmable:
-
Number of Bits:
16
Number of D/A Converters:
1
Settling Time:
-
Output Type:
Voltage - Buffered
Differential Output:
No
Data Interface:
Serial
Reference Type:
External, Internal
Voltage - Supply, Analog:
2.2V ~ 3.6V
Voltage - Supply, Digital:
2.2V ~ 3.6V
INL/DNL (LSB):
-
Architecture:
Sigma-Delta
Operating Temperature:
-40°C ~ 85°C
Supplier Device Package:
24-CFlatpack
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

RH-DAC1612K1 FAQ

1.How can I place an order for RH-DAC1612K1 through Aetrix?

Please submit a Request for Quotation (RFQ) for RH-DAC1612K1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for RH-DAC1612K1 reliable?

The price and inventory of RH-DAC1612K1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RH-DAC1612K1 is usually 5 days.

3.What payment methods are accepted for RH-DAC1612K1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RH-DAC1612K1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for RH-DAC1612K1?

RH-DAC1612K1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your RH-DAC1612K1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for RH-DAC1612K1?

For technical support, including RH-DAC1612K1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RH-DAC1612K1 requirements.

6.How does Aetrix verify that RH-DAC1612K1 is sourced from the original manufacturer or authorized distributors?

All RH-DAC1612K1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RH-DAC1612K1 meets industry standards.

7.What is the process for return or replacement of RH-DAC1612K1?

All RH-DAC1612K1 units undergo pre-shipment inspection (PSI). If there is an issue with RH-DAC1612K1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The RH-DAC1612K1 part is unused and in its original packaging.

Return procedure for RH-DAC1612K1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

RH-DAC1612K1 Tags

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