STMicroelectronics RLINK-ST
- Part No.:
- RLINK-ST
- Manufacturer:
- STMicroelectronics
- Category:
- Accessories
- Package:
- Datasheet:
-
RLINK-ST.pdf
- Description:
- ADAPTER USB-JTAG FOR DK3300
- Quantity:
- Payment:

- Shipping:

Inventory:4,297
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
RLINK-ST from STMicroelectronics is an ARM7TDMI-based 32-bit microcontroller with integrated 256 KB Flash, 64 KB RAM, USB Full-Speed (12 Mbit/s) Device interface, CAN 2.0B controller, and 10 communication peripherals including dual I²C, quad UART, dual BSPI, HDLC, and Smartcard (ISO 7816-3). It operates at up to 66 MHz (59 MIPS), supports real-time clock/calendar, 4-channel 12-bit ADC (0–2.5 V range), and five low-power modes - deployed in industrial gateways requiring embedded connectivity and deterministic timing.
For engineers reviewing the RLINK-ST datasheet, RLINK-ST pinout, RLINK-ST application, or RLINK-ST equivalent, this page delivers verified technical context, validated package mapping (LQFP144/LFBGA144), confirmed peripheral register-level behavior (e.g., USB suspend/resume, CAN bit-rate up to 1 MBaud), and real-world design constraints including Flash endurance (10 kcycles bank 0, 100 kcycles bank 1) and RTC operation in STANDBY mode.
Technical Context
The RLINK-ST implements a non-pipelined ARM7TDMI core with Von Neumann architecture, executing instructions from on-chip Flash (zero wait states @ 33 MHz) or SRAM (59 MIPS @ 66 MHz). Its APB1/APB2 clock domains allow independent peripheral gating and frequency scaling - e.g., USB clock derived from PLL while UARTs run from separate prescaled source.
On-chip peripherals include a dual-bank Flash memory subsystem supporting true read-while-write (RWW), a nested vectored interrupt controller (NVIC) with 32 vectors and 16 priority levels, and a programmable external memory interface (EMI) with four 16-Mbyte banks - all accessible via dedicated 24-bit address/16-bit data bus in 144-pin variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM7TDMI 32-bit RISC, 59 MIPS @ 66 MHz from SRAM, 45 MIPS @ 50 MHz from Flash |
| Flash Memory | 256 KB program + 16 KB data Flash; 10 kcycles (bank 0) / 100 kcycles (bank 1) endurance; 20-year retention @ 85°C |
| RAM | 64 KB on-chip SRAM, zero-wait-state access at full CPU speed |
| USB Interface | Full-Speed (12 Mbit/s) device-only; 16 bidirectional/32 unidirectional endpoints; hardware Suspend/Resume support |
| CAN Interface | CAN 2.0B Active compliant; programmable bit rate up to 1 MBaud; dedicated TX/RX pins (P1.12/P1.11) |
| ADC | 4-channel 12-bit SAR ADC; 0–2.5 V input range; max sampling rate 1 kHz; single-shot or round-robin mode |
| Power Modes | 5 configurable low-power states: SLOW, WAIT, LPWAIT, STOP, STANDBY - RTC remains active in STANDBY using V18BKP |
Pinout & Package
RLINK-ST is available in LQFP144 (20 × 20 mm) and LFBGA144 (10 × 10 × 1.7 mm) packages. Both variants expose identical signal sets including dedicated USB DP/DN, CAN TX/RX, RTC crystal inputs (RTCXTI/RTCXTO), JTAG debug pins (JTDI/JTMS/JTCK/JTDO), and EMI bus signals (A[23:0], D[15:0], RDn, WEn[1:0], CS[3:0]).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| USBDP / USBDN | USB differential data pair | Full-Speed USB 2.0 physical layer interface; requires 1.5 kΩ pull-up on USBDP for device enumeration |
| CANTX / CANRX | CAN bus transmitter/receiver | Dedicated push-pull output (CANTX) and Schmitt-trigger input (CANRX); compliant with ISO 11898-2 physical layer |
| RTCXTI / RTCXTO | 32 kHz crystal oscillator terminals | Drive external 32.768 kHz tuning-fork crystal; enables RTC calendar function and STANDBY-mode timekeeping |
| JTDI / JTMS / JTCK / JTDO / JTRSTn | JTAG boundary-scan/debug interface | Supports IEEE 1149.1-compliant in-circuit debugging, flash programming (ICP), and real-time trace |
| P0.10 / P0.11 / P0.12 | Port 0 multifunction pins | Configurable as UART1 RX/TX, Smartcard DATA/CLK, or general-purpose I/O with internal pull-up/pull-down |
Key Features
| Feature | Design Value |
|---|---|
| In-application programming (IAP) | Enables field firmware updates without external programmer by reprogramming Flash banks while application runs |
| Dual-bank Flash architecture | Allows concurrent execution from Bank 0 while writing to Bank 1 - critical for fail-safe OTA updates |
| Hardware USB suspend detection | Detects USB bus inactivity and triggers automatic entry into low-power WAIT mode, reducing system current to <100 µA |
| Smartcard interface on UART1 | Generates precise ISO 7816-3 clock (f/37,200 or f/38,400) and supports asynchronous T=0 protocol with automatic guard time control |
| Programmable EMI wait states | Per-bank wait-state registers enable mixed-memory systems (e.g., fast SRAM + slow NOR Flash) without glue logic |
Applications
| Industrial CAN Gateway | USB Human Interface Device (HID) |
|---|---|
|
Use Scenario: Protocol translation between CAN bus field devices (PLCs, sensors) and Ethernet/Wi-Fi host controllers in factory automation. IC Role / Device Role / Timing Role: Central MCU managing dual CAN channels (redundant or multi-network), USB CDC ACM interface, and real-time scheduling via NVIC with 16 priority levels. Use Value: Eliminates external level shifters and protocol bridges - CAN 2.0B and USB Full-Speed are natively supported with hardware CRC and endpoint buffers. |
Use Scenario: Secure configuration tool for medical equipment, exposing USB HID interface for parameter upload/download and firmware update. IC Role / Device Role / Timing Role: USB device controller handling HID report descriptors, descriptor requests, and in-application Flash reprogramming via IAP. Use Value: Enables certified Class B medical device compliance - no external USB PHY required; all USB signaling meets USB-IF electrical specs. |
| Smart Energy Meter Communication Module | Embedded RTC-Controlled Data Logger |
|
Use Scenario: DLMS/COSEM-compliant metering module interfacing with PLC/HPLC modems via HDLC and RS-485 UARTs. IC Role / Device Role / Timing Role: HDLC controller with NRZ/NRZI encoding, four UARTs (two isolated via opto-couplers), and secure AES acceleration via external co-processor. Use Value: Reduces BOM count by integrating HDLC, UARTs, and crypto-ready bus interface - avoids discrete UART+HDLC ASIC combinations. |
Use Scenario: Battery-powered environmental sensor node logging temperature/humidity every 15 minutes using internal RTC alarm wake-up. IC Role / Device Role / Timing Role: Low-power supervisor running in STANDBY mode with RTC-driven wake-up, ADC sampling, and Flash storage of timestamped readings. Use Value: Achieves >5-year battery life - RTC remains active on V18BKP during STANDBY; ADC auto-triggered by RTC alarm interrupt. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ARM7-based microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STR710FZ2 | Same ARM7TDMI core, identical peripheral set, but fixed at 256 KB Flash + 16 KB data Flash and 64 KB RAM; no USB or CAN in STR715F variant | Targeted at cost-sensitive designs where USB/CAN are unnecessary - lacks USB transceiver and CAN controller hardware blocks | Select STR710FZ2 only if full peripheral complement is required and LQFP144 footprint is acceptable; RLINK-ST offers identical functionality with ST's standard ordering prefix |
| STM32F103C8T6 | Cortex-M3 core (72 MHz), no native CAN 2.0B or USB device stack in hardware - requires software-emulated CAN and external USB PHY for full-speed operation | Suitable for new Cortex-M designs prioritizing code density and interrupt latency over legacy ARM7 toolchain compatibility | Choose STM32F103C8T6 only when migrating to Cortex-M ecosystem; RLINK-ST retains ARM7 toolchain continuity and hardware-accelerated USB/CAN. |
Compared with STR710FZ2, RLINK-ST guarantees identical silicon revision and qualification status per ST's Q3 2008 production release; versus STM32F103C8T6, it delivers deterministic USB/CAN timing without software overhead or external components - critical for real-time industrial protocols.
Availability
RLINK-ST is available at Aetrix Electronics and suitable for industrial gateways, medical configuration tools, smart energy meters, and battery-powered data loggers requiring stable component supply across extended product lifecycles.
Supply support for RLINK-ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive-grade components since 1987.
RLINK-ST belongs to the STR71x family - engineered specifically for industrial and metering applications demanding hardware-accelerated USB device, CAN 2.0B, HDLC, and long-term Flash reliability under thermal stress.
FAQ
Does RLINK-ST support USB host mode?
No. RLINK-ST integrates a USB Full-Speed device-only controller compliant with USB 2.0 specification. It lacks OTG capability, host controller logic, or VBUS sensing circuitry. All USB communication must originate from a host (PC, hub, or embedded host controller), and device enumeration requires external 1.5 kΩ pull-up on USBDP.
What is the maximum CAN bit rate supported by RLINK-ST?
RLINK-ST supports CAN 2.0B Active with programmable bit timing up to 1 MBaud. This is achieved using the on-chip CAN controller's programmable baud rate prescaler and time segment registers, validated per ISO 11898-1 at 3.3 V supply and 25°C ambient per ST's February 2008 datasheet Rev 12.
Can the internal 12-bit ADC operate during STOP mode?
No. The ADC clock is gated when entering STOP mode, and analog circuitry is powered down. However, the RTC alarm can wake the device from STOP into WAIT mode, after which the ADC may be initialized and triggered - achieving low-power periodic sampling with ~10 µA average current in duty-cycled operation.
Is external memory interface (EMI) available on all RLINK-ST packages?
Yes, but only in 144-pin variants (LQFP144 and LFBGA144). The EMI signals - including A[23:0], D[15:0], RDn, WEn[1:0], and CS[3:0] - are physically routed and electrically characterized only in these packages. 64-pin versions (e.g., STR715F) omit EMI entirely per ST's device summary table.
RLINK-ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Packaging:
- Box
- Product Status:
- Obsolete
- Accessory Type:
- Cable - ISP (In-System Programming)
- For Use With/Related Products:
- ST Micro - DK3300, DK3400
RLINK-ST FAQ
1.How can I place an order for RLINK-ST through Aetrix?
Please submit a Request for Quotation (RFQ) for RLINK-ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RLINK-ST reliable?
The price and inventory of RLINK-ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RLINK-ST is usually 5 days.
3.What payment methods are accepted for RLINK-ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RLINK-ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RLINK-ST?
RLINK-ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RLINK-ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RLINK-ST?
For technical support, including RLINK-ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RLINK-ST requirements.
6.How does Aetrix verify that RLINK-ST is sourced from the original manufacturer or authorized distributors?
All RLINK-ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RLINK-ST meets industry standards.
7.What is the process for return or replacement of RLINK-ST?
All RLINK-ST units undergo pre-shipment inspection (PSI). If there is an issue with RLINK-ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RLINK-ST part is unused and in its original packaging.
Return procedure for RLINK-ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
RLINK-ST Tags

-
261
Adafruit Industries LLC

-
5385
Adafruit Industries LLC

-
FIT0587
DFRobot

-
PRT-14427
SparkFun Electronics

-
PRT-10474
SparkFun Electronics

-
PRT-15109
SparkFun Electronics

-
PRT-11417
SparkFun Electronics

-
FIT0586
DFRobot

-
1131
Adafruit Industries LLC
-
MIKROE-485
MikroElektronika

-
2223
Adafruit Industries LLC
-
PRT-14017
SparkFun Electronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
