Renesas RM24C32C-BSNC-B
- Part No.:
- RM24C32C-BSNC-B
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
RM24C32C-BSNC-B.pdf
- Description:
- IC CBRAM 32KBIT I2C 750KHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
RM24C32C-BSNC-B from Adesto Technologies is a 32Kbit CBRAM®-based non-volatile serial memory IC with I²C interface, operating from 2.7V to 3.6V, supporting 100kHz/400kHz bus speeds, 32-byte page writes, and 5μA standby current. It serves as an EEPROM-compatible replacement in embedded microcontroller systems requiring low-energy write operations and fast byte-level updates.
For engineers reviewing the RM24C32C-BSNC-B datasheet, RM24C32C-BSNC-B pinout, RM24C32C-BSNC-B application, or RM24C32C-BSNC-B equivalent, key selection criteria include its 60nJ byte-write energy, 1ms full-page write time, 25,000-cycle endurance, 10-year data retention, and dual SOIC/TSSOP package compatibility for space-constrained industrial control and IoT sensor nodes.
Technical Context
This device implements a slave-only I²C interface with SDA (open-drain) and SCL (input-only) pins, using external E0–E2 address bits to support up to eight devices on one bus. Its internal address pointer auto-increments during sequential reads and wraps within pages during byte/page writes.
The RM24C32C-BSNC-B uses Adesto's proprietary CBRAM® resistive switching technology-enabling direct-write operation without erase-before-write-and features hardware write protection via the WP pin, which disables all writes when pulled high while permitting unrestricted reads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 32Kbit (4,096 × 8-bit addresses), sufficient for firmware parameter storage or calibration data in MCU-based edge devices. |
| Interface | I²C-compatible 2-wire bus (SCL/SDA), supports standard (100kHz) and fast (400kHz) modes-compatible with most ARM Cortex-M and PIC microcontrollers. |
| Write Energy | 60nJ per byte write-10× lower than comparable EEPROMs, critical for battery-powered sensor nodes with frequent configuration updates. |
| Page Write Time | 1ms maximum for 32-byte page-4–6× faster than legacy EEPROMs, reducing host MCU wait time and improving system responsiveness. |
| Data Retention | 10 years at +70°C-validated under JEDEC JESD22-A117B, ensuring long-term reliability in automotive cabin modules and industrial HMIs. |
| Endurance | 25,000 write cycles-meets industrial-grade logging requirements where daily writes occur over multi-year deployments. |
| Supply Range | 2.7V to 3.6V-matches Li-ion battery discharge profiles and 3.3V logic rails without level-shifting. |
| Standby Current | 5μA at VCC = 3.3V-enables ultra-low-power sleep modes in always-on IoT endpoints. |
Pinout & Package
RM24C32C-BSNC-B is supplied in an 8-lead SOIC (SN) package per JEDEC MS-012, Variation AA, with 0.150" body width and gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| E0 | LSB External Device Address | One of three hardware-selectable address bits enabling up to eight devices on same I²C bus; sets device ID alongside E1/E2. |
| E1 | Mid-bit External Device Address | Second bit of 3-bit chip select; combined with E0/E2, determines unique 7-bit I²C slave address (1010_E2_E1_E0_R/W). |
| E2 | MSB External Device Address | Most significant bit of hardware address; allows flexible multi-device topology without software reconfiguration. |
| GND | Ground Reference | System return path for all internal circuitry; must be connected to PCB ground plane for stable noise margin. |
| SDA | Serial Data Line | Open-drain bidirectional I²C data line requiring external pull-up (2kΩ for 400kHz); transmits addresses, commands, and data. |
| SCL | Serial Clock Input | Slave-only clock input synchronized to master controller; defines timing for all read/write transfers. |
| WP | Hardware Write Protect | Active-high pin disabling all write operations when tied to VCC; enables field-safe firmware parameter locking. |
| VCC | Power Supply | Primary 2.7–3.6V supply; internal reset circuit releases after tPUD = 75μs once VCC exceeds VVCCI = 2.4V. |
Key Features
| Feature | Design Value |
|---|---|
| CBRAM® Technology | Resistive RAM enabling true direct-write operation-no erase cycle required before write, eliminating latency and wear overhead. |
| Low-Energy Byte Write | 60nJ per byte-reduces average power consumption by >90% vs. EEPROM in applications with frequent small-data updates. |
| Fast Page Write | 1ms full 32-byte page programming-accelerates bulk configuration loading and reduces host CPU blocking time. |
| Unlimited Read Cycles | No degradation from repeated reads-ideal for real-time status registers or frequently polled calibration tables. |
| Hardware Write Protection | WP pin disables writes independently of software state-prevents accidental corruption during firmware updates or brown-out conditions. |
| Multi-Device Bus Support | E0/E1/E2 pins allow eight identical RM24C32C-BSNC-B devices on one I²C bus-simplifies modular design with shared controller resources. |
Applications
| Industrial Sensor Node | Smart Metering Module |
|---|---|
Use Scenario: Battery-powered environmental sensor collecting temperature/humidity every 10 seconds and storing min/max values locally. IC Role / Device Role / Timing Role: Non-volatile parameter and event-log storage with sub-millisecond write capability and <5μA sleep current. Use Value: Enables 5+ year battery life due to 60nJ byte writes and eliminates EEPROM wear-out concerns over 25,000+ daily updates. |
Use Scenario: Electricity meter recording tamper events, billing intervals, and firmware version history across 10+ years of field operation. IC Role / Device Role / Timing Role: Secure, long-retention configuration and audit log storage interfaced to metrology SoC via I²C. Use Value: 10-year data retention at +70°C and hardware WP pin ensure regulatory compliance and prevent unauthorized configuration changes. |
| Automotive Cabin Controller | Medical Wearable Device |
Use Scenario: HVAC control module storing user presets, calibration offsets, and fault codes across ignition cycles. IC Role / Device Role / Timing Role: EEPROM-replacement memory for infotainment-linked comfort settings with fast write recovery after power loss. Use Value: 1ms page write and automatic address wrap enable robust save-on-exit behavior without host MCU intervention. |
Use Scenario: Continuous glucose monitor logging sensor calibration coefficients and usage timestamps between USB sync sessions. IC Role / Device Role / Timing Role: Low-power, high-endurance memory for patient-specific settings and diagnostic logs in Class II medical devices. Use Value: RoHS/halogen-free SOIC package and 25,000-cycle endurance meet ISO 13485 manufacturing and clinical longevity requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar non-volatile serial memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C32D-SSHM-T | Standard EEPROM; 1ms page write, but 10× higher byte-write energy (600nJ), 1M-cycle endurance, no CBRAM speed advantage. | Acceptable where write frequency is low (<100/day) and cost sensitivity outweighs power/performance needs. | Select only if legacy EEPROM qualification is mandated and energy budget permits. |
| FM24V32-G | F-RAM with unlimited endurance and 150ns write time, but higher standby current (100μA) and no hardware WP pin. | Better for ultra-high-write-frequency logging, but unsuitable for battery-critical designs requiring <10μA sleep. | Prefer when write count dominates lifetime analysis and power budget allows higher quiescent draw. |
Compared with AT24C32D-SSHM-T and FM24V32-G, the RM24C32C-BSNC-B uniquely balances ultra-low write energy (60nJ), fast 1ms page writes, 5μA standby, and hardware write protection-making it optimal for battery-operated industrial and medical devices needing reliable, low-power, medium-endurance non-volatile storage.
Availability
RM24C32C-BSNC-B is available at Aetrix Electronics and suitable for industrial sensor nodes, smart metering modules, and automotive cabin controllers requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for RM24C32C-BSNC-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Adesto Technologies (acquired by Dialog Semiconductor in 2020, now part of Renesas Electronics) specialized in low-power, high-performance non-volatile memory solutions based on CBRAM® and other emerging technologies.
The RM24C32C-BSNC-B belongs to Adesto's Mavriq™ family of CBRAM® serial memories, designed specifically to replace EEPROM in energy-constrained embedded systems where write speed, power efficiency, and endurance are critical.
FAQ
What is the maximum I²C clock frequency supported by the RM24C32C-BSNC-B?
The RM24C32C-BSNC-B supports I²C bus speeds up to 400kHz under standard operating conditions (TA = 0°C to +70°C, VCC = 2.7V–3.6V). Its AC characteristics guarantee tSCLH/tSCLL ≥ 500ns, and it is also compatible with 100kHz standard-mode operation. The device does not support high-speed mode (3.4MHz) or ultra-fast mode.
Does the RM24C32C-BSNC-B require an external pull-up resistor on the SDA line?
Yes, the RM24C32C-BSNC-B requires an external pull-up resistor on the SDA line because it uses an open-drain output structure. Recommended values are 10kΩ for 100kHz operation and 2kΩ for 400kHz operation to meet rise-time specifications (tRI ≤ 300ns) and maintain signal integrity within the 400pF bus capacitance limit.
How does the WP pin function on the RM24C32C-BSNC-B?
On the RM24C32C-BSNC-B, the WP (Write Protect) pin is sampled at the STOP condition of each write command. When WP is tied to VCC (high), all write operations-including byte and page writes-are inhibited, but read operations remain fully functional. Pulling WP to GND enables normal write functionality. The pin has no effect on ongoing writes once initiated.
Can multiple RM24C32C-BSNC-B devices share the same I²C bus?
Yes, up to eight RM24C32C-BSNC-B devices can operate on the same I²C bus using the E0, E1, and E2 hardware address pins. These pins form the three most significant bits of the 7-bit slave address (1010_E2_E1_E0_R/W), allowing unique addressing without software configuration or external address lines.
What is the endurance rating of the RM24C32C-BSNC-B, and how is it measured?
The RM24C32C-BSNC-B is rated for 25,000 write cycles per memory location, validated per JEDEC JESD22-A117B for CBRAM® technology. This endurance applies to both byte and page writes and reflects guaranteed performance under specified conditions (TA = 0°C to +70°C, VCC = 2.7V–3.6V). Read operations have unlimited endurance.
RM24C32C-BSNC-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- Mavriq™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- CBRAM®
- Technology:
- CBRAM
- Memory Size:
- 32Kbit
- Memory Organization:
- 32 Bytes Page Size
- Memory Interface:
- I2C
- Clock Frequency:
- 750 kHz
- Write Cycle Time - Word, Page:
- 100µs, 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
RM24C32C-BSNC-B FAQ
1.How can I place an order for RM24C32C-BSNC-B through Aetrix?
Please submit a Request for Quotation (RFQ) for RM24C32C-BSNC-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RM24C32C-BSNC-B reliable?
The price and inventory of RM24C32C-BSNC-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RM24C32C-BSNC-B is usually 5 days.
3.What payment methods are accepted for RM24C32C-BSNC-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RM24C32C-BSNC-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RM24C32C-BSNC-B?
RM24C32C-BSNC-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RM24C32C-BSNC-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RM24C32C-BSNC-B?
For technical support, including RM24C32C-BSNC-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RM24C32C-BSNC-B requirements.
6.How does Aetrix verify that RM24C32C-BSNC-B is sourced from the original manufacturer or authorized distributors?
All RM24C32C-BSNC-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RM24C32C-BSNC-B meets industry standards.
7.What is the process for return or replacement of RM24C32C-BSNC-B?
All RM24C32C-BSNC-B units undergo pre-shipment inspection (PSI). If there is an issue with RM24C32C-BSNC-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RM24C32C-BSNC-B part is unused and in its original packaging.
Return procedure for RM24C32C-BSNC-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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