Renesas RM25C64C-BSNC-T
- Part No.:
- RM25C64C-BSNC-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
RM25C64C-BSNC-T.pdf
- Description:
- IC CBRAM 64KBIT SPI 5MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,621
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
RM25C64C-BSNC-T from Adesto Technologies is a 64 Kbit non-volatile serial EEPROM memory IC based on CBRAM® resistive switching technology, operating from 1.65V to 3.6V supply, supporting SPI modes 0 and 3, with 10 MHz fast read capability and 32-byte page write - used for firmware storage and parameter retention in ultra-low-power IoT sensors and medical wearables.
For engineers reviewing the RM25C64C-BSNC-T datasheet, RM25C64C-BSNC-T pinout, RM25C64C-BSNC-T application, or RM25C64C-BSNC-T equivalent, key selection criteria include its 2.2 µA power-down current, 100,000 write endurance, 10-year data retention, CBRAM-based low-energy byte write (50 nJ), and SOIC-8/TSSOP-8 package compatibility with space-constrained embedded designs.
Technical Context
The RM25C64C-BSNC-T implements a 4-wire SPI interface (CS, SDO, SDI, SCK) with dual read modes: normal (1.6 MHz max) and fast (10 MHz max). It uses self-timed internal erase/write cycles and supports both byte-level (25 µs) and 32-byte page-level (1 ms) programming.
Its CBRAM® technology enables direct-write operation without charge pumps, delivering lower energy per byte write and faster page programming than conventional EEPROM. The device includes hardware write protection via WP pin and software protection via Status Register bits (SRWD, BP0/BP1, WEL), plus three low-power states: Standby, Power Down (2.2 µA), and Ultra-Deep Power Down (1.6 µA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory density | 64 Kbit (8 KB), organized as 8,192 × 8-bit array - sufficient for bootloader configuration, calibration data, and event logs in edge nodes. |
| Supply voltage range | 1.65 V to 3.6 V - compatible with single-cell Li-ion, coin cell, and 3.3 V logic rails without level shifting. |
| Fast read clock rate | 10 MHz - enables sub-100 µs access to full memory contents, critical for real-time sensor data logging. |
| Page write time | 1 ms for 32 bytes - 4–6× faster than comparable EEPROMs, reducing firmware update latency. |
| Power-down current | 2.2 µA at 25°C - extends battery life in always-on monitoring devices beyond 10 years on CR2032. |
| Write endurance | 100,000 cycles - meets JEDEC JESD22-A117B for industrial-grade reliability in field-upgradable systems. |
| Data retention | 10 years at +85°C - validated for automotive cabin modules and industrial controllers with extended thermal exposure. |
Pinout & Package
RM25C64C-BSNC-T is packaged in an 8-lead SOIC (Small Outline Integrated Circuit) with standard 150 mil body width and 1.27 mm pitch - RoHS-compliant, halogen-free, and compatible with automated SMT assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CS | Chip Select | Active-low enable; pulls device into standby when high, enabling multi-device SPI bus sharing. |
| 2 SDO | Serial Data Output | Tri-state output; drives read data on falling SCK edge - requires external pull-up for open-drain compatibility. |
| 3 WP | Write Protect | Hardware lock for Status Register when SRWD = 1; prevents accidental configuration changes during power transients. |
| 4 GND | Ground | Reference return path for all I/O and power; must be low-impedance to minimize noise coupling into CBRAM cells. |
| 5 SDI | Serial Data Input | Accepts commands, addresses, and data on rising SCK edge - supports MSB-first SPI protocol with no byte-order ambiguity. |
| 6 SCK | Serial Clock | Master-generated timing signal; supports polarity/phase modes 0 and 3 for interoperability with diverse microcontrollers. |
| 7 HOLD | Hold | Pauses ongoing SPI transaction without resetting state - preserves address pointer during interrupt-driven host operations. |
| 8 VCC | Power Supply | 1.65–3.6 V input; internal regulation ensures stable CBRAM programming voltage across supply range. |
Key Features
| Feature | Design Value |
|---|---|
| CBRAM® resistive memory technology | Enables direct-write operation without high-voltage charge pumps - eliminates reliability degradation from Fowler-Nordheim stress and reduces die area by >30% vs. floating-gate EEPROM. |
| Low-energy byte write | 50 nJ per byte - consumes only 10% of the energy required by similar-density EEPROMs, extending battery life in energy-harvesting applications. |
| Ultra-deep power-down mode | 1.6 µA typical current - lowest quiescent draw among serial EEPROMs in its class, ideal for maintenance-free remote sensors. |
| Flexible block protection | BP0/BP1 bits support four protection zones (none, top 4 KB, top 8 KB, full array) - allows secure partitioning of firmware vs. user data regions. |
| Auto Power Down Enable (APDE) | Configurable bit that triggers automatic entry to Power Down mode when SCK frequency drops below 1 MHz - simplifies power management in variable-speed hosts. |
Applications
| Medical Wearables | Industrial Sensor Nodes |
|---|---|
|
Use Scenario: Continuous ECG patch storing patient-specific calibration coefficients and last-known vital signs during battery replacement. IC Role / Device Role / Timing Role: Non-volatile parameter store with guaranteed 10-year retention at body temperature (37°C ambient, up to +55°C case temp). Use Value: Eliminates need for backup capacitors or supercapacitors due to 2.2 µA power-down current and instant wake-up from RES command. |
Use Scenario: Wireless vibration sensor in predictive maintenance system logging timestamped FFT bins and fault thresholds. IC Role / Device Role / Timing Role: High-endurance data logger buffer - withstands 100+ daily write cycles over 5-year deployment without wear leveling. Use Value: 32-byte page write completes in 1 ms, enabling gap-free capture of transient events even during concurrent RF transmission. |
| Smart Metering Modules | Automotive Cabin Controllers |
|
Use Scenario: Electricity meter retaining tariff schedules, tamper logs, and billing cycle counters across mains power outages. IC Role / Device Role / Timing Role: Secure configuration vault with hardware (WP pin) and software (SRWD + BP bits) write locking. Use Value: Dual protection prevents unauthorized firmware modification while allowing field updates via authenticated host commands. |
Use Scenario: HVAC control module storing seat position presets, climate profiles, and driver identification across ignition cycles. IC Role / Device Role / Timing Role: Fast-access parameter store - 10 MHz fast read retrieves full 8 KB profile in <800 µs for seamless user experience. Use Value: CBRAM's immunity to radiation-induced bit flips improves functional safety compliance over flash-based alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4 Mbit NOR flash with SPI interface; requires sector erase (4 KB min), no byte-write capability; 3.0 V only; 100 µA standby current. | Higher density but slower random writes; suited for firmware code storage, not frequent parameter updates. | Select only if application requires >64 Kbit capacity and tolerates erase granularity and higher power. |
| FM25V05-G | 512 Kbit F-RAM; unlimited endurance; 1.8–3.6 V; 15 MHz SPI; 250 µA active read current; no write delay. | Superior write speed and endurance, but 100× higher standby current (250 µA vs. 2.2 µA) limits battery life. | Prefer for high-write-frequency logging where power budget permits; avoid in coin-cell-powered devices. |
Compared with AT25DF041A-SSH-T and FM25V05-G, RM25C64C-BSNC-T uniquely balances ultra-low power-down current (2.2 µA), 100K endurance, and true byte-write flexibility - making it optimal for battery-critical, medium-write-frequency embedded systems where flash is too slow and FRAM is too power-hungry.
Availability
RM25C64C-BSNC-T is available at Aetrix Electronics and suitable for medical wearables, industrial sensor nodes, smart metering modules, and automotive cabin controllers requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for RM25C64C-BSNC-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Adesto Technologies (now part of Dialog Semiconductor, a Renesas company) specializes in ultra-low-power, non-volatile memory and IoT connectivity solutions using proprietary technologies like CBRAM®.
The RM25C-Series was designed specifically for energy-constrained embedded systems needing reliable, fast, low-energy non-volatile storage - targeting applications where traditional EEPROM and flash fall short in power, speed, or endurance.
FAQ
What is the maximum clock frequency supported by RM25C64C-BSNC-T in fast read mode?
The RM25C64C-BSNC-T supports a maximum SCK clock frequency of 10 MHz in fast read mode, enabling rapid sequential reads across the full 8 KB memory array. This is verified in Section 3.2 AC Operating Characteristics of the DS-RM25C64C-L–097D datasheet, with tOV = 6.5 ns and CL = 10 pF test condition. The 10 MHz capability allows sub-millisecond full-memory access, critical for real-time data retrieval in edge devices.
Does RM25C64C-BSNC-T require a high-voltage programming pulse like traditional EEPROMs?
No, RM25C64C-BSNC-T does not require high-voltage programming pulses. It uses Adesto's CBRAM® resistive switching technology, which operates with standard 1.65–3.6 V supply and performs direct-write operations without charge pumps or Fowler-Nordheim tunneling. This eliminates reliability risks associated with oxide stress and enables lower energy consumption - confirmed by the 50 nJ byte-write specification in the datasheet's Features section.
How many write cycles can RM25C64C-BSNC-T endure before failure?
RM25C64C-BSNC-T guarantees 100,000 write/erase cycles per memory location, as specified in the datasheet's Endurance table and compliant with JEDEC JESD22-A117B. This endurance rating applies to both byte and page write operations and is validated across the full operating temperature range (−40°C to +85°C), making it suitable for field-upgradable industrial and automotive applications.
What package types are available for RM25C64C-BSNC-T?
RM25C64C-BSNC-T is offered in 8-lead SOIC (Small Outline Integrated Circuit) package, as indicated by the "BSNC" suffix in the part number and confirmed in the Features section ("8-lead SOIC and TSSOP packages"). The SOIC variant has 150 mil body width and 1.27 mm lead pitch, ensuring compatibility with standard PCB assembly processes and footprint reuse across legacy EEPROM designs.
Can RM25C64C-BSNC-T be used with a 1.8 V microcontroller SPI interface?
Yes, RM25C64C-BSNC-T is fully compatible with 1.8 V microcontrollers. Its supply voltage range is 1.65 V to 3.6 V, and its input thresholds (VIL = 0.3×VCC, VIH = 0.7×VCC) ensure robust logic-level recognition at 1.8 V. DC characteristics in Table 3-1 confirm operation down to 1.65 V, and AC timing parameters (e.g., tSCKH/tSCKL = 7.5 ns) remain valid across the entire voltage range - enabling direct interfacing without level shifters.
RM25C64C-BSNC-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- Mavriq™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- CBRAM®
- Technology:
- CBRAM
- Memory Size:
- 64Kbit
- Memory Organization:
- 32 Bytes Page Size
- Memory Interface:
- SPI
- Clock Frequency:
- 5 MHz
- Write Cycle Time - Word, Page:
- 100µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
RM25C64C-BSNC-T FAQ
1.How can I place an order for RM25C64C-BSNC-T through Aetrix?
Please submit a Request for Quotation (RFQ) for RM25C64C-BSNC-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RM25C64C-BSNC-T reliable?
The price and inventory of RM25C64C-BSNC-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RM25C64C-BSNC-T is usually 5 days.
3.What payment methods are accepted for RM25C64C-BSNC-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RM25C64C-BSNC-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RM25C64C-BSNC-T?
RM25C64C-BSNC-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RM25C64C-BSNC-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RM25C64C-BSNC-T?
For technical support, including RM25C64C-BSNC-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RM25C64C-BSNC-T requirements.
6.How does Aetrix verify that RM25C64C-BSNC-T is sourced from the original manufacturer or authorized distributors?
All RM25C64C-BSNC-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RM25C64C-BSNC-T meets industry standards.
7.What is the process for return or replacement of RM25C64C-BSNC-T?
All RM25C64C-BSNC-T units undergo pre-shipment inspection (PSI). If there is an issue with RM25C64C-BSNC-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RM25C64C-BSNC-T part is unused and in its original packaging.
Return procedure for RM25C64C-BSNC-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
RM25C64C-BSNC-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

.jpg)