My Inquiry
My Account
Renesas RM25C64C-LTAI-T
- Part No.:
- RM25C64C-LTAI-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
RM25C64C-LTAI-T.pdf
- Description:
- IC CBRAM 64KBIT SPI 10MHZ 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,750
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
RM25C64C-LTAI-T from Adesto Technologies is a 64 Kbit non-volatile serial EEPROM memory IC based on CBRAM® resistive switching technology, operating from 1.65V to 3.6V supply, supporting SPI modes 0 and 3, with 10 MHz fast read capability and 32-byte page write - deployed in ultra-low-power IoT sensor nodes and industrial control firmware storage.
For engineers reviewing the RM25C64C-LTAI-T datasheet, RM25C64C-LTAI-T pinout, RM25C64C-LTAI-T application, or RM25C64C-LTAI-T equivalent, key selection criteria include its 2.2 µA power-down current, 100,000 write endurance, 10-year data retention, CBRAM-based low-energy byte write (50 nJ), and TSSOP-8 package compatibility with space-constrained embedded designs.
Technical Context
The RM25C64C-LTAI-T implements a 4-wire SPI interface (CS, SDO, SDI, SCK) with dual read modes: normal (≤1.6 MHz) and fast (≤10 MHz). It uses self-timed internal erase/write cycles and supports both byte-level (25 µs) and 32-byte page-level (1 ms) programming without external timing control.
Its CBRAM® memory array enables direct-write operation with no pre-erase requirement, and integrated status register (WIP/WEL/BP bits) plus hardware write protection via WP pin and SRWD bit provide configurable, multi-layer data integrity control for firmware and calibration storage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory density | 64 Kbit (8 KB) non-volatile storage - sufficient for bootloader code, device configuration, or sensor calibration tables in edge nodes. |
| Supply voltage range | 1.65 V to 3.6 V - compatible with single-cell Li-ion, coin-cell, and 3.3 V logic rails without level-shifting. |
| Fast read clock rate | Up to 10 MHz - enables rapid parameter retrieval in real-time control loops or high-throughput data logging. |
| Page size & write time | 32-byte pages written in ≤1 ms - reduces firmware update latency vs. legacy EEPROMs and improves system responsiveness. |
| Power-down current | 2.2 µA at 25°C - extends battery life in always-on, intermittently active devices such as smart meters or wearables. |
| Endurance & retention | 100,000 write cycles / 10-year data retention - meets industrial-grade reliability requirements for field-deployed equipment. |
| Interface standard | SPI-compatible (modes 0 and 3) - interoperable with ARM Cortex-M, RISC-V, and legacy microcontrollers without custom drivers. |
Pinout & Package
RM25C64C-LTAI-T is housed in an RoHS-compliant, halogen-free 8-pin TSSOP package (4.4 mm × 3.0 mm, 0.65 mm pitch), pin-compatible with industry-standard SOIC-8 footprints and optimized for automated PCB assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - CS | Chip Select | Active-low enable: pulls device out of standby; high-Z output when deasserted; critical for multi-slave SPI bus arbitration. |
| 2 - SDO | Serial Data Output | Tri-state CMOS output: delivers read data or status on SCK falling edge; requires external pull-up only if shared bus. |
| 3 - WP | Write Protect | Hardware lock: disables Status Register writes when SRWD=1 and WP=low - prevents accidental firmware corruption during power transients. |
| 4 - GND | Ground Reference | Primary return path for VCC and I/O; must be low-impedance connection to minimize noise coupling into CBRAM cell sensing. |
| 5 - SDI | Serial Data Input | CMOS input: accepts opcodes, addresses, and data on SCK rising edge; latching synchronized to master clock for deterministic timing. |
| 6 - SCK | Serial Clock | Asynchronous timing reference: supports 0–10 MHz; polarity selectable (mode 0/3) to match host MCU's SPI peripheral configuration. |
| 7 - HOLD | Communication Hold | Pauses ongoing SPI transfer without resetting state machine - enables priority interrupt handling in real-time systems. |
| 8 - VCC | Power Supply | 1.65–3.6 V input: includes internal VCC inhibit (1.55 V threshold) to block commands during brown-out, ensuring data integrity. |
Key Features
| Feature | Design Value |
|---|---|
| CBRAM® memory technology | Enables 10× lower byte-write energy (50 nJ) vs. conventional EEPROM - critical for energy-harvesting and battery-operated edge devices. |
| Ultra-deep power-down mode | 1.6 µA typical current draw with full command lockout - provides tamper-resistant sleep state for secure firmware storage. |
| Flexible block protection | BP0/BP1 bits + WP pin allow selective locking of top 4 KB, 8 KB, or full array - supports hierarchical firmware partitioning (e.g., bootloader vs. app). |
| Auto Power Down Enable (APDE) | Configurable low-frequency power gating: automatically enters power-down below 1 MHz SCK - eliminates software overhead for dynamic power management. |
| Fast sequential read | Entire 8 KB memory readable in one continuous SPI transaction - simplifies firmware update verification and bulk parameter loading. |
Applications
| Industrial Sensor Node | Medical Wearable |
|---|---|
Use Scenario: Long-term environmental monitoring using battery-powered temperature/humidity sensors with periodic firmware updates. IC Role / Device Role / Timing Role: Non-volatile storage for calibration coefficients, device ID, and over-the-air (OTA) update staging area. Use Value: 100,000 write cycles and 10-year retention ensure field-deployed units maintain accuracy across multi-year service life without recalibration. |
Use Scenario: Continuous physiological data logging in ECG patches powered by thin-film batteries. IC Role / Device Role / Timing Role: Low-energy parameter storage for sampling rate, gain settings, and patient-specific thresholds. Use Value: 2.2 µA power-down current extends usable battery life beyond 90 days while preserving critical health data between sync events. |
| Smart Meter Firmware | Automotive Body Control Module |
Use Scenario: Utility-grade electricity meter requiring secure, field-upgradable firmware and tariff tables. IC Role / Device Role / Timing Role: Trusted storage for encrypted firmware images and regulatory compliance data with hardware write lock. Use Value: WP pin + SRWD bit combination prevents unauthorized writes during voltage sags or ESD events - meeting IEC 62056-61 security requirements. |
Use Scenario: In-vehicle seat position memory and lighting profile storage in 12 V automotive systems with wide-temp operation. IC Role / Device Role / Timing Role: Configuration storage accessible across -40°C to +85°C ambient, surviving load-dump transients. Use Value: Guaranteed operation at 1.65 V minimum supply allows reliable access during cold-cranking conditions where battery voltage dips below 2 V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4 Mbit NOR flash; 3.0–3.6 V only; no fast read mode; 100 µA standby current. | Requires sector erase before reprogramming; unsuitable for frequent small-parameter updates. | Choose only if higher density and execute-in-place (XIP) capability are required - not a drop-in replacement. |
| M95M04-DRMN6TP/K | 4 Mbit EEPROM; 1.8–5.5 V; 1 MHz max SPI clock; 5 µA standby current; SO8 package. | Higher voltage range but slower interface and 10× higher write energy - increases system power budget. | Prefer for legacy 5 V designs or where AEC-Q100 qualification is mandatory; otherwise RM25C64C-LTAI-T offers superior energy efficiency. |
Compared with AT25DF041A-SSH-T and M95M04-DRMN6TP/K, RM25C64C-LTAI-T delivers optimal balance of ultra-low write energy, wide voltage operation, and fast read performance - making it the preferred choice for battery-constrained, high-reliability embedded systems requiring frequent small-data updates.
Availability
RM25C64C-LTAI-T is available at Aetrix Electronics and suitable for industrial sensor nodes, medical wearables, smart meter firmware storage, and automotive body control modules requiring stable component supply across extended product lifecycles.
Supply support for RM25C64C-LTAI-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Adesto Technologies (acquired by Dialog Semiconductor in 2020, now part of Renesas Electronics) specialized in ultra-low-power non-volatile memory solutions for IoT and industrial edge applications.
The RM25C-Series was designed specifically for energy-constrained embedded systems needing reliable, high-endurance, low-voltage serial memory - leveraging CBRAM® to overcome limitations of traditional floating-gate EEPROM and flash.
FAQ
What is the maximum SPI clock frequency supported by RM25C64C-LTAI-T in fast read mode?
The RM25C64C-LTAI-T supports up to 10 MHz SCK frequency in fast read mode (FREAD command), enabling high-throughput data retrieval for time-sensitive applications like real-time sensor fusion or firmware validation. This is double the 1.6 MHz limit of normal read mode and requires CL = 10 pF load per datasheet AC specifications.
Does RM25C64C-LTAI-T require external high-voltage programming circuitry?
No, RM25C64C-LTAI-T operates entirely from its 1.65–3.6 V VCC supply - no external charge pump or HV generator is needed. Its CBRAM® technology enables direct-write operation with internal voltage boosting, simplifying board design and reducing BOM cost compared to legacy EEPROMs requiring 12 V programming pulses.
How does the Write Protect (WP) pin function on RM25C64C-LTAI-T?
On RM25C64C-LTAI-T, the WP pin controls Status Register writability when SRWD = 1: if WP is low, the Status Register is locked against modification; if WP is high, the Status Register remains writable regardless of SRWD. This hardware lock prevents accidental changes to block protection bits during power instability or ESD events.
What is the page size and write time for RM25C64C-LTAI-T?
The RM25C64C-LTAI-T has a fixed 32-byte page size, and a full page write completes in ≤1 ms. This is 4–6× faster than comparable EEPROMs and enables efficient firmware patching or bulk configuration updates without blocking the host MCU for extended periods.
Can RM25C64C-LTAI-T retain data for 10 years at elevated temperature?
Yes, RM25C64C-LTAI-T guarantees 10-year data retention at +85°C ambient per JEDEC JESD22-A117B testing methodology. Its CBRAM® cell structure exhibits superior thermal stability vs. floating-gate technologies, making it suitable for under-hood automotive or industrial enclosure deployments.
RM25C64C-LTAI-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- Mavriq™
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- CBRAM®
- Technology:
- CBRAM
- Memory Size:
- 64Kbit
- Memory Organization:
- 32 Bytes Page Size
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 100µs, 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.65V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
RM25C64C-LTAI-T FAQ
1.How can I place an order for RM25C64C-LTAI-T through Aetrix?
Please submit a Request for Quotation (RFQ) for RM25C64C-LTAI-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RM25C64C-LTAI-T reliable?
The price and inventory of RM25C64C-LTAI-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RM25C64C-LTAI-T is usually 5 days.
3.What payment methods are accepted for RM25C64C-LTAI-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RM25C64C-LTAI-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RM25C64C-LTAI-T?
RM25C64C-LTAI-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RM25C64C-LTAI-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RM25C64C-LTAI-T?
For technical support, including RM25C64C-LTAI-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RM25C64C-LTAI-T requirements.
6.How does Aetrix verify that RM25C64C-LTAI-T is sourced from the original manufacturer or authorized distributors?
All RM25C64C-LTAI-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RM25C64C-LTAI-T meets industry standards.
7.What is the process for return or replacement of RM25C64C-LTAI-T?
All RM25C64C-LTAI-T units undergo pre-shipment inspection (PSI). If there is an issue with RM25C64C-LTAI-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RM25C64C-LTAI-T part is unused and in its original packaging.
Return procedure for RM25C64C-LTAI-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
RM25C64C-LTAI-T Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
