My Inquiry
My Account
NXP Semiconductors RW612CHN/A2IK
- Part No.:
- RW612CHN/A2IK
- Manufacturer:
- NXP Semiconductors
- Category:
- RF Transceiver ICs
- Package:
- -
- Datasheet:
-
RW612CHN/A2IK.pdf
- Description:
- RW612CHN/A2IK
- Quantity:
- Payment:
- Shipping:
Inventory:2,480
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
RW612CHN/A2IK from NXP Semiconductors is a secure tri-radio wireless MCU integrating a 260 MHz Arm Cortex-M33 with TrustZone-M, 1.2 MB on-chip SRAM, and concurrent 2.4/5 GHz Wi-Fi 6 (802.11ax), Bluetooth 5.2, and 802.15.4 radios - enabling Matter-over-Wi-Fi/Thread operation in smart home hubs and industrial gateways.
For engineers reviewing the RW612CHN/A2IK datasheet, RW612CHN/A2IK pinout, RW612CHN/A2IK application, or RW612CHN/A2IK equivalent, key selection criteria include dual-band Wi-Fi 6 throughput (MCS9), +21 dBm integrated PA output, EdgeLock® security certification (PSA L3/SESIP L3), 145-pin TFBGA package, and Matter Controller/Border Router capability.
Technical Context
The RW612CHN/A2IK implements a tightly coupled tri-radio architecture: its Wi-Fi 6 subsystem delivers 1×1 20 MHz dual-band operation with target wake time and dual-carrier modulation; Bluetooth 5.2 and 802.15.4 share a unified RF front-end supporting Thread 1.3.2 and Zigbee 3.0 concurrently.
Security is hardware-rooted via EdgeLock® with PUF-based key generation, secure boot enforcing signed firmware images, and TrustZone-M isolating secure/non-secure execution environments - all validated to PSA Level 3 and SESIP Level 3 standards.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| MCU Core | 260 MHz Arm Cortex-M33 with TrustZone-M for secure partitioning of firmware and peripherals |
| Wi-Fi Radio | 1×1 dual-band (2.4/5 GHz) 802.11ax at MCS9, +21 dBm Tx power with integrated PA/LNA/T/R switch |
| Bluetooth & 802.15.4 | Bluetooth 5.2 + IEEE 802.15.4 PHY/MAC supporting Thread 1.3.2 and Zigbee 3.0 simultaneously |
| Memory | 1.2 MB on-chip SRAM; Quad FlexSPI with on-the-fly AES decryption for secure XIP flash access |
| Security | EdgeLock® certified (PSA L3, SESIP L3); hardware crypto accelerators (AES/SHA/ECC/RSA); PUF for key binding |
| Package | 145-pin TFBGA, 8 mm × 8 mm, 0.5 mm pitch, industrial temperature range (−40°C to +85°C) |
Pinout & Package
Package: 145-pin Thin Fine-Pitch Ball Grid Array (TFBGA), 8 mm × 8 mm, 0.5 mm ball pitch, 0.8 mm height, lead-free and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_3V3 | Main power supply input | Single 3.3 V external supply powers entire SoC including radios and MCU subsystems |
| WIFI_ANT | Wi-Fi RF antenna interface | Differential 50 Ω port supporting 2.4/5 GHz bands; internal matching enables direct PCB trace connection |
| BT_ZIG_ANT | BT/802.15.4 RF antenna interface | Shared single-ended 50 Ω port for Bluetooth LE and 802.15.4; supports concurrent operation via time-division |
| RESET_B | Active-low system reset | Asynchronous reset input; assertion forces full cold boot with EdgeLock® secure boot verification |
| BOOT_MODE[1:0] | Boot configuration pins | Defines boot source (FlexSPI flash, UART, USB) and secure boot enforcement level at power-on |
Key Features
| Feature | Design Value |
|---|---|
| Matter-ready tri-radio stack | Native support for Matter over Wi-Fi and Thread - enables RW612CHN/A2IK to function as Controller, Border Router, or Bridge without external protocol translation |
| Secure boot & update | Hardware-enforced chain-of-trust using immutable ROM bootloader, signed firmware images, and rollback protection verified by EdgeLock® |
| Integrated RF front-end | On-die PA (+21 dBm Wi-Fi, +15 dBm BT/802.15.4), LNA, and T/R switch eliminate discrete RF components and reduce BOM count |
| Low-power subsystem control | Independent power domains per radio and MCU allow selective wake-up via GPIO/IRQ/RTC - enabling sub-μA deep-sleep current in sensor-hub applications |
| Encrypted XIP flash interface | Quad FlexSPI with real-time AES-128 decryption enables secure code execution directly from external flash - no RAM loading required |
Applications
| Smart Home Hub | Industrial Gateway |
|---|---|
Use Scenario: Central hub coordinating Matter-enabled lighting, HVAC, and security devices across Wi-Fi and Thread networks. IC Role / Device Role / Timing Role: RW612CHN/A2IK acts as Matter Controller and Thread Border Router - bridging local Thread mesh to cloud via Wi-Fi. Use Value: Eliminates need for separate Wi-Fi and Thread SoCs; reduces latency in local command execution by >40% vs. gateway-to-cloud round-trip. | Use Scenario: Edge gateway aggregating Modbus RTU sensors and OPC UA endpoints in factory automation. IC Role / Device Role / Timing Role: RW612CHN/A2IK serves as secure protocol translator and OTA update endpoint - hosting Zephyr-based edge middleware. Use Value: Hardware-accelerated TLS 1.3 and secure firmware updates ensure compliance with IEC 62443-3-3 SL2 requirements. |
| Medical Wearable Gateway | EV Charging Station Controller |
Use Scenario: Portable hub collecting BLE medical data (ECG, SpO₂) and forwarding to HIPAA-compliant cloud via encrypted Wi-Fi. IC Role / Device Role / Timing Role: RW612CHN/A2IK functions as BLE central + Wi-Fi client with EdgeLock®-secured key storage for HIPAA audit logs. Use Value: PUF-derived keys prevent extraction during physical tampering - meeting FDA cybersecurity guidance for Class II devices. | Use Scenario: Smart charging station managing OCPP 2.0 communication, load balancing, and user authentication. IC Role / Device Role / Timing Role: RW612CHN/A2IK hosts OCPP stack and performs secure certificate management using EdgeLock®-provisioned keys. Use Value: PSA L3-certified secure boot ensures only authorized firmware executes - preventing remote compromise of grid-critical infrastructure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar tri-radio wireless MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESP32-H2 (Espressif) | Single-band 2.4 GHz 802.15.4 + BLE 5.0 only; no Wi-Fi 6 or 5 GHz support; lacks PSA L3/SESIP L3 certification | Suitable for cost-sensitive Thread-only nodes; not viable for Matter-over-Wi-Fi or dual-band coexistence | Select ESP32-H2 only when Wi-Fi 6 and 5 GHz operation are unnecessary and security certification is not mandated. |
| QCA4024 (Qualcomm) | Wi-Fi 4 + BLE 4.2 only; no 802.15.4/Thread support; no TrustZone-M or hardware PUF; limited memory (512 KB SRAM) | Applicable for legacy Wi-Fi/BLE gateways; cannot implement Matter or modern Thread mesh topologies | Choose QCA4024 only for brownfield deployments requiring backward compatibility with existing Wi-Fi 4 infrastructure. |
Compared with ESP32-H2 and QCA4024, the RW612CHN/A2IK uniquely integrates Wi-Fi 6, Bluetooth 5.2, and 802.15.4 in one die with PSA L3-certified security - enabling Matter end-to-end deployment without protocol bridges or external security ICs.
Availability
RW612CHN/A2IK is available at Aetrix Electronics and suitable for smart home hubs, industrial gateways, EV charging controllers, and medical wearable gateways requiring stable component supply, long-term lifecycle support, and certified security features.
Supply support for RW612CHN/A2IK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The RW612CHN/A2IK belongs to NXP's RW61x family of secure wireless MCUs, designed specifically to accelerate Matter ecosystem adoption through hardware-integrated tri-radio concurrency and PSA-certified security.
FAQ
Does RW612CHN/A2IK support Matter over both Wi-Fi and Thread simultaneously?
Yes, RW612CHN/A2IK natively supports Matter over Wi-Fi and Thread concurrently. Its integrated tri-radio architecture allows it to operate as a Matter Controller over Wi-Fi while simultaneously acting as a Thread Border Router - enabling seamless interoperability between Matter devices on different network layers without external protocol translation hardware or software bridges.
What security certifications apply to RW612CHN/A2IK?
RW612CHN/A2IK is certified to PSA Certified Level 3 and SESIP Level 3 under the NXP EdgeLock Assurance program. It includes hardware root of trust, secure boot with rollback protection, secure debug disable, and PUF-based key generation - all validated against Common Criteria-aligned evaluation methodologies for secure IoT silicon.
Is RW612CHN/A2IK pin-compatible with other RW61x variants like RW610?
No, RW612CHN/A2IK is not pin-compatible with RW610. The RW612CHN/A2IK uses a 145-pin TFBGA package optimized for tri-radio integration, while RW610 uses a 116-pin HVQFN package supporting only Wi-Fi 6 + Bluetooth LE. Pin counts, ball layouts, and RF interface assignments differ significantly between the two families.
What development tools are supported for RW612CHN/A2IK?
RW612CHN/A2IK is fully supported by NXP's MCUXpresso SDK with FreeRTOS and Zephyr RTOS ecosystems. Development includes MCUXpresso IDE, configuration tools, debug probes (LPC-Link2), and middleware for Matter, Thread, and Wi-Fi 6 - all accessible via nxp.com/RW612 and the MCUXpresso portal.
Can RW612CHN/A2IK operate from a single 3.3 V supply?
Yes, RW612CHN/A2IK is designed to operate entirely from a single 3.3 V external supply. Its integrated buck regulators and LDOs generate all internal voltage domains - eliminating the need for multiple external power rails and simplifying power design for compact IoT products.
RW612CHN/A2IK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Type:
- -
- RF Family/Standard:
- -
- Protocol:
- -
- Modulation:
- -
- Frequency:
- -
- Data Rate (Max):
- -
- Power - Output:
- -
- Sensitivity:
- -
- Memory Size:
- -
- Serial Interfaces:
- -
- GPIO:
- -
- Voltage - Supply:
- -
- Current - Receiving:
- -
- Current - Transmitting:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
RW612CHN/A2IK FAQ
1.How can I place an order for RW612CHN/A2IK through Aetrix?
Please submit a Request for Quotation (RFQ) for RW612CHN/A2IK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RW612CHN/A2IK reliable?
The price and inventory of RW612CHN/A2IK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RW612CHN/A2IK is usually 5 days.
3.What payment methods are accepted for RW612CHN/A2IK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RW612CHN/A2IK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RW612CHN/A2IK?
RW612CHN/A2IK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RW612CHN/A2IK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RW612CHN/A2IK?
For technical support, including RW612CHN/A2IK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RW612CHN/A2IK requirements.
6.How does Aetrix verify that RW612CHN/A2IK is sourced from the original manufacturer or authorized distributors?
All RW612CHN/A2IK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RW612CHN/A2IK meets industry standards.
7.What is the process for return or replacement of RW612CHN/A2IK?
All RW612CHN/A2IK units undergo pre-shipment inspection (PSI). If there is an issue with RW612CHN/A2IK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RW612CHN/A2IK part is unused and in its original packaging.
Return procedure for RW612CHN/A2IK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
RW612CHN/A2IK Tags
-
ESP32-D0WD-V3
Espressif Systems
-
ESP8266EX
Espressif Systems
-
ESP32-S3
Espressif Systems
-
NRF24L01P-R7
Nordic Semiconductor ASA
-
NRF24L01P-R
Nordic Semiconductor ASA
-
ESP32-U4WDH
Espressif Systems
-
DA14531-00000OG2
Renesas
-
ESP32-C6FH4
Espressif Systems
-
DA14531-00000FX2
Renesas
-
NRF24L01P-T
Nordic Semiconductor ASA
-
NRF52810-QCAA-R
Nordic Semiconductor ASA
-
ESP32-S3FN8
Espressif Systems
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
