NXP Semiconductors RW612HN/A2IMP
- Part No.:
- RW612HN/A2IMP
- Manufacturer:
- NXP Semiconductors
- Category:
- RF Transceiver ICs
- Package:
- -
- Datasheet:
-
RW612HN/A2IMP.pdf
- Description:
- RW612HN/A2IMP
- Quantity:
- Payment:

- Shipping:

Inventory:2,096
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
RW612HN/A2IMP from NXP Semiconductors is a secure tri-radio wireless MCU integrating a 260 MHz Arm Cortex-M33 with TrustZone-M, 1.2 MB on-chip SRAM, and concurrent 2.4/5 GHz Wi-Fi 6 (802.11ax), Bluetooth 5.2, and 802.15.4 radios - enabling Matter-over-Wi-Fi/Thread operation in smart home hubs and industrial gateways.
For engineers reviewing the RW612HN/A2IMP datasheet, RW612HN/A2IMP pinout, RW612HN/A2IMP application, or RW612HN/A2IMP equivalent, key selection considerations include its single 3.3 V supply operation, integrated EdgeLock security (PSA L3/SESIP L3 certified), dual-band Wi-Fi 6 TX power up to +21 dBm, Bluetooth LE 2 Mbps mode, and Thread/Zigbee-ready 802.15.4 RF with +15 dBm output.
Technical Context
The RW612HN/A2IMP implements a tightly coupled tri-radio architecture: Wi-Fi 6 MAC/baseband and RF operate independently from Bluetooth LE/802.15.4 link layer and RF, both sharing dedicated CPUs and hardware accelerators. Its Arm Cortex-M33 core executes firmware with TrustZone-M isolation for secure boot, debug, and OTA updates.
Power management includes independent subsystem wake-up via GPIO/IRQ/RTC, low-leakage always-on domain, and integrated buck regulators/LDOs - enabling ultra-low-power operation across radio and MCU domains without external PMIC support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| MCU Core | 260 MHz Arm Cortex-M33 with TrustZone-M for hardware-enforced secure execution environment |
| Wi-Fi Radio | 1×1 dual-band (2.4/5 GHz) IEEE 802.11ax, MCS9, +21 dBm TX power with integrated PA/LNA/T-R switch |
| Bluetooth & 802.15.4 | Bluetooth 5.2 + 802.15.4 PHY/MAC supporting Thread 1.3.1 and Zigbee 3.0, +15 dBm TX output |
| Memory | 1.2 MB on-chip SRAM; Quad FlexSPI with on-the-fly decryption for secure XIP flash/PSRAM expansion |
| Security | EdgeLock Assurance (PSA L3/SESIP L3), hardware AES/SHA/ECC/RSA, TRNG, PUF, secure boot/debug/update |
| Package | 145-pin TFBGA, 8 mm × 8 mm, 0.5 mm pitch, industrial temperature range (−40°C to +85°C) |
Pinout & Package
Package: 145-pin Thin Fine-Pitch Ball Grid Array (TFBGA), 8 mm × 8 mm, 0.5 mm ball pitch, 0.8 mm height, RoHS-compliant, lead-free matte tin finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_3V3 | Main power supply input | Single 3.3 V supply powers entire device including all radios and MCU subsystems |
| RF_ANT | Wi-Fi 6 RF antenna interface | Dual-band (2.4/5 GHz) differential RF port supporting internal PA/LNA/T-R switch |
| BT_ZIG_ANT | BLE/802.15.4 RF antenna interface | Shared single-ended RF port for Bluetooth LE 5.2 and 802.15.4 transceivers |
| XTAL_IN / XTAL_OUT | Crystal oscillator reference | Supports 32 MHz fundamental-mode crystal for system clock and radio timing accuracy |
| GPIO_00–GPIO_47 | Configurable digital I/O | Multi-function pins supporting FlexComm (UART/SPI/I2C/I2S), RMII, LCD, SDIO, USB OTG |
Key Features
| Feature | Design Value |
|---|---|
| Matter-ready tri-radio stack | Native support for Matter over Wi-Fi and Thread - enables RW612HN/A2IMP to serve as Controller, Border Router, or Bridge without external protocol translation |
| Secure boot & provisioning | Hardware root of trust with PUF-based key generation and EdgeLock 2GO Trust Provisioning for zero-touch secure onboarding |
| Low-power subsystem control | Independent power domains per radio and MCU allow selective wake-up via dedicated IRQ/GPIO/RTC - no full-chip wake required |
| Encrypted XIP memory interface | Quad FlexSPI with real-time AES-128 decryption enables secure off-chip code execution from flash/PSRAM without exposing plaintext firmware |
| Integrated RF front-end | On-die PA, LNA, and T-R switch eliminate external RF components for both Wi-Fi 6 and BLE/802.15.4 paths - reducing BOM and layout complexity |
Applications
| Smart Home Hub | Industrial Gateway |
|---|---|
Use Scenario: Central Matter-compatible hub coordinating Wi-Fi, Thread, and BLE devices across lighting, HVAC, and security sensors. IC Role / Device Role / Timing Role: Tri-radio wireless MCU acting as Matter Controller and Thread Border Router with synchronized timekeeping via IEEE 1588-capable Ethernet RMII. Use Value: Eliminates need for discrete Wi-Fi + Thread + BLE SoCs and external security ICs - reduces bill-of-materials by ≥30% and PCB area by 45%. | Use Scenario: Edge gateway connecting legacy Modbus/RS485 field devices to cloud platforms via secure Wi-Fi 6 and cellular backhaul. IC Role / Device Role / Timing Role: Secure wireless MCU providing isolated communication stacks, hardware-accelerated TLS, and deterministic low-latency packet forwarding. Use Value: Enables end-to-end encrypted data path from sensor node to cloud using EdgeLock-certified secure boot and OTA update integrity verification. |
| Medical Wearable Gateway | EV Charging Station Controller |
Use Scenario: Portable clinical gateway aggregating Bluetooth LE medical sensors (ECG, SpO₂) and relaying data via Wi-Fi 6 to hospital EMR systems. IC Role / Device Role / Timing Role: Low-power tri-radio MCU managing concurrent BLE sensor polling and high-throughput Wi-Fi 6 upload with precise timestamping via RTC and 1588 support. Use Value: Achieves <100 ms end-to-end latency from sensor acquisition to cloud ingestion while maintaining HIPAA-aligned cryptographic key protection. | Use Scenario: Smart EVSE controller implementing OCPP 2.0.1 over Wi-Fi 6 and local energy management via Thread-connected smart meters and solar inverters. IC Role / Device Role / Timing Role: Wireless MCU executing OCPP stack, Matter-over-Thread commissioning, and real-time load balancing with hardware crypto acceleration. Use Value: Supports UL 1998/UL 62368-1 compliance through PSA L3-certified secure lifecycle management and tamper-resistant firmware signing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar tri-radio wireless MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESP32-H2 (Espressif) | Single-band 2.4 GHz 802.15.4 only; no Wi-Fi or Bluetooth LE; 32-bit RISC-V core at 192 MHz; 320 KB SRAM | Limited to Thread/Zigbee mesh nodes - cannot serve as Matter Controller or Wi-Fi client | Select when cost-sensitive, low-complexity Thread-only edge nodes are required without cloud connectivity or multi-protocol bridging |
| QCA4020 (Qualcomm) | Wi-Fi 4 (802.11n) + BLE 4.2 only; no 802.15.4/Thread; 120 MHz ARM Cortex-M4; 256 KB SRAM; no PSA/SESIP certification | Suitable for legacy Wi-Fi/BLE smart appliances but lacks Matter readiness and hardware security certification | Choose only for brownfield designs requiring backward compatibility with pre-Matter ecosystems and minimal security requirements |
Compared with ESP32-H2 and QCA4020, the RW612HN/A2IMP uniquely delivers certified Matter-over-Wi-Fi/Thread functionality, PSA L3/SESIP L3 security, and integrated tri-radio RF front-ends - enabling single-chip Matter Controller, Border Router, and Bridge deployment without external RF components or security co-processors.
Availability
RW612HN/A2IMP is available at Aetrix Electronics and suitable for smart home hubs, industrial gateways, and EV charging station controllers requiring stable component supply, long-term lifecycle support, and traceable secure sourcing.
Supply support for RW612HN/A2IMP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with headquarters in Eindhoven, Netherlands.
The RW612HN/A2IMP belongs to NXP's RW61x family of secure wireless MCUs designed specifically for Matter-certified, multi-protocol IoT edge devices requiring hardware-rooted security, low-power tri-radio convergence, and industrial-grade reliability.
FAQ
What is the primary function of the RW612HN/A2IMP in an IoT system?
The RW612HN/A2IMP serves as a secure, tri-radio wireless MCU enabling Matter-over-Wi-Fi and Matter-over-Thread operation. It functions as a Matter Controller, Thread Border Router, or Matter Bridge - allowing unified control and interoperability across Apple Home, Google Home, and Amazon Alexa ecosystems. Its integrated Arm Cortex-M33, Wi-Fi 6, Bluetooth 5.2, and 802.15.4 radios eliminate the need for multiple discrete wireless chips in smart home and industrial gateways. The RW612HN/A2IMP is engineered for end-to-end secure device onboarding and authenticated communication.
Does the RW612HN/A2IMP support Matter certification out of the box?
Yes, the RW612HN/A2IMP supports Matter certification natively through its hardware-accelerated security engine and pre-integrated software stack. It meets all mandatory Matter requirements including secure boot, PSA L3/SESIP L3-certified cryptography, and concurrent Wi-Fi 6 and Thread 1.3.1 operation. NXP provides Matter SDKs and reference implementations validated for certification testing. The RW612HN/A2IMP has been used in certified Matter products such as smart hubs and border routers - confirming its readiness for production-level Matter deployment.
What power supply configuration does the RW612HN/A2IMP require?
The RW612HN/A2IMP operates from a single 3.3 V external supply, eliminating the need for multiple voltage rails or external PMICs. Internal integrated buck regulators and LDOs generate all required core, I/O, and radio domain voltages. This simplifies power design and reduces BOM count. The RW612HN/A2IMP supports multiple low-power modes with individual subsystem wake-up via GPIO, IRQ, or RTC - enabling sub-μA sleep current in always-on configurations. Its power architecture is validated for industrial temperature operation (−40°C to +85°C).
How does the RW612HN/A2IMP handle secure firmware updates?
The RW612HN/A2IMP performs secure firmware updates using EdgeLock security technology: updates are cryptographically signed and verified by the hardware root of trust before execution. The PUF-generated keys protect update payloads during transmission and storage. Secure debug is disabled post-deployment unless authorized via secure provisioning. All update stages - download, authentication, decryption, and installation - occur within the TrustZone-M protected environment. The RW612HN/A2IMP supports delta updates and rollback protection, ensuring resilience against malicious or corrupted firmware revisions.
Which development tools and OS support are available for the RW612HN/A2IMP?
NXP provides MCUXpresso SDK with FreeRTOS-based middleware, Zephyr RTOS integration, and comprehensive drivers for all peripherals including Wi-Fi 6, Bluetooth LE, and 802.15.4 stacks. Development is supported via MCUXpresso IDE, J-Link debug probes, and official evaluation kits (e.g., RW612-EVK). The RW612HN/A2IMP is fully compatible with Matter SDK v1.3+ and Thread certification test suites. NXP also offers EdgeLock 2GO cloud provisioning services and secure key injection workflows - all documented in the RW612HN/A2IMP reference manuals and application notes.
RW612HN/A2IMP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- -
- RF Family/Standard:
- -
- Protocol:
- -
- Modulation:
- -
- Frequency:
- -
- Data Rate (Max):
- -
- Power - Output:
- -
- Sensitivity:
- -
- Memory Size:
- -
- Serial Interfaces:
- -
- GPIO:
- -
- Voltage - Supply:
- -
- Current - Receiving:
- -
- Current - Transmitting:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
RW612HN/A2IMP FAQ
1.How can I place an order for RW612HN/A2IMP through Aetrix?
Please submit a Request for Quotation (RFQ) for RW612HN/A2IMP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RW612HN/A2IMP reliable?
The price and inventory of RW612HN/A2IMP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RW612HN/A2IMP is usually 5 days.
3.What payment methods are accepted for RW612HN/A2IMP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RW612HN/A2IMP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RW612HN/A2IMP?
RW612HN/A2IMP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RW612HN/A2IMP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RW612HN/A2IMP?
For technical support, including RW612HN/A2IMP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RW612HN/A2IMP requirements.
6.How does Aetrix verify that RW612HN/A2IMP is sourced from the original manufacturer or authorized distributors?
All RW612HN/A2IMP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RW612HN/A2IMP meets industry standards.
7.What is the process for return or replacement of RW612HN/A2IMP?
All RW612HN/A2IMP units undergo pre-shipment inspection (PSI). If there is an issue with RW612HN/A2IMP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RW612HN/A2IMP part is unused and in its original packaging.
Return procedure for RW612HN/A2IMP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
RW612HN/A2IMP Tags

-
ESP32-D0WD-V3
Espressif Systems

-
ESP8266EX
Espressif Systems

-
ESP32-S3
Espressif Systems

-
NRF24L01P-R7
Nordic Semiconductor ASA

-
NRF24L01P-R
Nordic Semiconductor ASA

-
ESP32-U4WDH
Espressif Systems

-
DA14531-00000OG2
Renesas

-
ESP32-C6FH4
Espressif Systems

-
DA14531-00000FX2
Renesas

-
NRF24L01P-T
Nordic Semiconductor ASA

-
NRF52810-QCAA-R
Nordic Semiconductor ASA

-
ESP32-S3FN8
Espressif Systems
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
