Infineon Technologies S25FS128SAGMFB103
- Part No.:
- S25FS128SAGMFB103
- Manufacturer:
- Infineon Technologies
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
S25FS128SAGMFB103.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,027
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Product details
Overview
S25FS128SAGMFB103 from Infineon is a 128 Mbit (16 MB) serial NOR flash memory with SPI Multi-I/O interface, operating at 1.8 V supply. It supports Normal/Fast/Dual/Quad/DDR Quad I/O read modes, 24-/32-bit addressing, hardware ECC, and hybrid/uniform sector erase options. Designed for boot code storage in industrial microcontroller systems requiring XIP capability and AEC-Q100 Grade 2 temperature operation (–40°C to +105°C).
For engineers reviewing the S25FS128SAGMFB103 datasheet, S25FS128SAGMFB103 pinout, S25FS128SAGMFB103 application, or S25FS128SAGMFB103 equivalent, key selection criteria include DDR Quad I/O read bandwidth (80 MBps), 100,000 program-erase cycles, OTP array size (1024 bytes), block protection granularity, and WSON 6 × 8 mm package compatibility with legacy S25FL-S footprints.
Technical Context
This device implements Infineon's Eclipse architecture with 65-nm MIRRORBIT™ technology, enabling true single-bit ECC correction and erase suspend/resume functionality. It supports both SDR and DDR SPI protocols across clock polarity modes 0 and 3, with configurable burst wrap and continuous XIP execution.
The flash integrates SFDP v1.6 and CFI for standardized configuration discovery, and uses dual-bank architecture to enable concurrent read-while-write operations. Sector protection is implemented via status register bits, hardware WP# pin control, and advanced password-protected ASP for individual sector lockdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Density | 128 Mbit (16 MB) - fixed capacity for boot image and firmware storage in resource-constrained embedded hosts |
| Supply Voltage | 1.7 V to 2.0 V - optimized for low-power 1.8 V system rails with ±0.15 V tolerance |
| Read Bandwidth | 80 MBps (DDR Quad I/O @ 80 MHz) - enables fast code execution directly from flash (XIP) without local RAM buffering |
| Erase Endurance | 100,000 cycles minimum - supports field firmware updates over full product lifecycle in industrial gateways |
| Data Retention | 20 years minimum at +85°C - ensures long-term reliability of stored calibration data and security keys |
| Temperature Grade | Industrial Plus (–40°C to +105°C) - qualified for under-hood automotive ECUs and high-ambient industrial controllers |
| Package | WSON 6 × 8 mm (WNH008) - 8-pin, exposed pad, Pb-free, footprint-compatible with S25FL-S family |
Pinout & Package
Package: WSON 6 × 8 mm (WNH008), 8-pin, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS#) | Chip Select | Active-low enable for SPI command decoding; must be held low during entire transaction |
| 2 (DO / IO1) | Serial Output / I/O1 | Primary data output in standard SPI; bidirectional in Dual/Quad I/O modes |
| 3 (WP# / IO2) | Write Protect / I/O2 | Hardware lock for status register and sector protection; functions as I/O2 in multi-I/O commands |
| 4 (VSS) | Ground | Signal and power reference plane; connects to exposed thermal pad for thermal dissipation |
| 5 (VCC) | Power Supply | 1.8 V core and I/O supply; requires local 1 µF ceramic decoupling adjacent to pin |
| 6 (SI / IO0) | Serial Input / I/O0 | Command/address/data input in standard SPI; bidirectional in multi-I/O modes |
| 7 (SCK) | Serial Clock | Edge-triggered clock input; supports up to 133 MHz SDR or 80 MHz DDR operation |
| 8 (RESET# / IO3) | Reset / I/O3 | Hardware reset assertion; functions as I/O3 in Quad/DDR modes; internal pull-up enabled |
Key Features
| Feature | Design Value |
|---|---|
| DDR Quad I/O Read | 80 MBps throughput enables real-time XIP execution of 32-bit instruction streams in Cortex-M7/M33 applications |
| Hardware ECC | On-the-fly single-bit error correction eliminates need for external error-handling logic or software overhead |
| Erase Suspend/Resume | Allows background erase interruption to service time-critical read requests without data corruption |
| OTP Array | 1024-byte one-time programmable region stores immutable cryptographic keys and device-specific identifiers |
| ASP Protection | Password-controlled per-sector lockdown prevents unauthorized firmware modification or reverse engineering of boot code |
Applications
| Automotive Engine Control Unit (ECU) | Industrial PLC Firmware Storage |
|---|---|
Use Scenario: Storing boot loader and safety-critical engine calibration maps in AEC-Q100 Grade 2 ECU modules. IC Role / Device Role / Timing Role: Primary nonvolatile code storage with XIP support and hardware ECC for ASIL-B compliance. Use Value: 20-year data retention and 100K erase cycles ensure firmware integrity over 15+ year vehicle service life. | Use Scenario: Holding firmware images and configuration parameters in modular programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Boot memory with uniform 256 KB erase blocks for deterministic OTA update timing. Use Value: DDR Quad I/O read bandwidth reduces boot time by >40% versus legacy SPI flash in ARM Cortex-A9-based PLCs. |
| Medical Imaging System Boot Memory | Smart Grid RTU Code Storage |
Use Scenario: Secure boot image storage in FDA-cleared diagnostic imaging equipment requiring tamper-resistant firmware. IC Role / Device Role / Timing Role: Trusted boot source with OTP key storage and ASP-enabled sector lockdown for HIPAA-compliant data handling. Use Value: Password-protected ASP prevents unauthorized reprogramming of safety-critical boot sequences during field servicing. | Use Scenario: Firmware and communication stack storage in remote terminal units operating in unattended outdoor substations. IC Role / Device Role / Timing Role: High-reliability code storage with Industrial Plus temperature rating (–40°C to +105°C) and deep power-down mode (6 µA). Use Value: 0.006 mA deep power-down current extends battery backup runtime during grid outages beyond 72 hours. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Cypress S25FL128SAGMFI101 | Same die, identical pinout and command set; differs only in marking and traceability documentation | No functional difference; accepted as direct replacement in existing designs qualified to JEDEC JESD22-A108 | Select when requiring Cypress-branded traceability or legacy procurement alignment |
| Winbond W25Q128JVSIM | 1.8 V operation, but lacks DDR mode, hardware ECC, and ASP; uses different SFDP parameter layout | Suitable for cost-sensitive consumer applications where XIP performance and security features are not required | Choose only if DDR bandwidth and OTP/ASP are excluded from design requirements |
Compared with S25FL128SAGMFI101, this part offers identical functionality with Infineon branding and updated lifecycle support; versus W25Q128JVSIM, it delivers 2.4× higher read bandwidth and mandatory ECC for safety-critical firmware integrity.
Availability
S25FS128SAGMFB103 is available at Aetrix Electronics and suitable for automotive ECU development, industrial PLC firmware deployment, and medical imaging system boot memory applications requiring stable component supply and long-term manufacturability.
Supply support for S25FS128SAGMFB103 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, sensor, and memory solutions for automotive, industrial, and IoT markets.
This device belongs to the FS-S Flash family, engineered for high-reliability embedded boot code storage with integrated security, ECC, and DDR performance in 1.8 V systems.
FAQ
What is the maximum clock frequency supported in DDR Quad I/O mode?
The S25FS128SAGMFB103 supports DDR Quad I/O read operations at up to 80 MHz clock frequency, delivering 80 MBps effective bandwidth. This is specified in the AC characteristics section (Table 6.5) of the datasheet and validated across the full Industrial Plus temperature range. The device automatically configures DDR mode upon receipt of the appropriate command sequence and requires proper setup of the configuration registers prior to activation.
Does this part support hardware reset via the RESET# pin?
Yes, the RESET# pin (Pin 8) provides hardware reset functionality. When asserted low for ≥20 ns, it places the device into a known initial state, clearing internal command latches and aborting any ongoing program or erase operation. During normal operation, the pin serves as IO3 in Quad and DDR modes. An internal pull-up resistor maintains high state when unused, eliminating need for external biasing.
How is the 1024-byte OTP array accessed and protected?
The OTP array is accessed using dedicated JEDEC-standard One-Time Program commands (0x4B and 0x42). Once programmed, bits cannot be reversed. Protection is enforced by status register lock bits and requires Write Enable before programming. The array resides at fixed address 0x00000000–0x000003FF and is write-protected after first programming unless unlocked via specific unlock sequence - a feature used for storing immutable cryptographic keys and device IDs.
Can this flash be used in a 3.3 V system?
No, the S25FS128SAGMFB103 is strictly a 1.8 V device with absolute maximum VCC rating of 2.0 V. Operation above 2.0 V risks permanent damage. It is incompatible with 3.3 V SPI buses and requires level-shifting circuitry or a dedicated 1.8 V supply rail. The datasheet explicitly defines operating range as 1.7 V to 2.0 V, and all AC/DC specifications are characterized within this window.
S25FS128SAGMFB103 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- FS-S
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- -
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 2V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
S25FS128SAGMFB103 FAQ
1.How can I place an order for S25FS128SAGMFB103 through Aetrix?
Please submit a Request for Quotation (RFQ) for S25FS128SAGMFB103 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for S25FS128SAGMFB103 reliable?
The price and inventory of S25FS128SAGMFB103 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S25FS128SAGMFB103 is usually 5 days.
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Once your S25FS128SAGMFB103 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for S25FS128SAGMFB103?
For technical support, including S25FS128SAGMFB103 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S25FS128SAGMFB103 requirements.
6.How does Aetrix verify that S25FS128SAGMFB103 is sourced from the original manufacturer or authorized distributors?
All S25FS128SAGMFB103 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S25FS128SAGMFB103 meets industry standards.
7.What is the process for return or replacement of S25FS128SAGMFB103?
All S25FS128SAGMFB103 units undergo pre-shipment inspection (PSI). If there is an issue with S25FS128SAGMFB103, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The S25FS128SAGMFB103 part is unused and in its original packaging.
Return procedure for S25FS128SAGMFB103:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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