Infineon Technologies S25FS128SAGNFV103
- Part No.:
- S25FS128SAGNFV103
- Manufacturer:
- Infineon Technologies
- Category:
- Memory
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
S25FS128SAGNFV103.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8WSON
- Quantity:
- Payment:

- Shipping:

Inventory:3,506
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Product details
Overview
S25FS128SAGNFV103 from Infineon is a 128 Mbit (16 MB) serial NOR flash memory with SPI Multi-I/O interface, 1.8 V supply, and industrial temperature grade (–40°C to +85°C). It supports Quad I/O, DDR Quad I/O (up to 80 MBps), 256/512-byte page programming, hardware ECC, and hybrid/uniform sector erase options including 4-KB, 64-KB, and 256-KB sectors. Used in boot code storage for microcontrollers in industrial control systems.
For engineers reviewing the S25FS128SAGNFV103 datasheet, S25FS128SAGNFV103 pinout, S25FS128SAGNFV103 application, or S25FS128SAGNFV103 equivalent, key selection criteria include SPI-MIO read bandwidth, ECC capability, AEC-Q100 compatibility, OTP security, and hybrid sector flexibility for firmware partitioning.
Technical Context
This device implements Infineon's Eclipse architecture with 65-nm MIRRORBIT™ technology, enabling high-density NOR flash with deterministic latency and XIP-capable continuous read mode. It supports both standard SPI (modes 0/3) and extended command sets including SFDP and CFI for auto-configuration.
The SPI-MIO interface provides four bidirectional I/O pins (IO0–IO3) supporting single/dual/quad data transfer and DDR operation. Internal hardware ECC corrects single-bit errors and detects double-bit errors during read, with no software overhead.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory density | 128 Mbit (16 MB) - sufficient for full MCU boot image + firmware + configuration tables in space-constrained embedded designs |
| Interface | SPI Multi-I/O with Quad/DDR Quad support - enables 80 MBps peak read throughput for fast application startup |
| Supply voltage | 1.7 V to 2.0 V - compatible with low-voltage SoC I/O domains and reduces system power consumption |
| Erase endurance | 100,000 program-erase cycles - supports field firmware updates over multi-year product lifecycle |
| Data retention | 20 years minimum at +85°C - ensures long-term reliability in unattended industrial deployments |
| Temperature grade | Industrial (–40°C to +85°C) - validated for operation in factory automation, motor drives, and edge gateways |
| Security features | 1024-byte OTP array + hardware/software block protection + Advanced Sector Protection - enables secure boot and IP protection |
Pinout & Package
Package: 8-pin WSON (6 mm × 5 mm, WND008 footprint), Pb-free, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS# | Chip Select | Active-low enable for SPI command execution; must be asserted before clocking any instruction |
| SCK | Serial Clock | Input clock for SDR (up to 133 MHz) or DDR (up to 80 MHz); phase/polarity configurable per SPI mode |
| IO0 | Serial Input / IO0 | Primary data input in single-I/O mode; bidirectional in dual/quad modes; supports reset function when pulled low during power-up |
| IO1 | Serial Output / IO1 | Primary data output in single-I/O mode; bidirectional in dual/quad modes; used for status register reads |
| IO2 | Write Protect / IO2 | Hardware write protection enable; active-low; can be configured as general-purpose I/O in quad mode |
| IO3 | Reset / IO3 | Active-low hardware reset; also serves as fourth I/O line in quad mode; requires external pull-up for normal operation |
| VCC | Power Supply | 1.7–2.0 V core supply; decoupling capacitor required within 5 mm of pin for stable read/write timing |
| VSS | Ground | Signal and power return path; must be connected to low-impedance PCB ground plane |
Key Features
| Feature | Design Value |
|---|---|
| DDR Quad I/O Read | 80 MBps sustained throughput - reduces boot time by >40% vs. standard SPI in XIP-capable applications |
| Hardware ECC | Single-bit error correction with zero CPU overhead - eliminates need for external error-handling firmware layers |
| Hybrid Sector Architecture | Eight 4-KB + one 32-KB sectors at top/bottom + uniform 64-KB blocks - enables fine-grained firmware update partitioning |
| OTP Array | 1024-byte one-time programmable memory - stores cryptographic keys, device IDs, or calibration data with permanent write lock |
| Advanced Sector Protection | Password- or boot-code-controlled individual sector locking - prevents unauthorized firmware modification without physical access |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
|
Use Scenario: Storing bootloader, real-time OS kernel, and safety-critical application code in programmable logic controllers. IC Role / Device Role / Timing Role: Primary nonvolatile boot memory with XIP-capable continuous read mode and deterministic latency. Use Value: 20-year data retention and 100K erase cycles ensure firmware integrity across 15+ year deployment lifetimes in unattended environments. |
Use Scenario: Holding boot code and sensor fusion firmware for camera-based driver assistance modules operating at ambient up to +105°C. IC Role / Device Role / Timing Role: AEC-Q100 Grade 2 qualified SPI flash providing secure, high-speed boot under automotive thermal stress. Use Value: Hardware ECC and OTP prevent bit corruption and unauthorized firmware tampering - critical for ISO 26262 ASIL-B compliance. |
| Medical Imaging System Configuration | Edge AI Gateway Firmware |
|
Use Scenario: Storing calibration profiles, DICOM metadata templates, and regulatory-compliant boot images in portable ultrasound devices. IC Role / Device Role / Timing Role: Secure, low-power SPI flash with deep power-down (6 µA) for battery-backed standby operation. Use Value: 0.006 mA deep power-down current extends battery life between clinical sessions without compromising boot reliability. |
Use Scenario: Hosting Linux kernel, device tree binaries, and ML inference models in fanless industrial gateways with thermal throttling. IC Role / Device Role / Timing Role: High-bandwidth Quad DDR interface (80 MBps) accelerates model loading and OTA update verification. Use Value: Uniform 256-KB sector erase enables atomic firmware updates without runtime interruption - essential for zero-downtime deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Cypress S25FL128SAGNFI101 | Same die, legacy Cypress branding; identical electrical specs, timing, and pinout; lacks latest Infineon firmware revision patches | No AEC-Q100 Grade 1 option; limited to Industrial and Grade 2 automotive | Select only if legacy design validation or existing BOM continuity is required |
| Winbond W25Q128JVSIM | 1.8 V, 128 Mbit, but no DDR mode; max Quad read = 40 MBps; no hardware ECC; OTP size = 512 bytes | Lower cost for non-safety-critical consumer applications; insufficient for ASIL-B or long-life industrial use | Choose only where ECC, DDR bandwidth, or 20-year retention are not required |
Compared with S25FL128SAGNFI101 and W25Q128JVSIM, the S25FS128SAGNFV103 delivers higher reliability via integrated ECC, faster boot via DDR Quad I/O, and broader automotive qualification - making it optimal for safety-aware and long-lifecycle designs.
Availability
S25FS128SAGNFV103 is available at Aetrix Electronics and suitable for industrial PLCs, automotive ADAS modules, medical imaging systems, and edge AI gateways requiring stable component supply, long-term lifecycle support, and AEC-Q100 compliance.
Supply support for S25FS128SAGNFV103 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, sensing, connectivity, and memory solutions for industrial, automotive, and IoT markets.
The FS-S Flash family targets high-reliability embedded systems needing secure, fast, and long-life nonvolatile storage - especially where XIP, ECC, and automotive qualification are mandatory.
FAQ
Does S25FS128SAGNFV103 support execute-in-place (XIP) operation?
Yes, it supports continuous read mode with wrap-around burst addressing, enabling true XIP execution directly from flash without copying to RAM. This mode operates at up to 133 MHz SCK and is fully compatible with ARM Cortex-M and RISC-V cores using standard SPI memory-mapped peripherals.
What is the function of the IO3/RESET# pin during normal operation?
During normal operation, IO3 serves as the fourth I/O line in Quad mode. When driven low externally during power-up, it triggers hardware reset - clearing internal state and forcing reinitialization of the command parser and status registers. It must be pulled high via ≥10 kΩ resistor otherwise.
How does the hybrid sector architecture benefit firmware update design?
The hybrid layout (eight 4-KB + one 32-KB sectors at address boundaries) allows dedicated allocation for bootloader, secure monitor, and recovery partitions - while larger uniform 64-KB sectors host application firmware. This enables atomic, rollback-safe updates without erasing critical boot code.
Is the OTP array permanently locked after programming?
Yes - once any byte in the 1024-byte OTP region is written, the entire array becomes read-only. No fuse blowing or additional command is needed; write protection is enforced by internal logic immediately after first programming, preventing further writes even under reset or power cycle.
S25FS128SAGNFV103 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- FS-S
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- -
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 2V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (5x6)
S25FS128SAGNFV103 FAQ
1.How can I place an order for S25FS128SAGNFV103 through Aetrix?
Please submit a Request for Quotation (RFQ) for S25FS128SAGNFV103 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for S25FS128SAGNFV103 reliable?
The price and inventory of S25FS128SAGNFV103 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S25FS128SAGNFV103 is usually 5 days.
3.What payment methods are accepted for S25FS128SAGNFV103?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for S25FS128SAGNFV103 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for S25FS128SAGNFV103?
S25FS128SAGNFV103 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your S25FS128SAGNFV103 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for S25FS128SAGNFV103?
For technical support, including S25FS128SAGNFV103 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S25FS128SAGNFV103 requirements.
6.How does Aetrix verify that S25FS128SAGNFV103 is sourced from the original manufacturer or authorized distributors?
All S25FS128SAGNFV103 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S25FS128SAGNFV103 meets industry standards.
7.What is the process for return or replacement of S25FS128SAGNFV103?
All S25FS128SAGNFV103 units undergo pre-shipment inspection (PSI). If there is an issue with S25FS128SAGNFV103, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The S25FS128SAGNFV103 part is unused and in its original packaging.
Return procedure for S25FS128SAGNFV103:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
S25FS128SAGNFV103 Tags

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M24C02-WMN6TP
STMicroelectronics
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AT24C02C-XHM-T
Microchip Technology

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AT21CS01-STUM10-T
Microchip Technology

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AT24C02C-SSHM-T
Microchip Technology

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24LC01BT-I/OT
Microchip Technology
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M24C02-FMC6TG
STMicroelectronics

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AT24CS02-SSHM-T
Microchip Technology

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93LC46BT-I/OT
Microchip Technology

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AT24C04C-SSHM-T
Microchip Technology

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24LC01BT-I/SN
Microchip Technology

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24AA02UIDT-I/OT
Microchip Technology

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AT24C08C-STUM-T
Microchip Technology
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