Infineon Technologies S29GL128P90TFIR10
- Part No.:
- S29GL128P90TFIR10
- Manufacturer:
- Infineon Technologies
- Category:
- Memory
- Package:
- 56-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
S29GL128P90TFIR10.pdf
- Description:
- IC FLASH 128MBIT PARALLEL 56TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:563
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Product details
Overview
S29GL128P90TFIR10 from Cypress Semiconductor is a 128 Mbit (16 MB) single-supply 3.0 V page-mode NOR Flash memory fabricated on 90 nm MirrorBit process technology, featuring 90 ns random access time, 25 ns page access time, and uniform 64 Kword (128 Kbyte) sector architecture with 128 sectors. It supports VersatileI/O™ (VIO = 1.65–VCC), write buffer programming (32-word/64-byte), and secured silicon sector with factory- or customer-programmable 8-word electronic serial number - deployed in industrial-grade embedded boot code storage for network routers.
For engineers reviewing the S29GL128P90TFIR10 datasheet, S29GL128P90TFIR10 pinout, S29GL128P90TFIR10 application, or S29GL128P90TFIR10 equivalent, key selection criteria include 90 ns read timing under regulated VCC, TSOP-56 industrial temperature support (–40°C to +85°C), WP#/ACC acceleration input for production programming throughput, and CFI-compliant interface for standardized flash management firmware.
Technical Context
This device implements a synchronous/asynchronous hybrid command-set architecture with dedicated state control logic, erase voltage generator, and PGM voltage generator enabling embedded algorithms for sector erase and buffer programming. Its block diagram confirms separate X/Y decoders, sector switches, and RY/BY# status output tied directly to internal timer and algorithm completion detection.
The VersatileI/O™ control scheme decouples I/O voltage (VIO) from core supply (VCC), allowing DQ and control signal levels to scale independently across 1.65–VCC while maintaining full compatibility with 16-bit or 8-bit bus configurations via BYTE# input. Sector protection employs both persistent lock bits and password-based software methods, with hardware WP#/ACC providing dual-role sector lockout and VHH-accelerated programming.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 Mbit (16 MB) organized as 2,097,152 × 8 or 1,048,576 × 16 - supports full boot image storage for mid-tier microcontrollers. |
| Access Time (tACC) | 90 ns at regulated VCC (3.0–3.6 V) - enables direct execution (XIP) from flash in real-time OS environments without wait states. |
| Page Access Time (tPACC) | 25 ns - accelerates sequential instruction fetch during burst reads from same page. |
| Write Buffer Size | 32 words / 64 bytes - reduces effective programming time by >60% vs. single-word writes in firmware update routines. |
| Sector Erase Time | 0.5 s per 64 Kword sector - predictable latency for field-upgradable applications requiring atomic sector-level updates. |
| Data Retention | 20 years typical - meets long-life requirements for infrastructure equipment with 10+ year deployment cycles. |
| Erase Endurance | 100,000 cycles per sector - supports frequent configuration or logging partition rewrites in industrial controllers. |
Pinout & Package
Package: 56-pin Thin Small Outline Package (TSOP-II, standard pinout, Pb-free, industrial temperature grade).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A22–A0 | Address Inputs | 23-bit address bus (A22–A0) selects 8 Mbyte address space; A22 is MSB for 128 Mbit density. |
| DQ15–DQ0 | Data I/O (16-bit) | Bi-directional data bus; operates in word mode by default; BYTE# = VIH configures full 16-bit width. |
| CE#, OE#, WE# | Chip/Output/Write Enable | Standard asynchronous control trio; CE# gating enables low-power deselection during idle periods. |
| RY/BY# | Ready/Busy Output | Open-drain active-low signal indicates active program/erase; used for polling or interrupt-driven firmware flow control. |
| WP#/ACC | Write Protect / Acceleration | At VIL: locks top/bottom sector; at VHH: enables unlock-bypass mode and reduces per-word programming to 13.5 µs. |
| RESET# | Hardware Reset | Asynchronous active-low reset that terminates ongoing operations and restores read mode - critical for safe power-cycle recovery. |
| VIO | Versatile I/O Supply | Independent I/O voltage rail (1.65–VCC) allows interfacing with mixed-voltage SoCs without level shifters. |
Key Features
| Feature | Design Value |
|---|---|
| 90 nm MirrorBit Process | Enables 128 Mbit density in TSOP-56 footprint with reduced leakage and improved reliability over older 110 nm nodes. |
| Secured Silicon Sector | 128-word (256-byte) factory- or customer-lockable region stores immutable device ID or cryptographic keys - prevents cloning. |
| CFI Compliance | Standardized JEDEC JESD68 interface allows generic flash drivers to auto-detect geometry, timings, and command sets. |
| Suspend/Resume Commands | Interrupts active erase or program to service high-priority reads - essential for real-time systems with concurrent access demands. |
| Automatic Sleep Mode | Enters ultra-low-power standby (<1 µA) after 100 µs of bus inactivity - extends battery life in portable diagnostics tools. |
Applications
| Industrial PLC Firmware Storage | Telecom Base Station Boot Code |
|---|---|
|
Use Scenario: Storing firmware images and configuration tables in programmable logic controllers operating continuously in factory-floor environments. IC Role / Device Role / Timing Role: Non-volatile boot memory mapped into CPU address space; provides deterministic 90 ns read access for fast startup and XIP execution. Use Value: 20-year data retention and 100,000 erase cycles ensure firmware integrity across 15+ year product lifecycles without field replacement. |
Use Scenario: Holding bootloader and FPGA configuration bitstreams in LTE/5G remote radio units exposed to wide thermal swings. IC Role / Device Role / Timing Role: Primary boot device accessed during cold start; leverages RY/BY# polling and suspend/resume for concurrent diagnostics. Use Value: Industrial temperature rating (–40°C to +85°C) and VIO flexibility enable reliable operation with mixed-voltage baseband processors. |
| Medical Imaging System Configuration | Automotive ADAS Camera Module |
|
Use Scenario: Storing calibration parameters, sensor profiles, and safety-critical diagnostic logs in MRI and CT scanner subsystems. IC Role / Device Role / Timing Role: Secure parameter store using locked Secured Silicon Sector; write-protected via WP# during normal operation. Use Value: Factory-programmed electronic serial number ensures traceability and anti-counterfeiting compliance per IEC 62304. |
Use Scenario: Hosting camera ISP firmware and lens correction tables in automotive surround-view modules requiring ASIL-B readiness. IC Role / Device Role / Timing Role: Dual-role memory: executes boot code (XIP) and stores runtime calibration data in protected sectors. Use Value: Password-based Advanced Sector Protection prevents unauthorized firmware modification during vehicle service or OTA updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NOR Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| S29GL128S90TFIR20 | Same density and package but uses 65 nm Eclipse process; 100,000 cycle endurance unchanged, but 110 ns tACC vs. 90 ns. | Lacks VersatileI/O™ - VIO fixed to VCC; no independent I/O voltage scaling. | Select when lower cost outweighs need for mixed-voltage interface or tighter read timing. |
| MX29GL128FPTI-90G | Macronix 128 Mbit NOR Flash; 90 ns tACC, TSOP-56, industrial temp; no Secured Silicon Sector or CFI support. | No electronic serial number or factory-lockable security region; relies on external authentication. | Choose where security features are handled externally and CFI driver reuse is not required. |
Compared with S29GL128S90TFIR20 and MX29GL128FPTI-90G, the S29GL128P90TFIR10 uniquely combines 90 ns read performance, VersatileI/O™ voltage independence, and integrated Secured Silicon Sector - making it optimal for secure, mixed-voltage, high-reliability embedded boot applications.
Availability
S29GL128P90TFIR10 is available at Aetrix Electronics and suitable for industrial PLC firmware storage, telecom base station boot code, and medical imaging system configuration requiring stable component supply across extended product lifecycles.
Supply support for S29GL128P90TFIR10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Cypress Semiconductor (now part of Infineon Technologies) designs high-reliability non-volatile memory and programmable system solutions for industrial, automotive, and communications markets.
The S29GL-P series targets embedded systems needing robust, pin-compatible NOR Flash with advanced security, mixed-voltage I/O, and long-term data retention - specifically engineered for boot code and firmware storage in mission-critical equipment.
FAQ
What is the function of the WP#/ACC pin on S29GL128P90TFIR10?
The WP#/ACC pin serves two distinct roles: at VIL (≤0.8 V), it protects the highest or lowest address sector from accidental program/erase; at VHH (11.5–12.5 V), it enables unlock-bypass mode and accelerates single-word programming to 13.5 µs. Internal pull-up ensures safe default VIH state when unconnected.
Does S29GL128P90TFIR10 support byte-wide data access?
Yes - asserting BYTE# = VIL configures the device for 8-bit operation: DQ0–DQ7 become active data lines, and DQ15/A-1 functions as the LSB address input. This mode is fully supported across all operating voltages and timing modes, including page read and write buffer programming.
How does the Secured Silicon Sector differ from standard flash sectors?
The Secured Silicon Sector is a dedicated 128-word (256-byte) region physically isolated from main array; it can be permanently locked at factory or by user to store an 8-word electronic serial number. Once locked, its contents cannot be erased or rewritten - providing tamper-resistant device identification for traceability and anti-cloning.
Can S29GL128P90TFIR10 operate with VIO = 1.8 V while VCC = 3.3 V?
Yes - VersatileI/O™ explicitly supports VIO = 1.65–VCC. With VCC = 3.3 V, VIO may be set to 1.8 V, allowing direct interface to 1.8 V logic families without external level shifters. All inputs (address, control, DQ) and outputs conform to 1.8 V thresholds when VIO = 1.8 V.
S29GL128P90TFIR10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- GL-P
- Package/Case:
- 56-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 90ns
- Access Time:
- 90 ns
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 56-TSOP
S29GL128P90TFIR10 FAQ
1.How can I place an order for S29GL128P90TFIR10 through Aetrix?
Please submit a Request for Quotation (RFQ) for S29GL128P90TFIR10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for S29GL128P90TFIR10 reliable?
The price and inventory of S29GL128P90TFIR10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S29GL128P90TFIR10 is usually 5 days.
3.What payment methods are accepted for S29GL128P90TFIR10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for S29GL128P90TFIR10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for S29GL128P90TFIR10?
S29GL128P90TFIR10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your S29GL128P90TFIR10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for S29GL128P90TFIR10?
For technical support, including S29GL128P90TFIR10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S29GL128P90TFIR10 requirements.
6.How does Aetrix verify that S29GL128P90TFIR10 is sourced from the original manufacturer or authorized distributors?
All S29GL128P90TFIR10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S29GL128P90TFIR10 meets industry standards.
7.What is the process for return or replacement of S29GL128P90TFIR10?
All S29GL128P90TFIR10 units undergo pre-shipment inspection (PSI). If there is an issue with S29GL128P90TFIR10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The S29GL128P90TFIR10 part is unused and in its original packaging.
Return procedure for S29GL128P90TFIR10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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