My Inquiry
My Account
Infineon Technologies S29GL128S90FHI020
- Part No.:
- S29GL128S90FHI020
- Manufacturer:
- Infineon Technologies
- Category:
- Memory
- Package:
- 64-LBGA
- Datasheet:
-
S29GL128S90FHI020.pdf
- Description:
- IC FLASH 128MBIT PARALLEL 64FBGA
- Quantity:
- Payment:
- Shipping:
Inventory:297
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
S29GL128S90FHI020 from Infineon is a 128 Mb (16 MB), 3.0 V core, parallel-interface MIRRORBIT™ Eclipse flash memory with ×16 data bus, 90 ns random access time, 15 ns page access time, and industrial temperature grade (–40°C to +85°C). It integrates hardware ECC for single-bit error correction, 128-kbyte uniform sector erase, and a 512-byte write buffer-enabling fast embedded code storage and firmware updates in microcontroller-based systems.
For engineers reviewing the S29GL128S90FHI020 datasheet, S29GL128S90FHI020 pinout, S29GL128S90FHI020 application, or S29GL128S90FHI020 equivalent, this device supports XIP-capable boot code execution, asynchronous read with page-mode acceleration, sector-level protection, OTP secure silicon region, and Versatile I/O (1.65 V to 3.6 V) for mixed-voltage host interfacing.
Technical Context
This device implements an asynchronous parallel interface with word-aligned addressing (A0–A22), supporting both standard and page-mode reads. Its embedded algorithm controller (EAC) handles autonomous program/erase operations, status monitoring via RY/BY# pin or status register, and automatic ECC generation/correction during read cycles.
The flash array is organized into uniform 128-kbyte sectors, each individually erasable. Sector protection uses volatile (lock bits) and non-volatile (ASP) methods, while the 1024-byte OTP array includes two lockable regions for secure configuration or calibration data storage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Density | 128 Mb (16 MB); supports full firmware image storage for mid-complexity MCUs |
| Interface | Parallel ×16 asynchronous; requires no clock or timing controller |
| Access Time | 90 ns random / 15 ns page; enables real-time XIP execution without wait states |
| Erase Unit | Uniform 128-kbyte sectors; simplifies firmware update partitioning and wear leveling |
| Write Buffer | 512-byte (256-word); reduces effective programming time by >3× vs. single-word writes |
| ECC | On-die hardware single-bit correction; eliminates need for external ECC logic or SW overhead |
| Endurance | 100,000 program/erase cycles per sector; suitable for field-upgradable systems |
| Data Retention | 20 years at +85°C; validated for long-lifecycle industrial deployments |
Pinout & Package
Package: 56-pin TSOP (Thin Small Outline Package), 14 mm × 20 mm, JEDEC MO-141AC compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A22 | Address inputs | Word-aligned addressing; A22 = MSB for 128 Mb (2²³ words) |
| DQ0–DQ15 | Data I/O bus | 16-bit bidirectional data path; supports byte/word writes via WE# control |
| CE# | Chip enable | Active-low device selection; controls power-down entry when deasserted |
| OE# | Output enable | Active-low read gating; allows shared bus operation with other peripherals |
| WE# | Write enable | Active-low write strobe; latches address/data on rising edge for program/erase commands |
| RY/BY# | Ready/Busy output | Open-drain status indicator; low during embedded operations, high when ready |
| RESET# | Hardware reset | Active-low asynchronous reset; forces device into reading state and clears internal state |
| VCC | Core supply | 3.0 V ±0.3 V; powers core logic and flash array (2.7–3.6 V operational range) |
| VIO | I/O supply | 1.65–3.6 V; independent of VCC for flexible host voltage interfacing |
| WP# | Write protect | Active-low hardware sector protection override; disables program/erase when asserted |
Key Features
| Feature | Design Value |
|---|---|
| Page-mode read (32-byte aligned) | 15 ns access for subsequent reads within same page-reduces boot latency and improves instruction fetch throughput |
| 512-byte write buffer | Enables burst programming of up to 256 words in one command, cutting firmware update time by ~70% vs. sequential writes |
| Hardware ECC engine | Single-bit error correction performed transparently during read; eliminates software ECC overhead and memory bandwidth penalty |
| Advanced sector protection (ASP) | Volatile and non-volatile lock bits per sector-supports secure bootloader partitioning and field-programmable configuration lockdown |
| Secure OTP array (1024 B) | Two independently lockable regions store immutable keys, calibration data, or device-specific identifiers without risk of overwrite |
Applications
| Industrial PLC Firmware Storage | Automotive ECU Boot Memory |
|---|---|
Use Scenario: Storing and executing boot code and runtime firmware in programmable logic controllers operating in harsh factory environments. IC Role / Device Role / Timing Role: Non-volatile XIP-capable code storage with deterministic 90 ns read latency and sector-level update isolation. Use Value: Enables zero-wait-state execution from flash, reducing BOM cost versus SRAM+SPI flash combinations while meeting IEC 61000-6-2 immunity requirements. | Use Scenario: Hosting boot ROM and safety-critical application code in automotive body control modules certified to AEC-Q100 Grade 3. IC Role / Device Role / Timing Role: Automotive-grade parallel flash with 100,000-cycle endurance and 20-year data retention at +85°C. Use Value: Meets ISO 26262 ASIL-B functional safety prerequisites through hardware ECC, sector locking, and validated thermal lifecycle performance. |
| Medical Diagnostic Device Configuration | Network Router Boot Image |
Use Scenario: Storing calibrated sensor parameters, user interface assets, and regulatory-compliant firmware revisions in portable ultrasound systems. IC Role / Device Role / Timing Role: Secure, field-upgradable storage with OTP-locked calibration data and ASP-protected application partitions. Use Value: Ensures traceable, tamper-resistant configuration persistence across FDA 510(k) device generations without requiring revalidation of locked sectors. | Use Scenario: Holding primary and fallback boot images for enterprise-grade routers requiring rapid failover and remote firmware upgrades. IC Role / Device Role / Timing Role: High-reliability parallel flash with suspend/resume capability for in-service updates and dual-bank sector architecture. Use Value: Allows background sector erase during active traffic, minimizing downtime during security patch deployment without interrupting packet forwarding. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| S29GL128P90TFI020 | Same density and timing, but uses 64-ball LAE Fortified BGA (9 mm × 9 mm); no TSOP option | Targeted at space-constrained PCBs where board area is prioritized over socketability or manual rework | Select when footprint reduction and thermal performance outweigh ease of prototyping or repair |
| MX29GL128FPTI-90G | Macronix part with identical 128 Mb ×16, 90 ns access, but lacks hardware ECC and OTP array | Used in cost-sensitive consumer gateways where external ECC or SW-based integrity checks are acceptable | Select only if system-level error handling already exists and secure OTP functionality is not required |
Compared with S29GL128P90TFI020, the TSOP package offers better thermal dissipation and hand-soldering compatibility; compared with MX29GL128FPTI-90G, the Infineon part delivers guaranteed single-bit ECC correction and tamper-proof OTP-critical for industrial and automotive firmware integrity.
Availability
S29GL128S90FHI020 is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive ECU boot memory, and medical diagnostic device configuration requiring stable component supply across extended product lifecycles.
Supply support for S29GL128S90FHI020 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive ICs, and secure microcontrollers, with global manufacturing and quality certification to ISO/TS 16949 and IATF 16949.
The GL-S family targets high-reliability embedded systems needing XIP-capable, high-endurance parallel NOR flash-designed specifically for automotive, industrial, and medical applications demanding long-term data integrity and secure firmware storage.
FAQ
What is the purpose of the Versatile I/O (VIO) supply pin?
The VIO pin supplies independent voltage (1.65 V to 3.6 V) to the device's input/output buffers, enabling direct interfacing with hosts operating at lower I/O voltages (e.g., 1.8 V or 2.5 V) while maintaining full 3.0 V core operation. This eliminates level-shifter components and simplifies mixed-voltage system design without compromising timing or signal integrity.
Does S29GL128S90FHI020 support true XIP (execute-in-place) operation?
Yes-it supports true XIP with deterministic 90 ns random access and 15 ns page-mode reads, allowing ARM Cortex-M or PowerPC cores to fetch instructions directly from flash without copying to RAM. The device's asynchronous interface, lack of internal clocks, and stable timing across temperature ensure cycle-accurate execution timing required for real-time control loops.
How does the hardware ECC function during normal read operations?
Hardware ECC operates transparently during every read: the device automatically calculates and checks Hamming codes on-the-fly, correcting single-bit errors before data reaches the DQ bus. No software intervention or additional read cycles are needed. Uncorrectable multi-bit errors trigger status register flags (ECC_FAIL bit), enabling system-level error logging or failover without data corruption.
Can the OTP array be reprogrammed after initial programming?
No-the 1024-byte OTP (One-Time Programmable) array consists of fuse-based cells; once a bit is programmed (set to '0'), it cannot be reverted to '1'. Two lockable regions allow independent permanent locking via dedicated commands, ensuring calibration data or cryptographic keys remain immutable after final production test and programming.
S29GL128S90FHI020 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- GL-S
- Package/Case:
- 64-LBGA
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 8M x 16
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 60ns
- Access Time:
- 90 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-FBGA (13x11)
S29GL128S90FHI020 FAQ
1.How can I place an order for S29GL128S90FHI020 through Aetrix?
Please submit a Request for Quotation (RFQ) for S29GL128S90FHI020 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for S29GL128S90FHI020 reliable?
The price and inventory of S29GL128S90FHI020 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S29GL128S90FHI020 is usually 5 days.
3.What payment methods are accepted for S29GL128S90FHI020?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for S29GL128S90FHI020 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for S29GL128S90FHI020?
S29GL128S90FHI020 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your S29GL128S90FHI020 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for S29GL128S90FHI020?
For technical support, including S29GL128S90FHI020 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S29GL128S90FHI020 requirements.
6.How does Aetrix verify that S29GL128S90FHI020 is sourced from the original manufacturer or authorized distributors?
All S29GL128S90FHI020 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S29GL128S90FHI020 meets industry standards.
7.What is the process for return or replacement of S29GL128S90FHI020?
All S29GL128S90FHI020 units undergo pre-shipment inspection (PSI). If there is an issue with S29GL128S90FHI020, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The S29GL128S90FHI020 part is unused and in its original packaging.
Return procedure for S29GL128S90FHI020:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
S29GL128S90FHI020 Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
