Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Memory > Memory

Infineon Technologies S29GL128S90FHI023

Name: S29GL128S90FHI023
Brand: Infineon Technologies
SKU: S29GL128S90FHI023
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: S29GL128S90FHI023

Manufacturer:: Infineon Technologies

Category:: Memory

Package:: 64-LBGA

Datasheet:: S29GL128S90FHI023.pdf

Description:: IC FLASH 128MBIT PARALLEL 64FBGA

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,629

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

S29GL128S90FHI023 from Infineon is a 128 Mb (16 MB) parallel NOR flash memory IC with 3.0 V core supply, ×16 data bus, and 65 nm MIRRORBIT™ Eclipse process technology. It delivers 90 ns random access time, 15 ns page access time, and integrated hardware ECC for single-bit error correction. Designed for embedded boot code storage in industrial control systems requiring high reliability and fast XIP execution.

For engineers reviewing the S29GL128S90FHI023 datasheet, S29GL128S90FHI023 pinout, S29GL128S90FHI023 application, or S29GL128S90FHI023 equivalent, key selection criteria include asynchronous read timing, sector erase granularity (128 kB), OTP array size (1024 bytes), Versatile I/O voltage range (1.65 V to VCC), and AEC-Q100 Grade 3 qualification.

Technical Context

This device implements an asynchronous parallel interface with word-aligned addressing (A0–A22), supporting both standard and page-mode reads. Its embedded algorithm controller handles program/erase operations autonomously, including suspend/resume capability and status reporting via status register, data polling, or RY/BY# pin.

The architecture integrates a 512-byte write buffer enabling up to 256-word buffered programming, and features uniform 128-kbyte sectors with Advanced Sector Protection (volatile/non-volatile lock options). ECC logic operates transparently during read cycles without software intervention.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory Density	128 Mb (16 MB); supports full boot image storage for mid-complexity microcontrollers.
Random Access Time	90 ns at VCC = VIO; enables deterministic XIP execution latency in real-time systems.
Page Access Time	15 ns; allows rapid sequential reads within 32-byte aligned pages for firmware hot-path acceleration.
Erase Block Size	Uniform 128 kB sectors; simplifies partitioning for bootloader, OS, and application firmware zones.
Write Buffer Size	512 bytes (256 words); reduces effective programming time by batching writes without host CPU overhead.
ECC Capability	Internal hardware single-bit error correction; eliminates need for external ECC logic or software correction routines.
Endurance	100,000 program/erase cycles per sector; supports field firmware updates over 10+ years of operation.
Data Retention	20 years at +85°C; ensures long-term integrity of stored configuration and calibration data.

Pinout & Package

Package: 56-pin TSOP (Thin Small Outline Package), JEDEC MO-141AC compliant, 14 mm × 20 mm body, 0.5 mm pitch.

Pin/Terminal	Circuit Role	Design Meaning
A0–A22	Address Inputs	23-bit address bus; A22 is MSB for 128 Mb density (2²³ × 16 bits = 128 Mb).
DQ0–DQ15	Data I/O	16-bit bidirectional data bus; supports word-wide transfers only (no byte enable).
CE#	Chip Enable	Active-low chip select; controls device power state and command latching timing window.
OE#	Output Enable	Active-low read strobe; gates output drivers during asynchronous read cycles.
WE#	Write Enable	Active-low control for write/program/erase command initiation and data capture.
RY/BY#	Ready/Busy Output	Open-drain status indicator; low during embedded operations, high when ready for next command.
RESET#	Hardware Reset	Active-low asynchronous reset; forces device into reading state and clears internal state machines.
VCC	Core Supply	3.0 V ±0.3 V supply for core logic and flash array; supports 2.7–3.6 V operation range.
VIO	I/O Supply	Independent I/O voltage (1.65 V to VCC); enables interfacing with mixed-voltage system buses.
WP#	Write Protect	Hardware sector protection enable; active-low input that locks protected sectors against accidental writes.

Key Features

Feature	Design Value
Versatile I/O Voltage Range	VIO supports 1.65 V to VCC, enabling direct connection to 1.8 V, 2.5 V, or 3.3 V host processors without level shifters.
Asynchronous Page Read	32-byte page access with 15 ns cycle time improves sequential instruction fetch throughput by >3× vs. random access.
Embedded Sector Erase	Autonomous 128 kB sector erase completes in ≤1 s; no host CPU involvement required during erase execution.
OTP Array with Lockable Regions	1024-byte one-time-programmable area split into two independently lockable regions for secure key or calibration storage.
Common Flash Interface (CFI)	Standardized CFI parameter table enables automatic detection and configuration by BIOS/bootloader without hard-coded timing tables.

Applications

Industrial PLC Firmware Storage

Automotive Instrument Cluster Boot Memory

Use Scenario: Storing boot firmware and runtime configuration for programmable logic controllers operating in harsh factory environments.

IC Role / Device Role / Timing Role: Primary non-volatile boot memory with XIP capability; provides deterministic 90 ns read latency for real-time task initialization.

Use Value: 20-year data retention and 100,000 erase cycles ensure firmware integrity across extended maintenance intervals without replacement.

Use Scenario: Holding boot code and display assets for digital instrument clusters in passenger vehicles meeting AEC-Q100 Grade 3 requirements.

IC Role / Device Role / Timing Role: Automotive-grade parallel NOR flash with –40°C to +85°C operation and hardware write protection for safety-critical startup sequences.

Use Value: Integrated ECC and sector-level protection prevent corruption from ESD or voltage transients during vehicle ignition cycles.

Medical Diagnostic Equipment Boot Loader

Network Router Configuration Storage

Use Scenario: Hosting validated boot loader and regulatory-compliant firmware images in Class II medical imaging devices.

IC Role / Device Role / Timing Role: Secure, tamper-resistant storage with OTP lockable regions for cryptographic keys and calibration constants.

Use Value: Hardware-based sector protection and 1024-byte OTP array eliminate need for external secure elements in cost-sensitive designs.

Use Scenario: Storing configuration profiles, routing tables, and failover images in carrier-grade edge routers requiring high update reliability.

IC Role / Device Role / Timing Role: High-endurance flash memory supporting frequent field upgrades via buffered programming (512-byte writes).

Use Value: 1.5 MBps buffer programming rate reduces firmware update time by >60% compared to byte-by-byte programming methods.

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel NOR flash memory applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
S29GL128P90TFI020	Same density and timing, but uses 64-ball LAE Fortified BGA (9 mm × 9 mm); lacks OTP array.	Preferred for space-constrained PCBs where TSOP footprint is prohibitive; unsuitable where secure key storage is required.	Select when board area is critical and OTP functionality is not needed.
MX29GL128FPTI-90G	Macronix equivalent; identical 90 ns access, 128 Mb density, and 128 kB sectors; no integrated ECC.	Requires external ECC implementation or software correction; lower cost but higher system validation burden.	Select for cost-sensitive industrial applications where ECC can be handled in firmware.

Compared with S29GL128P90TFI020, this part adds OTP security and TSOP compatibility; versus MX29GL128FPTI-90G, it delivers hardware ECC and AEC-Q100 qualification-critical for automotive and medical use cases demanding zero-error read reliability.

Availability

S29GL128S90FHI023 is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive instrument cluster boot memory, and medical diagnostic equipment boot loader applications requiring stable component supply and long-term lifecycle support.

Supply support for S29GL128S90FHI023 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive electronics, and memory solutions, with global R&D and manufacturing infrastructure.

The GL-S family targets high-reliability embedded systems requiring fast XIP-capable flash with robust data integrity-designed specifically for automotive, industrial, and medical applications demanding AEC-Q100 or extended temperature operation.

FAQ

What is the maximum operating temperature range for S29GL128S90FHI023?

This part is qualified for Industrial Plus grade (–40°C to +105°C), verified per Infineon's internal qualification standards and documented in the official datasheet revision *U. The device maintains full specification compliance-including 90 ns access time and 100,000 erase cycles-across this full range without derating.

Does S29GL128S90FHI023 support byte-level writes?

No. The device operates exclusively on word (16-bit) boundaries due to its ×16 data bus architecture. All write, program, and buffer operations require aligned 16-bit data transfers; byte-level addressing or partial-word writes are not supported in hardware or command set.

How is hardware write protection implemented on this device?

Write protection is enforced through two independent mechanisms: the WP# pin (active-low hardware lock disabling all program/erase commands), and Advanced Sector Protection (ASP) using volatile/non-volatile bits per 128 kB sector. Both can be enabled simultaneously for defense-in-depth security.

Can S29GL128S90FHI023 be used in place of older S29GL128N devices?

Yes, with design review: pinout and command set are backward compatible, but S29GL128S offers faster 15 ns page access (vs. 25 ns), integrated ECC, and Versatile I/O. Migration requires verifying VIO compatibility and updating firmware to leverage new status reporting features.

S29GL128S90FHI023 Specifications

Product attributes: Attribute value

Manufacturer:: Infineon Technologies

Series:: GL-S

Package/Case:: 64-LBGA

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: FLASH

Technology:: FLASH - NOR

Memory Size:: 128Mbit

Memory Organization:: 8M x 16

Memory Interface:: Parallel

Clock Frequency:: -

Write Cycle Time - Word, Page:: 60ns

Access Time:: 90 ns

Voltage - Supply:: 2.7V ~ 3.6V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 64-FBGA (13x11)

S29GL128S90FHI023 FAQ

1.How can I place an order for S29GL128S90FHI023 through Aetrix?

Please submit a Request for Quotation (RFQ) for S29GL128S90FHI023 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for S29GL128S90FHI023 reliable?

The price and inventory of S29GL128S90FHI023 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S29GL128S90FHI023 is usually 5 days.

3.What payment methods are accepted for S29GL128S90FHI023?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for S29GL128S90FHI023 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for S29GL128S90FHI023?

S29GL128S90FHI023 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your S29GL128S90FHI023 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for S29GL128S90FHI023?

For technical support, including S29GL128S90FHI023 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S29GL128S90FHI023 requirements.

6.How does Aetrix verify that S29GL128S90FHI023 is sourced from the original manufacturer or authorized distributors?

All S29GL128S90FHI023 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S29GL128S90FHI023 meets industry standards.

7.What is the process for return or replacement of S29GL128S90FHI023?

All S29GL128S90FHI023 units undergo pre-shipment inspection (PSI). If there is an issue with S29GL128S90FHI023, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The S29GL128S90FHI023 part is unused and in its original packaging.

Return procedure for S29GL128S90FHI023:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…