NXP Semiconductors SAA6752HS/V104,557

Overview

SAA6752HS/V104,557 from NXP Semiconductors (formerly Philips Semiconductors) is a single-chip MPEG-2 video and MPEG-1 Layer 2 audio encoder with integrated stream multiplexer, supporting D1/2/3D1/SIF resolutions, up to 15 Mbit/s IPB encoding, and MPEG-2 Program Stream output compliant with DVD standards. It operates with dual 27 MHz video clocks, 3.3 V/2.5 V dual-supply architecture, and interfaces via I²C-bus control and parallel 8-bit stream output.

For engineers reviewing the SAA6752HS/V104,557 datasheet, SAA6752HS/V104,557 pinout, SAA6752HS/V104,557 application, or SAA6752HS/V104,557 equivalent, this page delivers verified functional scope, real-time encoding constraints, SDRAM interface timing, I²C register accessibility, and DVD/DVHS stream format compliance - all critical for digital recorder and broadcast encoder design validation.

Technical Context

The SAA6752HS/V104,557 implements a multi-processor architecture with independent video front-end, MIPS® CPU-based compression engines, and stream scheduler, coordinated via FIFOs and external 16/64 Mbit SDRAM. Its video path supports ITU-R BT.656/BT.601 input, adaptive median/motion-compensated noise filtering, and programmable GOP structures.

Audio processing accepts dual I²S inputs at 32/44.1/48 kHz, performs MPEG-1 Layer 2 encoding at 256/384 kbit/s, and bypasses LPCM/compressed streams per IEC 61937. The multiplexer generates MPEG-2 PS/TS/PES/ES with PTS/DTS/PCR timestamps, Closed Caption insertion, and optional user data in GOP/picture headers.

Key Specifications

Pinout & Package

SQFP208 plastic shrink quad flat package (SOT316-1), 208 leads, 28 × 28 × 3.4 mm body, high stand-off height for thermal management in high-density encoder PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar MPEG-2 video and audio encoding applications.

Compared with SAA6752HS/V104,557, the V103 variant adds AC-3 encoding but shares identical video performance and system architecture, while the CX23880-11Z trades external memory flexibility and standalone operation for PCI integration - making SAA6752HS/V104,557 optimal for cost-sensitive, embedded digital recorder designs requiring DVD/DVHS compliance.

Availability

SAA6752HS/V104,557 is available at Aetrix Electronics and suitable for DVD±RW optical disc recorders, HDD-based time-shift recorders, DVHS systems, and professional video digitization equipment requiring stable component supply, long-lifecycle support, and verified MPEG-2 encoding functionality.

Supply support for SAA6752HS/V104,557 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors, headquartered in Eindhoven, Netherlands, develops high-performance mixed-signal ICs for automotive, industrial, and consumer applications, with deep heritage in video processing from its Philips Semiconductors origin.

The SAA6752HS product line was designed specifically for cost-optimized, single-chip digital video recording systems - targeting DVD, DVHS, and HDD-based platforms where integration of video/audio encoding, multiplexing, and system control reduces bill-of-materials and accelerates time-to-market.

FAQ

Does SAA6752HS/V104,557 support AC-3 audio encoding?

No, SAA6752HS/V104,557 explicitly excludes Dolby Digital Consumer Encoding (AC-3). Per the datasheet, it supports only MPEG-1 Layer 2 audio encoding at 256/384 kbit/s. The AC-3 function is present only in the SAA6752HS/V103 variant. This distinction is confirmed in Section 2.1 General Description and Ordering Information footnote 2.

What SDRAM configurations are supported by SAA6752HS/V104,557?

SAA6752HS/V104,557 supports two SDRAM configurations: 16 Mbit × 16-bit or 64 Mbit × 16-bit, clocked at 108 MHz. The device uses the full 16-bit data bus (SD_DQ0–SD_DQ15) and provides dedicated address (SD_A0–SD_A13), control (SD_CS, SD_RAS, SD_CAS, SD_WE), and timing (SD_CLK, SD_CKE) signals. No external SDRAM controller logic is required.

Can SAA6752HS/V104,557 generate both MPEG-2 Program Stream and Transport Stream?

Yes, SAA6752HS/V104,557 can generate MPEG-2 Program Stream (PS), Transport Stream (TS), Packetized Elementary Stream (PES), and Elementary Stream (ES) - selectable via I²C-bus registers. PS output is DVD-compliant; TS output meets DVHS and DVB requirements. The multiplexer inserts PTS/DTS/SCR/PCR timestamps and supports optional user data insertion in GOP and picture headers.

What video input standards does SAA6752HS/V104,557 accept?

SAA6752HS/V104,557 accepts digital YUV 4:2:2 video input per ITU-R BT.656 (8-bit at 27 MHz) and ITU-R BT.601, including enhanced BT.656 with embedded VBI data (CC, WSS, CGMS). It also processes non-broadcast signals from analog VCR per IEC 756 and supports format conversion to 1/2D1, 2/3D1, and SIF with 4:2:2 to 4:2:0 chroma subsampling.

Is SAA6752HS/V104,557 pin-compatible with other variants in the SAA6752HS family?

Yes, all SAA6752HS variants - including SAA6752HS/V104,557, SAA6752HS/V103, and earlier versions - share identical SQFP208 (SOT316-1) packaging and pinout. Functional differences (e.g., AC-3 presence) are implemented internally and do not affect mechanical or electrical interface compatibility. Board designs can be reused across variants with only firmware/configuration changes.