NXP Semiconductors SAA7105E/V1/G,557

Overview

SAA7105E/V1/G,557 from NXP Semiconductors (formerly Philips Semiconductors) is a monolithic 3.3 V CMOS digital video encoder IC that converts non-interlaced RGB or 4:2:2 Y-CB-CR graphics data up to 1280 × 1024 @ 60 Hz into analog PAL/NTSC CVBS, S-video, or RGB-SCART outputs. It integrates a 27 MHz crystal oscillator, triple 10-bit DACs, programmable horizontal/vertical scaler, 5-line anti-flicker filter, and I²C-bus interface - enabling direct connection to PC graphics controllers for legacy TV output in industrial display and embedded multimedia systems.

For engineers reviewing the SAA7105E/V1/G,557 datasheet, SAA7105E/V1/G,557 pinout, SAA7105E/V1/G,557 application, or SAA7105E/V1/G,557 equivalent, key selection criteria include its 85 MHz maximum pixel clock support, 10-bit DAC linearity (±3 LSB integral, ±1 LSB differential), 3.15–3.45 V analog/digital supply tolerance, JTAG boundary scan test capability, and hardware cursor overlay for UI overlays in kiosk and medical display systems.

Technical Context

The SAA7105E/V1/G,557 implements a full digital video encoding pipeline: input formatter accepts RGB or Y-CB-CR formats (including ITU-R BT.656), routes data through RGB LUT gamma correction and cursor insertion, then applies horizontal scaling (XINC/4096 resolution) and vertical scaling with re-interlacing. Its encoder block generates crystal-stable 13.5 MHz subcarrier signals independent of input pixel clock, with luminance interpolated to 27 MHz and chrominance processed at 6.75 MHz before quadrature modulation.

Timing generation is fully synchronized to an on-chip 27 MHz oscillator (fundamental or 3rd-harmonic crystal), supporting both master and slave I²C-bus operation at 400 kHz. The device features dedicated hot-plug detection (TVD pin), programmable sync phase alignment (HSVGC/VSVGC/FSVGC), and optional teletext/VPS/closed caption insertion on line 21/23/20 - all while maintaining 5 V-tolerant I/Os for compatibility with legacy 5 V graphics interfaces.

Key Specifications

Pinout & Package

Package: BGA156 (SOT472-1), 15 × 15 × 1.15 mm body, 156-ball array - designed for high-density PCB layouts with thermal pad grounding and low-inductance power delivery.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digital video encoder applications.

Compared with ADV7170KSTZ and THS8135IPFP, the SAA7105E/V1/G,557 delivers full self-contained video encoding - including scaler, oscillator, LUT, cursor, and JTAG - making it optimal for space-constrained, single-chip embedded video solutions where design consolidation and long-term supply stability are critical.

Availability

SAA7105E/V1/G,557 is available at Aetrix Electronics and suitable for industrial display terminals, medical imaging monitors, kiosk systems, and legacy graphics adapter designs requiring stable component supply with guaranteed long-term availability and traceable sourcing.

Supply support for SAA7105E/V1/G,557 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications - formed from the spin-off of Philips Semiconductors in 2006.

The SAA7105E/V1/G,557 belongs to NXP's legacy video processing portfolio, designed specifically for bridging high-resolution digital graphics to analog broadcast video standards in cost-sensitive, reliability-critical embedded systems.

FAQ

What video standards does the SAA7105E/V1/G,557 support?

The SAA7105E/V1/G,557 supports PAL B/G and NTSC M encoding with crystal-stable 13.5 MHz subcarrier generation, compliant with RS-170-A and ITU-R BT.470-3 standards. It outputs CVBS, S-video (Y/CB/CR), and RGB+composite sync for SCART connectors - all at native 50 Hz or 60 Hz frame rates without external timing components. The SAA7105E/V1/G,557 does not support SECAM or digital HDMI/DisplayPort standards.

Does the SAA7105E/V1/G,557 require an external crystal?

No, the SAA7105E/V1/G,557 integrates a 27 MHz crystal oscillator supporting both fundamental and 3rd-harmonic crystals - eliminating the need for external oscillator circuitry. The XTALI and XTALO pins connect directly to a 27 MHz crystal, and the internal oscillator provides clocking for the DACs, encoder, and I²C-bus interface. This reduces BOM count and improves timing stability versus discrete oscillator solutions.

Can the SAA7105E/V1/G,557 output RGB and CVBS simultaneously?

Yes, the SAA7105E/V1/G,557 supports simultaneous RGB and CVBS output via its three independent DAC channels: BLUE_CB_CVBS, GREEN_VBS_CVBS, and RED_CR_C_CVBS. Each output can be configured independently - for example, BLUE_CB_CVBS and GREEN_VBS_CVBS driven as CVBS composite, while RED_CR_C_CVBS outputs RGB red - enabling multi-format display support from a single IC without external muxing.

What is the function of the TVD pin on the SAA7105E/V1/G,557?

The TVD pin on the SAA7105E/V1/G,557 is an active-low open-drain interrupt output that asserts when a valid analog load (e.g., TV or monitor) is detected at the DAC outputs. It enables hot-plug detection without software polling, allowing the host system to automatically enable video output, configure timing, or switch display modes upon connection - a key feature for kiosk and embedded systems requiring zero-touch setup.

Is the SAA7105E/V1/G,557 pin-compatible with the SAA7104E?

Yes, the SAA7105E/V1/G,557 is pin-compatible with the SAA7104E in the BGA156 package (SOT472-1) and shares identical pinout, electrical characteristics, and functional blocks. The primary difference is Macrovision™ copy protection support - present only in the SAA7104E - making the SAA7105E/V1/G,557 suitable for applications where content protection is not required, with identical PCB layout and firmware compatibility.