NXP Semiconductors SAF7167AHW/V1,157
- Part No.:
- SAF7167AHW/V1,157
- Manufacturer:
- NXP Semiconductors
- Category:
- Video Processing
- Package:
- 48-TQFP Exposed Pad
- Datasheet:
-
SAF7167AHW/V1,157.pdf
- Description:
- IC RGB VIDEO AMP 48HTQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SAF7167AHW/V1,157 from NXP Semiconductors (formerly Philips Semiconductors) is a mixed-mode video DAC IC that converts YUV or RGB digital video data into analog RGB outputs, performs on-chip analog mixing between DAC outputs and external analog RGB inputs, and provides keying control via internal pixel color comparison or external key signal. It features triple 8-bit DACs, I²C-bus programmability, and built-in voltage-output amplifiers capable of directly driving 150 Ω loads. It is used in legacy video display systems requiring format conversion and overlay capability.
For engineers reviewing the SAF7167AHW/V1,157 datasheet, SAF7167AHW/V1,157 pinout, SAF7167AHW/V1,157 application, or SAF7167AHW/V1,157 equivalent, this page delivers verified technical context, exact pin functions, real-world use cases for video mixing and keying, and validated alternative parts with documented functional differences - all derived from the official Philips Semiconductors product data sheet Rev. 01 (29 June 2004).
Technical Context
The SAF7167AHW/V1,157 implements a full YUV-to-RGB color space conversion matrix compliant with ITU-R BT.601, supports YUV 4:2:2/4:1:1/2:1:1 and RGB 5:6:5 input formats, and processes video at up to 66 MHz clock rate. Its re-formatter de-multiplexes non-4:4:4 input formats to internal 4:4:4 before matrix conversion.
Keying is implemented via dual-path control: external keying using the EXTKEY pin (with polarity selectable via KINV), or internal pixel color keying using an 8-bit register KD[7:0] compared against 8-, 16-, or 24-bit pixel inputs under four KMOD[2:0] modes. Analog mixing occurs after level-shifting and gain adjustment (2×) of external RGB inputs to match DAC output levels (0.2 V to 1.82 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC resolution | Triple 8-bit DACs for R/G/B channels; enables 256-level grayscale per channel and ITU-R BT.601-compliant black (16) to white (235) range mapping. |
| Video input rate | Up to 66 MHz VCLK; supports high-resolution SDTV and early HDTV timing requirements without frame buffering. |
| Output drive capability | Direct 150 Ω load drive (25 Ω internal + 47 Ω external series + 75 Ω monitor); eliminates need for external buffer op-amps in standard VGA-style interfaces. |
| Analog supply | VDDA = 4.75–5.25 V; dual analog rails (VDDA1/VDDA2) with separate grounds (VSSA1/VSSA2) minimize crosstalk between RGB channels. |
| Control interface | I²C-bus slave address 0xB8 (10111000); single-byte subaddressing (00h–02h); no read-back support - write-only configuration. |
| Keying delay | Programmable 0–7 PCLK-cycle delay (KDLY[2:0]) applied to internal key signal before analog multiplexer switching. |
| Dynamic performance | DNL/INL ≤ ±1 LSB; DAC settling time ≤16.5 ns; group delay ≤20 TVCLK + tPD (YUV mode); ensures minimal interlaced video timing skew. |
Pinout & Package
SAF7167AHW/V1,157 is housed in a 48-pin HTQFP package (SOT545-1) with 7 mm × 7 mm body, 1 mm height, and exposed die pad for thermal dissipation. Thermal resistance Rth(j-a) = 34 K/W in free air.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDD / VSSD | Digital supply and ground | Separate 5 V digital rail with dedicated ground; decoupling required near pins 7 and 8 to suppress digital noise coupling into analog section. |
| VDDA1/VDDA2 / VSSA1/VSSA2 | Analog supply and ground pairs | Dual independent analog supplies and grounds per RGB channel reduce inter-channel crosstalk and improve PSRR. |
| YUV[7:0], UV[7:0], P[7:0] | Digital video and keying data buses | Time-multiplexed YUV/RGB pixel inputs (pins 38–45, 46–48, 1–5) and parallel 8-bit key bus (pins 13–20); require matched trace lengths for setup/hold compliance. |
| VCLK, PCLK, HREF | Video timing inputs | VCLK synchronizes YUV/RGB data latching; PCLK clocks key data; HREF defines active video start - all must meet tsu1/th1/tSU2/tH2 timing windows. |
| R_IN/G_IN/B_IN | Analog RGB inputs | DC-coupled inputs accepting 0.7 Vp-p signals; internally level-shifted +0.2 V and amplified 2× to align with DAC output range. |
| R_OUT/G_OUT/B_OUT | Analog RGB outputs | Voltage-output amplifier outputs; each includes 25 Ω series resistance - external 47 Ω resistor forms 75 Ω source termination for coaxial cable driving. |
| EXTKEY, SDA, SCL, RES_N | Control and keying interface | Active-low reset (RES_N) initializes all I²C registers; EXTKEY selects DAC vs analog path; SDA/SCL operate at standard-mode I²C (100 kHz). |
Key Features
| Feature | Design Value |
|---|---|
| On-chip YUV-to-RGB conversion | Hardware matrix compliant with ITU-R BT.601 reduces host processor load and eliminates software interpolation errors in embedded video pipelines. |
| Multi-format digital input support | Native handling of YUV 4:2:2, 4:1:1, 2:1:1 and RGB 5:6:5 avoids external format translators and simplifies FPGA or ASIC video interface logic. |
| Programmable keying modes | Four KMOD[2:0] configurations enable 8-bit monochrome, 16-bit high-color, or 24-bit true-color pixel keying - critical for OSD transparency and graphics overlay in set-top boxes. |
| Integrated analog mixing | Three independent analog mixers allow seamless blending of DAC-generated video with external analog sources (e.g., composite sync, legacy camera feeds) without external op-amp summing networks. |
| Single-supply 5 V operation | Eliminates need for dual ±5 V or ±12 V analog supplies; compatible with standard logic-level I/O and simplifies power sequencing in cost-sensitive consumer electronics. |
Applications
| Video Overlay in Set-Top Boxes | VGA Signal Conversion for Legacy Displays |
|---|---|
Use Scenario: Overlaying on-screen menus, channel logos, or EPG data onto decoded MPEG video streams in digital satellite/cable receivers. IC Role / Device Role / Timing Role: SAF7167AHW/V1,157 receives decoded YUV 4:2:2 video via parallel bus, converts to RGB, mixes with internally generated OSD pixel data (via P[7:0]), and outputs analog RGB to CRT or LCD panel. Use Value: Enables hardware-accelerated alpha blending without CPU intervention; supports real-time 25/30 fps overlay with <16.5 ns DAC settling time and zero frame buffer latency. | Use Scenario: Converting digital video outputs from media processors or FPGAs to standard VGA-compatible analog RGBHV signals for connection to legacy monitors or projectors. IC Role / Device Role / Timing Role: SAF7167AHW/V1,157 accepts RGB 5:6:5 input at up to 66 MHz, bypasses YUV matrix, drives triple DACs, and buffers outputs to drive 75 Ω coaxial cables directly. Use Value: Eliminates discrete op-amps and level shifters; achieves 0.7 Vp-p output swing with <1 LSB INL/DNL - meets VGA timing and amplitude specifications without calibration. |
| Legacy Video Capture Mixing | Industrial Camera Interface Module |
Use Scenario: Combining live analog camera feed (e.g., security cam) with digitally generated graphics (e.g., timestamp, zone labels) before recording or display. IC Role / Device Role / Timing Role: SAF7167AHW/V1,157 routes analog RGB inputs (R_IN/G_IN/B_IN) through internal mixers, overlays them with DAC-generated video using EXTKEY-controlled switching, and outputs composite analog RGB. Use Value: Supports DC-coupled analog inputs with 2× gain and 0.2 V offset - matches DAC output range without external biasing; tSW ≤15 ns ensures clean key transitions during motion. | Use Scenario: Interfacing high-speed CMOS image sensors with analog video output stages in machine vision or medical imaging equipment. IC Role / Device Role / Timing Role: SAF7167AHW/V1,157 receives raw YUV 4:2:2 sensor data at 66 MHz, applies BT.601 matrix, drives triple DACs, and outputs buffered RGB for analog capture cards or direct CRT display. Use Value: Provides deterministic group delay (≤20 TVCLK + tPD) and tight DNL/INL - essential for pixel-accurate timing in metrology-grade imaging where jitter causes measurement error. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar video DAC and analog mixing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADV7123KSTZ50 | Triple 10-bit DAC; no integrated YUV-to-RGB matrix or keying logic; requires external controller for color space conversion. | Used in pure DAC applications (e.g., graphics card RAMDACs); lacks on-chip mixing and keying - external FPGA or microcontroller needed for overlay. | Select when higher resolution (10-bit) and lower DNL (<0.5 LSB) are prioritized over integrated video processing; requires additional logic for YUV handling. |
| THS8200IPHP | Triple 10-bit DAC with integrated sync stripper and genlock; supports YUV 4:2:2 but no internal keying; I²C + SPI interface. | Targeted at broadcast monitoring and professional video routing; includes sync processing not present in SAF7167AHW/V1,157. | Select for studio-grade timing stability and composite sync handling; not suitable for pixel-level keying or low-cost consumer OSD. |
Compared with ADV7123KSTZ50 and THS8200IPHP, SAF7167AHW/V1,157 uniquely integrates YUV-to-RGB conversion, multi-mode pixel keying, and analog mixing in a single 5 V, 48-pin HTQFP package - reducing BOM count and PCB area for cost-sensitive embedded video systems where 8-bit fidelity is sufficient.
Availability
SAF7167AHW/V1,157 is available at Aetrix Electronics and suitable for video overlay in set-top boxes, VGA signal conversion for legacy displays, and industrial camera interface modules requiring stable component supply across long-lifecycle consumer and industrial programs.
Supply support for SAF7167AHW/V1,157 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors, formerly Philips Semiconductors, designs high-performance analog and mixed-signal ICs for automotive, industrial, and consumer applications with emphasis on system integration and reliability.
The SAF7167AHW/V1,157 belongs to Philips' legacy video interface product line, engineered specifically for embedded video systems needing compact, low-power, single-chip YUV-to-RGB conversion with hardware keying - targeting digital TV, set-top boxes, and industrial display controllers circa 2004.
FAQ
What video input formats does the SAF7167AHW/V1,157 support?
The SAF7167AHW/V1,157 supports YUV 4:2:2, YUV 4:1:1, YUV 2:1:1 (ITU-R BT.656), and RGB 5:6:5 digital video inputs. Format selection is controlled via I²C-bus bits FMTC[1:0]. The internal re-formatter converts all non-4:4:4 formats to 4:4:4 prior to YUV-to-RGB matrix processing. This allows the SAF7167AHW/V1,157 to interface directly with common video decoders and media processors without external format translation logic.
How does the keying function work in the SAF7167AHW/V1,157?
The SAF7167AHW/V1,157 supports two keying methods: external keying via the EXTKEY pin (with polarity selectable by KINV) and internal pixel color keying using an 8-bit register KD[7:0]. Internal keying compares incoming pixel data against KD[7:0] in four modes (8-bit, dual 8-bit, or triple 8-bit) selected by KMOD[2:0]. A match enables mixing of DAC output; mismatch passes external analog RGB. Keying delay (0–7 PCLK cycles) is configurable via KDLY[2:0]. This makes SAF7167AHW/V1,157 suitable for hardware-accelerated OSD and graphics overlay.
What are the analog output specifications of the SAF7167AHW/V1,157?
The SAF7167AHW/V1,157 provides three analog RGB outputs (R_OUT, G_OUT, B_OUT) with built-in voltage-output amplifiers. Each output delivers 0.2 V to 1.82 V (full-scale) into a 150 Ω load (25 Ω internal + 47 Ω external + 75 Ω monitor). Output swing is ~0.7 Vp-p after external termination. Differential and integral non-linearity are ≤±1 LSB, and settling time is ≤16.5 ns - meeting VGA and SDTV analog video timing and fidelity requirements without external buffering.
Can the SAF7167AHW/V1,157 accept both binary and two's complement video data?
Yes, the SAF7167AHW/V1,157 supports both binary offset and two's complement UV/Y input data formats. Selection is made via I²C-bus bit DRP: DRP = 0 configures two's complement mode; DRP = 1 selects binary offset mode. This flexibility allows the SAF7167AHW/V1,157 to interface directly with diverse video sources - including those outputting signed chroma components (two's complement) or unsigned luminance (binary) - without external data format conversion circuitry.
What is the thermal design guidance for the SAF7167AHW/V1,157?
The SAF7167AHW/V1,157 uses an HTQFP48 package with an exposed die pad (SOT545-1) and has a typical junction-to-ambient thermal resistance of 34 K/W in free air. To minimize Rth(j-a), all power and ground pins must connect directly to PCB power/ground planes. A large copper area beneath the IC - connected to the ground plane via multiple vias - is strongly recommended. Solder mask should be omitted under the die pad, and thermally conductive soldering glue is advised after curing to enhance heat transfer. These measures ensure safe operation within the −40 °C to +85 °C ambient range.
SAF7167AHW/V1,157 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 48-TQFP Exposed Pad
- Packaging:
- Tray
- Product Status:
- Obsolete
- Function:
- Converter
- Applications:
- Video Display
- Standards:
- ITU-R BT.601
- Control Interface:
- I2C
- Voltage - Supply:
- 4.75V ~ 5.25V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 48-HTQFP (7x7)
SAF7167AHW/V1,157 FAQ
1.How can I place an order for SAF7167AHW/V1,157 through Aetrix?
Please submit a Request for Quotation (RFQ) for SAF7167AHW/V1,157 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SAF7167AHW/V1,157 reliable?
The price and inventory of SAF7167AHW/V1,157 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SAF7167AHW/V1,157 is usually 5 days.
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Once your SAF7167AHW/V1,157 order is processed, you will receive an email with the shipment details and tracking number.
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5.How can I obtain technical support or documentation for SAF7167AHW/V1,157?
For technical support, including SAF7167AHW/V1,157 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SAF7167AHW/V1,157 requirements.
6.How does Aetrix verify that SAF7167AHW/V1,157 is sourced from the original manufacturer or authorized distributors?
All SAF7167AHW/V1,157 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SAF7167AHW/V1,157 meets industry standards.
7.What is the process for return or replacement of SAF7167AHW/V1,157?
All SAF7167AHW/V1,157 units undergo pre-shipment inspection (PSI). If there is an issue with SAF7167AHW/V1,157, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SAF7167AHW/V1,157 part is unused and in its original packaging.
Return procedure for SAF7167AHW/V1,157:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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