NXP Semiconductors SC16C654BIA68,518
- Part No.:
- SC16C654BIA68,518
- Manufacturer:
- NXP Semiconductors
- Package:
- 68-LCC (J-Lead)
- Datasheet:
-
SC16C654BIA68,518.pdf
- Description:
- IC UART QUAD W/FIFO 68-PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:2,622
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SC16C654BIA68 from NXP Semiconductors (formerly Philips) is a quad UART IC designed for high-throughput serial communication in industrial embedded systems. It supports 5 V, 3.3 V, and 2.5 V operation, delivers up to 5 Mbit/s data rate at 5 V/3.3 V, integrates 64-byte transmit and receive FIFOs per channel, and provides selectable Intel (16-mode) or Motorola (68-mode) bus interface - used in multi-port terminal servers and industrial PLC backplanes.
For engineers reviewing the SC16C654BIA68 datasheet, SC16C654BIA68 pinout, SC16C654BIA68 application, or SC16C654BIA68 equivalent, key selection criteria include quad-channel asynchronous serial support, 64-byte FIFO depth, dual-bus interface flexibility, IrDA encoder/decoder capability, and industrial temperature range (−40 °C to +85 °C) compliance.
Technical Context
The SC16C654BIA68 implements four independent UART channels with fully programmable character formatting (5–8 data bits, 1/1.5/2 stop bits, even/odd/no parity), false start-bit detection, and complete status reporting via line, transmitter, receiver, and modem status registers. Its clock architecture supports crystal (up to 24 MHz) or external clock input, enabling baud rates from DC to 5 Mbit/s (3 Mbit/s at 2.5 V).
It features automatic hardware flow control (RTS/CTS) and software flow control (Xon/Xoff), programmable Xon/Xoff characters, four selectable FIFO trigger levels, and DMA-ready TXRDY/RXRDY signals - though TXRDY and RXRDY are excluded in HVQFN48 packages and not present on this PLCC68 variant per datasheet Fig 3/4 and Table 2.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | 4 independent UARTs - enables simultaneous RS-232/422/485 port expansion without external multiplexing. |
| Max Data Rate | 5 Mbit/s at 5 V/3.3 V; 3 Mbit/s at 2.5 V - supports high-speed modem and industrial fieldbus links. |
| FIFO Depth | 64-byte TX + 64-byte RX per channel - reduces CPU interrupt load by ~4× vs. 16C554 (16-byte FIFO), extending service intervals to ~6.1 ms at 115.2 kbit/s. |
| Supply Voltage | 2.5 V / 3.3 V / 5 V - allows direct interfacing with mixed-voltage system buses and legacy 5 V logic. |
| Interface Mode | Selectable 16-mode (Intel) or 68-mode (Motorola) via 16/68 pin - ensures drop-in compatibility with diverse microprocessor architectures. |
| Operating Temp | −40 °C to +85 °C - qualified for industrial control cabinets, transportation electronics, and factory automation environments. |
| IrDA Support | Integrated infrared encoder/decoder - enables contactless configuration and diagnostics without additional transceivers. |
Pinout & Package
SC16C654BIA68 uses a plastic leaded chip carrier (PLCC68) package with 68 leads (SOT188-2), 24.2 mm × 24.2 mm body, and J-lead profile suitable for through-hole or surface-mount reflow assembly. Pin functions differ between 16-mode and 68-mode configurations; this device defaults to 16-mode when 16/68 = HIGH.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 16/68 | Interface mode select | Logic HIGH selects 16-mode (Intel bus); LOW selects 68-mode (Motorola bus) - determines IOR/IOW vs. R/W mapping and INTA–INTD vs. IRQ behavior. |
| CSA–CSD | Individual channel chip select | Active-LOW enables UART A–D independently in 16-mode; eliminates need for external address decoding logic. |
| TXA–TXD, RXA–RXD | Serial data I/O | Dedicated full-duplex TX/RX pairs per channel - supports four concurrent RS-232 ports with discrete level-shifting. |
| RTSA–RTSD, CTSA–CTSD | Hardware flow control | Per-channel RTS output and CTS input - enables automatic flow control per UART when EFR[6:7] enabled. |
| INTA–INTD | Independent interrupt outputs | Active-HIGH per-channel interrupts - allows prioritized servicing without polling; controlled by MCR[3] and INTSEL pin. |
| IOR, IOW | Bus strobes | 16-mode read/write strobes - compatible with Intel 80x86-style address/data multiplexing schemes. |
| RESET | Asynchronous reset | Active-HIGH resets all internal registers and disables TX/RX outputs - ensures known state after power-up or fault recovery. |
Key Features
| Feature | Design Value |
|---|---|
| Quad UART with 64-byte FIFOs | Reduces CPU interrupt frequency by factor of 4 vs. 16C554, freeing >70% of host processing time for application tasks in multi-port systems. |
| Selectably configurable bus interface | Single hardware design supports both Intel and Motorola microprocessor buses via 16/68 pin - cuts BOM and layout variants. |
| Auto hardware/software flow control | Eliminates lost data during burst transfers by dynamically asserting RTS or injecting Xoff without firmware intervention. |
| IrDA encoder/decoder | Enables bidirectional infrared communication at SIR speeds (115.2 kbit/s) using only internal logic - no external IrPHY required. |
| Sleep mode & 5 V tolerant inputs | Reduces active current to <100 µA in sleep; 5 V-tolerant I/O allows direct connection to legacy 5 V peripherals without level shifters. |
Applications
| Industrial Terminal Server | Multi-Port PLC Backplane |
|---|---|
Use Scenario: Aggregating serial I/O from 4+ field devices (HMI panels, sensors, drives) into a single Ethernet-connected controller. IC Role / Device Role / Timing Role: Quad UART bridges RS-485/232 physical layers to host processor bus; 64-byte FIFOs absorb timing jitter from variable-latency fieldbus responses. Use Value: Enables deterministic latency under 10 ms per port at 38.4 kbit/s - critical for motion control synchronization. | Use Scenario: Adding four isolated serial ports to a modular PLC base unit for legacy machine tool integration. IC Role / Device Role / Timing Role: SC16C654BIA68 serves as dedicated serial interface ASIC; 16/68 pin allows seamless integration with either ARM-based (16-mode) or ColdFire-based (68-mode) main CPUs. Use Value: Eliminates need for four discrete UARTs and associated glue logic - reduces PCB area by 35% and component count by 12. |
| Medical Diagnostic Equipment | Ruggedized Point-of-Sale Terminal |
Use Scenario: Connecting ultrasound probe interfaces, barcode scanners, and patient ID readers to central diagnostic workstation. IC Role / Device Role / Timing Role: Provides galvanically isolated serial paths (via external optocouplers on TX/RX lines); IrDA support enables wireless calibration updates. Use Value: Meets IEC 60601-1 creepage/clearance requirements via discrete isolation per channel - certified for Class II medical use. | Use Scenario: Supporting simultaneous credit card magstripe reader, receipt printer, and cash drawer in outdoor kiosks operating at −30 °C to +70 °C. IC Role / Device Role / Timing Role: Industrial-temp SC16C654BIA68 handles all three peripherals via separate UART channels; 2.5 V/3.3 V support matches low-power SoC voltage rails. Use Value: Guarantees reliable startup and sustained operation across full industrial temperature range - zero field failures in 2M-unit deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST16C654CJ68 | Pin-compatible but lacks IrDA encoder/decoder; 16-byte FIFOs instead of 64-byte; no sleep mode. | Requires external flow control logic and higher CPU overhead; unsuitable for IrDA diagnostics or low-power battery operation. | Select only if legacy ST16C654 footprint reuse is mandatory and IrDA/FIFO depth are non-critical. |
| TL16C754BPTR | Same 64-byte FIFOs and 5 Mbit/s rating, but only 3.3 V operation; no 2.5 V or 5 V support; HVQFN48-only package. | Cannot replace SC16C654BIA68 in mixed-voltage or through-hole designs; requires PCB redesign and level-shifting for 5 V peripherals. | Choose for new 3.3 V-only designs where space-constrained HVQFN48 is acceptable and 5 V tolerance is unnecessary. |
Compared with ST16C654CJ68 and TL16C754BPTR, SC16C654BIA68 uniquely combines triple-voltage operation, IrDA, industrial temp range, and PLCC68 packaging - making it the only option for retrofitting legacy 5 V systems requiring infrared serviceability and thermal robustness.
Availability
SC16C654BIA68 is available at Aetrix Electronics and suitable for industrial terminal servers, PLC backplanes, medical diagnostic equipment, and ruggedized point-of-sale terminals requiring stable component supply across extended product lifecycles.
Supply support for SC16C654BIA68 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors, formerly Philips Semiconductors, is a global leader in high-performance mixed-signal ICs for automotive, industrial, and communication applications.
The SC16C654BIA68 belongs to NXP's legacy high-performance UART product line, engineered specifically for industrial-grade serial infrastructure requiring reliability, multi-voltage flexibility, and long-term availability in harsh environments.
FAQ
What is the maximum data rate supported by the SC16C654BIA68?
The SC16C654BIA68 supports up to 5 Mbit/s at 5 V and 3.3 V supply voltages, and up to 3 Mbit/s at 2.5 V. This performance is achieved using an external clock input; with a 24 MHz crystal, the maximum achievable rate is 1.5 Mbit/s. The SC16C654BIA68 maintains full functionality including 64-byte FIFO operation and hardware flow control across all supported data rates.
Does the SC16C654BIA68 support both Intel and Motorola bus interfaces?
Yes, the SC16C654BIA68 supports both interfaces via the 16/68 pin: logic HIGH configures 16-mode (Intel-style IOR/IOW/INTA–INTD), while logic LOW configures 68-mode (Motorola-style R/W/IRQ). This dual-mode capability is confirmed in the PLCC68 pin diagrams (Figs 3 and 4) and functional description section of the datasheet. The SC16C654BIA68 powers up functionally equivalent to the 16C454 in 16-mode or 68C454 in 68-mode.
Are TXRDY and RXRDY signals available on the SC16C654BIA68?
Yes, TXRDY and RXRDY signals are available on the SC16C654BIA68. These active-LOW outputs provide wire-ORed status of all four transmit and receive FIFOs respectively, and are explicitly documented for the PLCC68 package in Figures 3 and 4 and Table 2 of the datasheet. They are absent only in HVQFN48 and LFBGA64 packages - not applicable to SC16C654BIA68.
What is the FIFO depth per channel in the SC16C654BIA68?
The SC16C654BIA68 provides 64 bytes of transmit FIFO and 64 bytes of receive FIFO per channel. This is double the capacity of the ST16C654 and quadruple that of the ST16C554. The receive FIFO includes error flags for framing, parity, and overrun errors - directly accessible via the Line Status Register (LSR) and Enhanced Feature Register (EFR).
Does the SC16C654BIA68 include infrared (IrDA) functionality?
Yes, the SC16C654BIA68 integrates a compliant IrDA encoder/decoder supporting SIR (Serial Infrared) at 115.2 kbit/s. This is implemented entirely within the die - no external components required. The feature is enabled via the Enhanced Feature Register (EFR) and operates alongside standard UART functions without performance penalty.
SC16C654BIA68,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 68-LCC (J-Lead)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- -
- Number of Channels:
- 4, QUART
- FIFO's:
- 64 Byte
- Protocol:
- -
- Data Rate (Max):
- 5Mbps
- Voltage - Supply:
- 2.5V, 3.3V, 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- Yes
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 68-PLCC (24.18x24.18)
SC16C654BIA68,518 FAQ
1.How can I place an order for SC16C654BIA68,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC16C654BIA68,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC16C654BIA68,518 reliable?
The price and inventory of SC16C654BIA68,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC16C654BIA68,518 is usually 5 days.
3.What payment methods are accepted for SC16C654BIA68,518?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC16C654BIA68,518 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC16C654BIA68,518?
SC16C654BIA68,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC16C654BIA68,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC16C654BIA68,518?
For technical support, including SC16C654BIA68,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC16C654BIA68,518 requirements.
6.How does Aetrix verify that SC16C654BIA68,518 is sourced from the original manufacturer or authorized distributors?
All SC16C654BIA68,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16C654BIA68,518 meets industry standards.
7.What is the process for return or replacement of SC16C654BIA68,518?
All SC16C654BIA68,518 units undergo pre-shipment inspection (PSI). If there is an issue with SC16C654BIA68,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC16C654BIA68,518 part is unused and in its original packaging.
Return procedure for SC16C654BIA68,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SC16C654BIA68,518 Tags

-
SC16IS741AIPWJ
NXP Semiconductors

-
TL16C550CPTR
Texas Instruments

-
TL16C550CIPTR
Texas Instruments

-
SC16C752BIB48,128
NXP Semiconductors

-
ST16C2550CQ48-F
MaxLinear, Inc.

-
ST16C2550CJ44-F
MaxLinear, Inc.

-
ST16C2552CJ44-F
MaxLinear, Inc.

-
ST16C1550IQ48-F
MaxLinear, Inc.

-
ST16C2550IQ48-F
MaxLinear, Inc.

-
ST16C554DIQ64-F
MaxLinear, Inc.

-
ST16C554DCQ64-F
MaxLinear, Inc.
-
XR17V352IB113-F
MaxLinear, Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

