NXP Semiconductors SC16C752BIB48,157
- Part No.:
- SC16C752BIB48,157
- Manufacturer:
- NXP Semiconductors
- Package:
- 48-LQFP
- Datasheet:
-
SC16C752BIB48,157.pdf
- Description:
- IC UART DUAL W/FIFO 48-LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SC16C752BIB48,157 from NXP Semiconductors is a dual-channel UART IC supporting 5 V, 3.3 V, and 2.5 V operation with 64-byte transmit/receive FIFOs, hardware/software flow control, and up to 5 Mbit/s data rate at 5 V. It serves as a serial interface bridge between microcontrollers and modems or legacy peripherals in industrial communication gateways and embedded controllers.
For engineers reviewing the SC16C752BIB48,157 datasheet, SC16C752BIB48,157 pinout, SC16C752BIB48,157 application, or SC16C752BIB48,157 equivalent, key selection considerations include dual-channel FIFO depth, auto-RTS/CTS timing behavior, TCR-programmable trigger levels, and LQFP48 package compatibility with legacy SC16C2550-based designs.
Technical Context
The SC16C752BIB48,157 implements two independent UART channels (A and B) with fully separate register sets, interrupt lines (INTA/INTB), and modem control signals (RTS/CTS/DTR/DSR/RI/CD). Each channel features a dedicated 64-byte FIFO with error-flagged receive storage and programmable trigger levels via FCR and TCR registers.
Its baud rate generator uses a prescaler + 16-bit divisor for fine-grained timing control across 5 V (5 Mbit/s), 3.3 V (5 Mbit/s), and 2.5 V (3 Mbit/s) supply conditions. Hardware flow control operates via auto-RTS (halt/resume thresholds in TCR[3:0]/TCR[7:4]) and auto-CTS, while software flow control supports dual Xon/Xoff character sets with optional Xon Any mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual independent UARTs (A and B) with separate I/O, interrupts, and modem control |
| Max Data Rate | 5 Mbit/s at 5 V supply; 3 Mbit/s at 2.5 V - defines maximum serial throughput per channel |
| FIFO Depth | 64-byte TX and RX FIFOs per channel - reduces CPU interrupt load and enables burst DMA transfers |
| Flow Control | Hardware (auto-RTS/auto-CTS) and software (Xon/Xoff with dual-character support) - eliminates overrun/underrun in high-speed links |
| Supply Voltage | 2.5 V, 3.3 V, and 5 V operation - supports mixed-voltage system integration without level shifters |
| Operating Temp | -40 °C to +85 °C - qualified for industrial ambient environments |
| Package | LQFP48 (7 × 7 × 1.4 mm) - standard surface-mount footprint compatible with automated assembly |
Pinout & Package
SC16C752BIB48,157 is housed in a plastic LQFP48 package (SOT313-2) with 48 leads, body size 7 × 7 × 1.4 mm. Pin functions are validated per NXP datasheet Rev. 6.1 (Feb 2025), Figure 2 and Table 2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D7 | 8-bit bidirectional data bus | Parallel interface to host CPU; 3-state outputs enable bus sharing |
| A0–A2 | Address select inputs | Select internal register address (0–7) for read/write access via IOR/IOW |
| CSA / CSB | Channel-select chip enables | Active-low enables for UART A and B - allows independent register access per channel |
| TXA / TXB | Transmit serial outputs | Asynchronous serial output (TTL-level) for each UART channel |
| RXA / RXB | Receive serial inputs | Asynchronous serial input (TTL-level) for each UART channel; 5 V tolerant |
| RTSA / RTSB | Request-to-send outputs | Active-low hardware flow control outputs; auto-controlled when EFR[6] = 1 |
| CTSA / CTSB | Clear-to-send inputs | Active-low hardware flow control inputs; auto-monitored when EFR[7] = 1 |
| INTA / INTB | Interrupt request outputs | Active-high prioritized interrupts per channel; configurable via IER and IIR |
| RXRDYA / RXRDYB | Receive-ready status outputs | Active-low signals indicating FIFO trigger level reached or non-empty state for DMA |
| TXRDYA / TXRDYB | Transmit-ready status outputs | Active-low signals indicating FIFO space available or empty state for DMA |
| XTAL1 / XTAL2 | Clock oscillator terminals | Support crystal (1–25 MHz) or external clock input for baud rate generation |
| RESET | Asynchronous reset input | Active-high resets all registers and outputs; initializes TCR, FCR, and IER to known states |
Key Features
| Feature | Design Value |
|---|---|
| 64-byte FIFO with error flags | Enables high-throughput serial streaming with per-byte parity/framing/error tagging in RX FIFO |
| Programmable TCR trigger levels | Allows independent halt/resume thresholds for auto-RTS (e.g., halt at 60 bytes, resume at 32 bytes) |
| Dual Xon/Xoff character sets | Supports robust software flow control with fallback tokens (Xon1/Xoff1 and Xon2/Xoff2) |
| Internal loopback mode | Permits on-board diagnostics without external cabling - TXn internally routed to RXn path |
| Modem control register (MCR) | Direct software control of DTR/RTS/OP outputs and interrupt enable/disable per channel |
| Enhanced Feature Register (EFR) | Configures auto-flow modes, Xon Any, special character detection, and enhanced interrupt behavior |
Applications
| Industrial Serial Gateway | Legacy Equipment Interface |
|---|---|
Use Scenario: Connecting PLCs, HMIs, and sensors over RS-232/RS-485 using isolated transceivers. IC Role / Device Role / Timing Role: Dual UART bridges parallel CPU bus to two independent serial streams with hardware flow control. Use Value: 64-byte FIFOs absorb burst traffic from multiple field devices; auto-RTS/CTS prevents buffer overrun during variable-latency polling cycles. | Use Scenario: Retrofitting modern microcontrollers into older test equipment with RS-232 debug ports. IC Role / Device Role / Timing Role: Replaces obsolete SC16C2550 with pin/software compatibility while adding FIFO depth and flow control. Use Value: Eliminates need for PCB redesign; supports higher baud rates (up to 5 Mbit/s) and reduces firmware overhead via DMA-ready RDY signals. |
| Multi-Protocol Communication Module | Embedded Modem Controller |
Use Scenario: Simultaneous AT command handling and data tunneling in cellular/Wi-Fi modules. IC Role / Device Role / Timing Role: UART A handles AT command channel; UART B manages data payload stream with independent flow control. Use Value: Independent TCR programming allows asymmetric trigger levels - e.g., 16-byte AT command threshold vs. 48-byte data threshold. | Use Scenario: Managing dial-up modem handshaking and data transfer in point-of-sale terminals. IC Role / Device Role / Timing Role: Full modem signal set (CTS/RTS/DTR/DSR/RI/CD) with status reporting in MSR register. Use Value: Hardware-assisted auto-CTS ensures modem readiness before transmission; ring indicator (RI) triggers real-time call detection interrupts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16C752BIBS | HVQFN32 package (5 × 5 × 0.85 mm); lacks n.c. pins and some modem signals (CDA/DSRA/RIB) | Suitable for space-constrained designs but requires PCB redesign; no carrier detect or ring indicator on channel B | Select SC16C752BIBS only if board area is critical and full modem signal set is not required on both channels. |
| TL16C752BPFG4 | Texas Instruments variant; identical LQFP48 pinout and register map; same 64-byte FIFOs and flow control features | Drop-in replacement with identical functional behavior; TI-specific packaging and traceability | Choose TL16C752BPFG4 when sourcing from TI-authorized channels or requiring TI-specific quality documentation. |
Compared with SC16C752BIB48,157, the SC16C752BIBS offers smaller footprint but reduced modem signal coverage, while TL16C752BPFG4 provides identical functionality with alternate supply-chain assurance - neither requires firmware changes, but only TL16C752BPFG4 guarantees pin-and-register compatibility without signal omission.
Availability
SC16C752BIB48,157 is available at Aetrix Electronics and suitable for industrial serial gateways, legacy equipment interfaces, and multi-protocol communication modules requiring stable component supply and long-term lifecycle support.
Supply support for SC16C752BIB48,157 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The SC16C752BIB48,157 belongs to NXP's legacy UART product line, designed specifically to extend the life of industrial control systems by providing enhanced FIFO depth, flexible voltage operation, and backward-compatible pinouts for SC16C2550-based platforms.
FAQ
What is the maximum baud rate supported by the SC16C752BIB48,157?
The SC16C752BIB48,157 supports up to 5 Mbit/s at 5 V and 3.3 V supply voltages, and up to 3 Mbit/s at 2.5 V. This maximum rate assumes optimal clock source stability and proper termination. The baud rate is generated using a 16-bit programmable divisor and optional prescaler, enabling precise timing across wide frequency ranges.
Does the SC16C752BIB48,157 support hardware flow control on both UART channels?
Yes, the SC16C752BIB48,157 supports independent hardware flow control on both UART A and UART B channels via dedicated RTS/CTS pins (RTSA/CTSA and RTSB/CTSB). Auto-RTS and auto-CTS are enabled separately per channel using bits EFR[6] and EFR[7], allowing asymmetric configuration - for example, enabling auto-CTS on channel A while disabling it on channel B.
How does the SC16C752BIB48,157 handle false start bit detection?
False start bit detection is implemented in the SC16C752BIB48,157 receiver logic to improve noise immunity. When enabled, it rejects spurious low pulses shorter than one bit period that could otherwise be misinterpreted as valid start bits. This feature reduces erroneous character framing in electrically noisy industrial environments without requiring external filtering components.
Can the SC16C752BIB48,157 operate with a 2.5 V supply while maintaining full functionality?
Yes, the SC16C752BIB48,157 operates fully at 2.5 V, including register access, FIFO operation, interrupt generation, and modem control signaling. However, the maximum achievable baud rate is limited to 3 Mbit/s at this voltage, and input pins D0–D7 remain 5 V tolerant - allowing safe interfacing with higher-voltage peripherals without level shifters.
What happens to the SC16C752BIB48,157 outputs during reset?
During an active HIGH reset on the SC16C752BIB48,157, all outputs enter defined states: TXA/TXB go HIGH, RTSA/RTSB/DTRA/DTRB go HIGH, RXRDYA/RXRDYB go HIGH, and TXRDYA/TXRDYB go LOW. Internal registers initialize to documented reset values (e.g., LCR = 1Dh, IER = 00h), ensuring predictable startup behavior without external pull-ups or firmware initialization delays.
SC16C752BIB48,157 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Obsolete
- Features:
- -
- Number of Channels:
- 2, DUART
- FIFO's:
- 64 Byte
- Protocol:
- -
- Data Rate (Max):
- 5Mbps
- Voltage - Supply:
- 2.5V, 3.3V, 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP (7x7)
SC16C752BIB48,157 FAQ
1.How can I place an order for SC16C752BIB48,157 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC16C752BIB48,157 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC16C752BIB48,157 reliable?
The price and inventory of SC16C752BIB48,157 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC16C752BIB48,157 is usually 5 days.
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Once your SC16C752BIB48,157 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC16C752BIB48,157?
For technical support, including SC16C752BIB48,157 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC16C752BIB48,157 requirements.
6.How does Aetrix verify that SC16C752BIB48,157 is sourced from the original manufacturer or authorized distributors?
All SC16C752BIB48,157 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16C752BIB48,157 meets industry standards.
7.What is the process for return or replacement of SC16C752BIB48,157?
All SC16C752BIB48,157 units undergo pre-shipment inspection (PSI). If there is an issue with SC16C752BIB48,157, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC16C752BIB48,157 part is unused and in its original packaging.
Return procedure for SC16C752BIB48,157:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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