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NXP Semiconductors SC16C850LIET,115
- Part No.:
- SC16C850LIET,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 36-TFBGA
- Datasheet:
-
SC16C850LIET,115.pdf
- Description:
- IC UART SINGLE W/FIFO 36TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,352
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Product details
Overview
SC16C850LIET,115 from NXP Semiconductors is a 1.8 V single-channel UART IC with Intel bus (16-mode) interface, 128-byte transmit/receive FIFOs, IrDA 1.0 encoder/decoder, and support for up to 5 Mbit/s serial data rates. It operates across −40 °C to +85 °C and integrates hardware/software flow control, RS-485 auto-turnaround, and programmable baud rate generation for embedded industrial communication systems.
For engineers reviewing the SC16C850LIET,115 datasheet, SC16C850LIET,115 pinout, SC16C850LIET,115 application, or SC16C850LIET,115 equivalent, key selection considerations include TFBGA36 package compatibility, 1.8 V supply operation, 128-byte FIFO interrupt trigger programmability, IrDA 115.2 kbit/s support, and Intel bus timing alignment in high-density PCB designs.
Technical Context
The SC16C850LIET,115 implements a dual-register bank architecture with standard and extended mode register sets accessed via A0–A2 address lines and LCR[7] control. Its UART core supports asynchronous framing with start/stop bits, parity checking, and automatic 9-bit RS-485 address detection enabled by EFR configuration.
Interrupt handling uses priority-encoded ISR with time-out detection (4 character times), while flow control combines RTS/CTS hardware signaling with Xon/Xoff software characters stored in dedicated 8-bit registers. The LOWPWR pin enables immediate oscillator shutdown and host bus isolation for low-power operation without software intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.8 V nominal - enables direct interfacing with modern low-voltage microcontrollers and FPGAs without level translation. |
| Max Data Rate | 5 Mbit/s - achievable with 80 MHz external clock; supports high-speed modem and network interface applications. |
| FIFO Depth | 128-byte TX/RX - reduces CPU interrupt frequency and bus bandwidth demand in burst-data systems. |
| IrDA Support | Version 1.0 at ≤115.2 kbit/s - integrated encoder/decoder eliminates external transceiver components for infrared links. |
| Operating Temp | −40 °C to +85 °C - qualified for industrial control, transportation, and outdoor embedded deployments. |
| Bus Interface | Intel 16-mode only - fixed parallel host interface with IOR/IOW strobes, CS, and A0–A2 addressing. |
| RS-485 Mode | Auto turn-around with programmable delay - enables half-duplex bus control without external logic or timers. |
Pinout & Package
SC16C850LIET,115 is housed in a 3.5 mm × 3.5 mm × 0.8 mm TFBGA36 package (SOT912-1) with 36 solder balls and Pb-free, RoHS-compliant construction. Ball pitch is 0.5 mm; exposed thermal pad is not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1, D4 | VDD | 1.8 V power supply input - requires local decoupling; both balls must be connected to stable 1.8 V rail. |
| C2, C4 | VSS | Signal and power ground - low-impedance return path essential for noise immunity and FIFO stability. |
| C6 | RX | Asynchronous receive input - accepts TTL-level serial data; internally pulled high during reset/idle. |
| C5 | TX | Asynchronous transmit output - drives TTL-level serial stream; high-impedance when disabled or in loopback. |
| B6 | CS | Chip select (active LOW) - enables register access and data transfers only when asserted. |
| D5 | D7 | Data bus bit 7 - bidirectional 8-bit parallel interface; shares timing with IOR/IOW for Intel bus protocol compliance. |
| E4–F6, D6, E5, F5, E6 | D0–D6 | Data bus bits 0–6 - complete 8-bit data path; all must be terminated per Intel bus timing requirements. |
| D1 | INT | Interrupt output (active HIGH) - signals pending UART events (RX ready, TX empty, modem status) to host CPU. |
| B5 | LOWPWR | Low-power enable (active HIGH) - forces immediate oscillator stop and bus isolation; internal 22 kΩ pull-down allows unconnected default. |
| F1 | RESET | Master reset (active HIGH) - initializes all registers to default state and clears FIFO contents on rising edge. |
| A6 | XTAL1 | Clock input - accepts 1.83–80 MHz crystal or external clock; determines maximum baud rate accuracy and throughput. |
| A5 | XTAL2 | Clock output - buffered oscillator output; left open when external clock is applied to XTAL1. |
| E1 | DTR | Data terminal ready (active LOW) - modem control output; driven by MCR[0] to signal host readiness to peripheral devices. |
| D2 | RTS | Request to send (active LOW) - hardware flow control output; de-asserted automatically when RX FIFO nears programmed threshold. |
| D3 | CTS | Clear to send (active LOW) - hardware flow control input; halts TX when logic 0 indicates remote buffer full condition. |
| F2 | DSR | Data set ready (active LOW) - modem status input; reflects peripheral power-on and operational readiness. |
| E3 | CD | Carrier detect (active LOW) - modem status input; indicates active carrier signal presence on telephone line. |
| F3 | RI | Ring indicator (active LOW) - modem status input; triggers interrupt on logic 1 transition during incoming call detection. |
| C1, C3, B1 | A0, A1, A2 | Address select inputs - decode 25+ internal registers including THR/RHR, IER/ISR, MCR/MSR, FCR, LSR, EFR. |
| E6 | IOR | Read strobe (active LOW) - initiates register read cycle in Intel bus mode; synchronized with CS and address lines. |
| D6 | IOW | Write strobe (active LOW) - initiates register write cycle in Intel bus mode; controls register update timing. |
Key Features
| Feature | Design Value |
|---|---|
| 128-byte programmable FIFO trigger levels | Enables precise interrupt scheduling - TX/RX thresholds configurable from 1 to 128 bytes in steps of 1, optimizing CPU load in multi-tasking systems. |
| Integrated IrDA 1.0 encoder/decoder | Eliminates external transceiver - supports 115.2 kbit/s infrared communication with no additional ICs or analog circuitry. |
| Automatic RS-485 driver turn-around | Reduces firmware overhead - hardware-controlled direction switching with user-defined delay prevents bus contention in half-duplex networks. |
| High-resolution clock prescaler (0–15, 1/16-step) | Supports non-standard baud rates - enables accurate 115.2 kbit/s, 921.6 kbit/s, and other fractional rates from integer clock sources. |
| Independent TX/RX enable/disable control | Permits selective channel power gating - disables transmitter or receiver independently to reduce dynamic power in asymmetric traffic scenarios. |
| Enhanced Sleep mode with LOWPWR pin | Reduces system standby current - drops core power consumption by disabling oscillator and isolating bus pins without software register writes. |
Applications
| Industrial PLC Serial Gateway | Medical Device Data Logger |
|---|---|
Use Scenario: Aggregating sensor data from multiple RS-485 field devices into a central controller via isolated UART interface. IC Role / Device Role / Timing Role: UART bridge with auto RS-485 turn-around and 128-byte FIFO buffering to absorb burst telemetry without CPU interruption. Use Value: Eliminates need for external direction-control logic and reduces host polling frequency by 7× compared to 16C550B-class parts. | Use Scenario: Capturing real-time patient vitals from analog front-end ADCs and transmitting securely over infrared to bedside monitor. IC Role / Device Role / Timing Role: IrDA encoder/decoder with hardware flow control ensuring lossless transmission of time-critical waveform data. Use Value: Achieves certified 115.2 kbit/s IR link reliability without adding discrete photodiode/transistor stages or timing-critical firmware. |
| Smart Energy Meter Communication Module | Ruggedized Transportation Telematics Unit |
Use Scenario: Supporting DLMS/COSEM protocol over HAN (Home Area Network) using dual UART channels for simultaneous PLC and RF coexistence. IC Role / Device Role / Timing Role: High-integrity UART with 128-byte FIFOs and error-flagged receive reporting to prevent frame corruption during RF burst interference. Use Value: Maintains >99.99% data integrity under EMI stress where 32-byte FIFO parts exhibit packet loss due to delayed interrupt servicing. | Use Scenario: Enabling CAN-to-serial diagnostics in vehicle ECUs where space-constrained layout demands ultra-small footprint and low thermal dissipation. IC Role / Device Role / Timing Role: Compact TFBGA36 UART with 1.8 V operation and −40 °C to +85 °C rating for under-hood deployment. Use Value: Reduces board area by 42% versus HVQFN32 alternatives while maintaining identical register compatibility and interrupt latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16C850LIBS,118 | Identical UART core and register set, but packaged in HVQFN32 (5 mm × 5 mm) with exposed thermal pad. | Preferred for thermally demanding applications requiring enhanced heat dissipation; incompatible pinout and board layout. | Select SC16C850LIBS,118 only when thermal performance outweighs size constraints and PCB redesign is acceptable. |
| TL16C750IPM | 1.8 V UART with 64-byte FIFOs, no IrDA, no RS-485 auto-turnaround, and fixed 16-byte trigger levels. | Suitable for basic serial bridging where advanced flow control and infrared are unnecessary. | Choose TL16C750IPM for cost-sensitive designs lacking IrDA or RS-485 requirements, accepting reduced FIFO depth and inflexible interrupt thresholds. |
Compared with SC16C850LIBS,118, the SC16C850LIET,115 offers superior space efficiency in TFBGA36 but lacks thermal pad support; versus TL16C750IPM, it delivers 2× FIFO depth, IrDA integration, and fully programmable trigger levels-critical for deterministic real-time serial subsystems.
Availability
SC16C850LIET,115 is available at Aetrix Electronics and suitable for industrial PLC gateways, medical data loggers, smart energy meters, and ruggedized telematics units requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for SC16C850LIET,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in mixed-signal and interface IP.
The SC16C850LIET,115 belongs to NXP's legacy high-performance UART product line, designed specifically for space-constrained, low-power industrial communication systems requiring robust serial bridging with advanced flow control and infrared capability.
FAQ
What is the maximum serial data rate supported by the SC16C850LIET,115?
The SC16C850LIET,115 supports up to 5 Mbit/s when driven by an 80 MHz external clock. With a crystal oscillator, the maximum achievable rate is 1.5 Mbit/s. These limits are defined by the internal baud rate generator architecture and timing margins validated across the −40 °C to +85 °C operating range. The SC16C850LIET,115 achieves this performance while maintaining full register compatibility with earlier 16C650B devices.
Does the SC16C850LIET,115 support both Intel and Motorola bus interfaces?
No, the SC16C850LIET,115 is configured exclusively for Intel 16-mode bus interface, as indicated by its suffix "IET" and confirmed in the ordering information table. The 16/68 pin is internally pulled up, fixing operation in Intel mode with IOR/IOW strobes. For Motorola 68-mode support, the SC16C850LIBS variant must be selected. This distinction is hardwired in the SC16C850LIET,115 silicon and cannot be changed via configuration.
How does the SC16C850LIET,115 implement RS-485 auto turn-around?
The SC16C850LIET,115 provides hardware-controlled RS-485 direction switching via its AFCR1 and RS485TIME registers. When enabled, the UART automatically asserts DE (driver enable) before transmission and de-asserts it after the final stop bit, with programmable delay to accommodate transceiver propagation delays. This function operates independently of CPU intervention and is fully compatible with the SC16C850LIET,115's 128-byte FIFO and interrupt structure.
Can the SC16C850LIET,115 operate without an external crystal?
Yes, the SC16C850LIET,115 can operate with an external clock source applied to XTAL1, eliminating the need for a crystal. In this configuration, XTAL2 must be left open. The device accepts clock inputs from 1.83 MHz to 80 MHz, enabling precise baud rate generation for non-standard communication protocols. All SC16C850LIET,115 timing specifications, including 5 Mbit/s maximum rate, assume use of an external clock within this range.
What is the purpose of the LOWPWR pin on the SC16C850LIET,115?
LOWPWR is an active-HIGH pin that forces the SC16C850LIET,115 into immediate low-power mode: the internal oscillator stops, and host interface pins (D0–D7, A0–A2, IOR, IOW, CS, INT) are electrically isolated from the bus to minimize leakage. Exiting low-power mode requires de-asserting LOWPWR, which triggers an automatic hardware reset. This behavior is intrinsic to the SC16C850LIET,115 design and requires no firmware initialization.
SC16C850LIET,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 36-TFBGA
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- -
- Number of Channels:
- 1, UART
- FIFO's:
- 128 Byte
- Protocol:
- RS485
- Data Rate (Max):
- 5Mbps
- Voltage - Supply:
- 1.8V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- Yes
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-TFBGA (3.5x3.5)
SC16C850LIET,115 FAQ
1.How can I place an order for SC16C850LIET,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC16C850LIET,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC16C850LIET,115 reliable?
The price and inventory of SC16C850LIET,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC16C850LIET,115 is usually 5 days.
3.What payment methods are accepted for SC16C850LIET,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC16C850LIET,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC16C850LIET,115?
SC16C850LIET,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC16C850LIET,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC16C850LIET,115?
For technical support, including SC16C850LIET,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC16C850LIET,115 requirements.
6.How does Aetrix verify that SC16C850LIET,115 is sourced from the original manufacturer or authorized distributors?
All SC16C850LIET,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16C850LIET,115 meets industry standards.
7.What is the process for return or replacement of SC16C850LIET,115?
All SC16C850LIET,115 units undergo pre-shipment inspection (PSI). If there is an issue with SC16C850LIET,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC16C850LIET,115 part is unused and in its original packaging.
Return procedure for SC16C850LIET,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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