NXP Semiconductors SC16C852VIET,115
- Part No.:
- SC16C852VIET,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 36-TFBGA
- Datasheet:
-
SC16C852VIET,115.pdf
- Description:
- IC UART DUAL W/FIFO 36TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,402
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SC16C852VIET from NXP Semiconductors is a 1.8 V dual-channel UART IC with 128-byte transmit/receive FIFOs, IrDA 1.0 support (up to 115.2 kbit/s), XScale VLIO bus interface, and programmable baud rate generators enabling up to 5 Mbit/s operation - used in industrial embedded systems requiring high-throughput serial communication with low CPU overhead.
For engineers reviewing the SC16C852VIET datasheet, SC16C852VIET pinout, SC16C852VIET application, or SC16C852VIET equivalent, key selection criteria include TFBGA36 package compatibility, 128-byte FIFO interrupt trigger programmability, RS-485 automatic driver turn-around timing control, hardware/software flow control flexibility, and industrial temperature range (−40 °C to +85 °C) operation.
Technical Context
The SC16C852VIET implements two independent UART channels sharing a single 8-bit multiplexed VLIO address/data bus (AD0–AD7), with channel selection via CS and A6. Each channel features dedicated modem control signals (RTS/CTS/DTR/DSR/RI/CD), independent transmitter/receiver enable/disable, and dual-mode FIFO operation (32-byte backward-compatible or 128-byte extended mode).
It supports three flow control modes: automatic hardware (RTS/CTS or DTR/DSR mapping), software (Xon/Xoff with 1- or 2-character detection), and hybrid configurations using FLWCNTH/FLWCNTL for precise receive buffer threshold management - all configurable via EFR, FCR, and enhanced register sets accessible through LCR[7] and EFCR gating.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.8 V nominal - enables direct interfacing with XScale processor I/O without level translation. |
| Max Data Rate | 5 Mbit/s with 80 MHz external clock - supports high-speed modem and networking applications. |
| FIFO Depth | 128-byte TX/RX per channel - reduces CPU interrupt frequency and improves data throughput in multi-channel environments. |
| IrDA Support | IrDA 1.0 compliant encoder/decoder - enables infrared wireless serial links up to 115.2 kbit/s. |
| Operating Temp | −40 °C to +85 °C - qualified for industrial and extended-temperature embedded deployments. |
| RS-485 Mode | Automatic driver turn-around with programmable delay - eliminates external timing logic in half-duplex bus systems. |
| Power Control | LOWPWR pin (active HIGH) - shuts down oscillator and isolates host bus to minimize standby current. |
Pinout & Package
SC16C852VIET is housed in a 3.5 × 3.5 × 0.8 mm TFBGA36 package with 36 solder balls, optimized for space-constrained industrial PCBs. Pin functions are defined per NXP SOT912-1 specification.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AD0–AD7 | Address/Data Bus | 8-bit multiplexed bidirectional bus for register access and channel selection (A6 selects UART A/B). |
| CS | Chip Select | Active-LOW enable for VLIO transactions - required to initiate any register read/write cycle. |
| IOR / IOW | Read/Write Strobe | Edge-triggered control signals initiating host-initiated register transfers over VLIO interface. |
| LLA | Latch Lower Address | Active-LOW signal separating VLIO address phase (AD0–AD7 = address) from data phase (AD0–AD7 = data). |
| INTA / INTB | Channel Interrupt Output | Open-drain outputs indicating FIFO status, error conditions, or modem events per channel - software-configurable active/3-state mode. |
| TXA / RXA / TXB / RXB | Serial I/O | Dedicated full-duplex UART channel pins - support RS-232, RS-485 (with auto-turnaround), or IrDA physical layer interfacing. |
| RTSA / CTSA / DTRA / DSRA / RIA / CDA | Modem Control | Standard 6-wire modem interface per channel - fully software-controllable for legacy or custom protocol stacks. |
| LOWPWR | Low Power Enable | Active-HIGH entry into power-down mode - resets internal state on de-assertion, with internal pull-down for safe unconnected use. |
Key Features
| Feature | Design Value |
|---|---|
| 128-byte programmable FIFO trigger levels | Enables fine-grained interrupt scheduling - 128 discrete TX/RX trigger thresholds reduce CPU polling overhead in real-time systems. |
| Independent TX/RX baud rate generators | Allows asynchronous full-duplex operation at different speeds per channel - critical for bridging mismatched serial peripherals. |
| RS-485 automatic driver turn-around | Eliminates external timing circuitry - programmable delay ensures clean half-duplex bus transitions without data corruption. |
| High-resolution clock prescaler (0–15, 1/16-step) | Permits precise non-standard baud rates from arbitrary input clocks - essential for legacy device interoperability. |
| Extended mode register access (EFR, FLWCNTH/L) | Unlocks advanced flow control and FIFO configuration - required for 128-byte mode and dynamic buffer management. |
Applications
| Industrial PLC Serial Gateway | Medical Device Data Logger |
|---|---|
Use Scenario: Aggregating sensor data from multiple RS-485 field devices into a central controller via dual UART channels. IC Role / Device Role / Timing Role: Dual UART bridge with automatic RS-485 turn-around and hardware flow control managing concurrent Modbus RTU streams. Use Value: 128-byte FIFOs prevent data loss during burst transmissions; programmable RTS delay ensures reliable bus arbitration across varying cable lengths. | Use Scenario: Capturing diagnostic telemetry from ECG and pulse oximeter modules over isolated RS-232 links in battery-powered portable equipment. IC Role / Device Role / Timing Role: Low-power serial interface IC handling time-stamped patient data uploads while minimizing CPU wake cycles. Use Value: 1.8 V operation and LOWPWR pin reduce system standby current; IrDA support enables secure wireless firmware updates without physical connectors. |
| Network Equipment Management Port | Automated Test Equipment (ATE) |
Use Scenario: Providing out-of-band console access and firmware update capability for routers and switches via dedicated management UART. IC Role / Device Role / Timing Role: Dual-channel UART with Xon/Xoff software flow control and 128-byte RX FIFO buffering CLI command streams. Use Value: Programmable Xon/Xoff characters prevent command overflow during rapid terminal input; extended FIFO depth accommodates large configuration file transfers. | Use Scenario: Controlling multiple instrumentation peripherals (oscilloscopes, power supplies) simultaneously via RS-232 in automated test racks. IC Role / Device Role / Timing Role: High-reliability UART interface with independent TX/RX baud rate control synchronizing diverse instrument protocols. Use Value: Independent baud generators allow simultaneous 9600 bps GPIB-to-serial translation and 115.2 kbps debug logging - no shared clock constraints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16C752BIBS,118 | Same 1.8 V dual UART architecture but HVQFN48 package; 32-byte FIFOs (not 128-byte); no IrDA; max 3 Mbit/s. | Lacks extended FIFO, IrDA, and RS-485 auto-turnaround - suitable only for cost-sensitive, lower-throughput designs. | Select when board layout uses HVQFN48 and 32-byte FIFO suffices; verify clocking and feature set against SC16C852VIET requirements. |
| TL16C752CPTR | Texas Instruments part; 3.3 V supply; 64-byte FIFOs; no IrDA; no RS-485 auto-turnaround; software compatible with SC16C652B only. | Requires level-shifting for XScale VLIO; limited FIFO depth and missing industrial temp grade (0 °C to 70 °C). | Consider only if existing TI ecosystem mandates pin compatibility with TL16C752 series; not drop-in for SC16C852VIET. |
Compared with SC16C752BIBS,118 and TL16C752CPTR, the SC16C852VIET delivers higher FIFO depth, integrated IrDA, RS-485 timing automation, and guaranteed industrial temperature operation - making it the sole option among the three for demanding embedded serial gateway applications.
Availability
SC16C852VIET is available at Aetrix Electronics and suitable for industrial PLC gateways, medical data loggers, network equipment management ports, and automated test equipment requiring stable component supply across long production lifecycles.
Supply support for SC16C852VIET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.
The SC16C852VIET belongs to NXP's high-performance UART family designed specifically for low-voltage, high-throughput serial bridging in XScale-based embedded systems - emphasizing FIFO efficiency, flexible flow control, and industrial reliability.
FAQ
What is the maximum serial data rate supported by the SC16C852VIET?
The SC16C852VIET supports up to 5 Mbit/s when driven by an 80 MHz external clock. With an internal crystal oscillator, the maximum achievable rate is 1.5 Mbit/s. These values are measured and specified in the official NXP datasheet Rev. 5 (2011), and the SC16C852VIET achieves this performance while maintaining 1.8 V operation and full 128-byte FIFO functionality.
Does the SC16C852VIET support RS-485 half-duplex operation?
Yes, the SC16C852VIET supports RS-485 half-duplex operation with automatic driver turn-around. This feature is enabled via the RS485TIME register and requires no external timing components. The SC16C852VIET asserts DE (driver enable) automatically before transmission and de-asserts it after the stop bit, with programmable delay to accommodate bus propagation delays - a confirmed function documented in Section 6.2 of the SC16C852VIET datasheet.
How does the SC16C852VIET handle low-power operation?
The SC16C852VIET implements low-power operation via the LOWPWR pin (ball F1). When asserted HIGH, the internal oscillator halts and host interface pins are isolated to reduce leakage current. Upon de-assertion, the SC16C852VIET performs an automatic hardware reset. This behavior is electrically verified and matches the functional description in Section 5.2 and Section 6 of the SC16C852VIET product data sheet.
Is the SC16C852VIET pin-compatible with the SC16C652B?
No, the SC16C852VIET is not pin-compatible with the SC16C652B due to its TFBGA36 package and expanded VLIO interface (AD0–AD7, LLA, CS, IOR/IOW). However, the SC16C852VIET is software-compatible with the SC16C652B after reset - meaning register maps and initialization sequences align where overlapping functionality exists, as explicitly stated in Section 6 of the SC16C852VIET datasheet.
What IrDA version and data rate does the SC16C852VIET support?
The SC16C852VIET supports IrDA version 1.0 with data rates up to 115.2 kbit/s, implemented via integrated encoder/decoder circuitry. This capability is confirmed in the "Features and benefits" section and Section 6.10 of the official SC16C852VIET datasheet, and operates independently of the main UART data path - allowing concurrent IrDA and RS-232/RS-485 communication on separate channels.
SC16C852VIET,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 36-TFBGA
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- -
- Number of Channels:
- 2, DUART
- FIFO's:
- 128 Byte
- Protocol:
- RS485
- Data Rate (Max):
- 5Mbps
- Voltage - Supply:
- 1.8V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- Yes
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-TFBGA (3.5x3.5)
SC16C852VIET,115 FAQ
1.How can I place an order for SC16C852VIET,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC16C852VIET,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC16C852VIET,115 reliable?
The price and inventory of SC16C852VIET,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC16C852VIET,115 is usually 5 days.
3.What payment methods are accepted for SC16C852VIET,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC16C852VIET,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC16C852VIET,115?
SC16C852VIET,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC16C852VIET,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC16C852VIET,115?
For technical support, including SC16C852VIET,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC16C852VIET,115 requirements.
6.How does Aetrix verify that SC16C852VIET,115 is sourced from the original manufacturer or authorized distributors?
All SC16C852VIET,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16C852VIET,115 meets industry standards.
7.What is the process for return or replacement of SC16C852VIET,115?
All SC16C852VIET,115 units undergo pre-shipment inspection (PSI). If there is an issue with SC16C852VIET,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC16C852VIET,115 part is unused and in its original packaging.
Return procedure for SC16C852VIET,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SC16C852VIET,115 Tags

-
SC16IS741AIPWJ
NXP Semiconductors

-
TL16C550CPTR
Texas Instruments

-
TL16C550CIPTR
Texas Instruments

-
SC16C752BIB48,128
NXP Semiconductors

-
ST16C2550CQ48-F
MaxLinear, Inc.

-
ST16C2550CJ44-F
MaxLinear, Inc.

-
ST16C2552CJ44-F
MaxLinear, Inc.

-
ST16C1550IQ48-F
MaxLinear, Inc.

-
ST16C2550IQ48-F
MaxLinear, Inc.

-
ST16C554DIQ64-F
MaxLinear, Inc.

-
ST16C554DCQ64-F
MaxLinear, Inc.
-
XR17V352IB113-F
MaxLinear, Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

