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NXP Semiconductors SC16IS752IPW,112

Part No.:
SC16IS752IPW,112
Manufacturer:
NXP Semiconductors
Category:
Controllers
Package:
28-TSSOP (0.173", 4.40mm Width)
Datasheet:
AetrixSC16IS752IPW,112.pdf
Description:
IC UART DUAL 12C/SPI 28TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:11,076

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Product details

Overview

SC16IS752IPW,112 from NXP Semiconductors is a dual-channel UART IC with I²C-bus or SPI interface, 64-byte TX/RX FIFOs, IrDA SIR support up to 115.2 kbit/s, and 8 programmable GPIOs - used in battery-powered industrial gateways for protocol bridging between microcontrollers and RS-232/RS-485 peripherals.

For engineers reviewing the SC16IS752IPW,112 datasheet, SC16IS752IPW,112 pinout, SC16IS752IPW,112 application, or SC16IS752IPW,112 equivalent, this page delivers verified electrical specs, TSSOP28 package mapping, UART channel A/B signal roles, hardware/software flow control implementation details, and validated alternative parts for embedded serial expansion.

Technical Context

The SC16IS752IPW,112 implements two independent full-duplex UART channels sharing a single I²C-bus (max 400 kbit/s) or SPI (max 4 Mbit/s) host interface, with register compatibility to the 16C450. Its internal architecture includes separate 64-byte transmit and receive FIFOs per channel, programmable trigger levels via FCR/TLR registers, and integrated auto RTS/CTS hardware flow control logic tied to RX FIFO thresholds.

It supports 5-bit to 8-bit character formats, 1/1.5/2 stop bits, even/odd/no parity, and line break detection. Sleep mode draws <30 μA at 3.3 V when EFR[4] and IER[4] are set, and IrDA SIR encoding/decoding is implemented in hardware with fixed 115.2 kbit/s operation - distinct from the SC16IS762's 1.152 Mbit/s capability.

Key Specifications

Parameter Value and Actual Design Meaning
Interface I²C-bus (Fast-mode, 400 kbit/s) or SPI (Mode 0, 4 Mbit/s); selected by I2C/SPI pin logic level
UART Channels Dual independent full-duplex UARTs (Channel A and Channel B), each with dedicated TX/RX/RTS/CTS pins
FIFO Depth 64 bytes per channel for both transmit and receive; reduces host CPU interrupt load in burst data transfers
Max Baud Rate 5 Mbit/s in 16× clock mode; requires external crystal or clock source on XTAL1/XTAL2
IrDA Support Built-in IrDA SIR encoder/decoder at 115.2 kbit/s only - not 1.152 Mbit/s (that is exclusive to SC16IS762)
GPIO Pins 8 bidirectional programmable I/O pins (GPIO0–GPIO7), configurable as modem control signals or general-purpose I/O
Supply Voltage 2.5 V or 3.3 V operation; 5 V tolerant inputs simplify level-shifting in mixed-voltage systems

Pinout & Package

TSSOP28 package (SOT361-1), 4.4 mm body width, lead pitch 0.65 mm; thermal pad not present - suitable for compact PCB layouts in portable equipment.

Pin/Terminal Circuit Role Design Meaning
RTSA / RTSB UART request-to-send output (active LOW) Hardware flow control output per channel; driven LOW automatically when RX FIFO has space (Auto-RTS enabled)
CTSA / CTSB UART clear-to-send input (active LOW) Hardware flow control input per channel; blocks TX when HIGH (Auto-CTS enabled)
TXA / TXB UART transmitter output Asynchronous serial output for Channel A/B; compatible with RS-232/RS-485 transceivers
RXA / RXB UART receiver input Asynchronous serial input for Channel A/B; accepts TTL-level signals directly
IRQ Interrupt output (open-drain) Active-LOW shared interrupt signaling seven prioritized event types (RX ready, TX empty, modem status, etc.)
I2C/SPI Interface select input Logic HIGH = I²C mode; logic LOW = SPI mode - configures pin functions (SDA/SCL vs. SI/SO/SCLK/CS)
RESET Hardware reset input (active LOW) Asynchronous reset of all internal registers and outputs (TX, RTS go HIGH; IRQ pulled HIGH externally)
GPIO0–GPIO7 Programmable I/O terminals Configurable as general-purpose I/O or modem control signals (DSR/DTR/RI/CD) via IOControl register

Key Features

Feature Design Value
Auto hardware flow control Independent Auto-RTS and Auto-CTS per UART channel, eliminating overrun errors without host software intervention
Software flow control Programmable Xon/Xoff characters (single or dual sets) with configurable comparison logic for RX/TX control
RS-485 driver direction control Automatic RTS-driven direction control with polarity inversion option - simplifies half-duplex bus management
Backward register compatibility Fully compatible with 16C450 register map - enables drop-in software porting from legacy UART platforms
Sleep mode current <30 μA at 3.3 V - achieved by disabling clocks to UART cores while retaining register state and interrupt capability

Applications

Industrial Serial Gateway Portable Diagnostic Tool

Use Scenario: Connecting PLCs and sensors over RS-485 to an ARM-based controller via I²C.

IC Role / Device Role / Timing Role: Dual UART bridges I²C host to two independent RS-485 buses; handles framing, flow control, and address detection.

Use Value: Eliminates need for discrete level shifters and external flow control logic; 64-byte FIFOs absorb burst traffic from field devices.

Use Scenario: Handheld medical device communicating with legacy ECG monitors via RS-232.

IC Role / Device Role / Timing Role: UART translates I²C commands from MCU into asynchronous serial frames; IrDA SIR enables IR-based configuration sync.

Use Value: Enables battery life extension via <30 μA sleep mode; 8 GPIOs drive LED indicators and detect probe insertion.

Factory Automation HMI Smart Energy Meter Interface

Use Scenario: Touchscreen HMI panel interfacing with motor drives and safety controllers using dual RS-232 links.

IC Role / Device Role / Timing Role: Provides two isolated UART paths with independent baud rate generators and hardware flow control per link.

Use Value: Prevents data loss during high-speed parameter uploads; auto RTS/CTS coordination avoids buffer overflow under variable load.

Use Scenario: Two-way communication between meter SoC and AMI module (RS-485) plus optical port (IrDA).

IC Role / Device Role / Timing Role: Manages simultaneous RS-485 telemetry and IrDA firmware updates using shared I²C host interface.

Use Value: Reduces BOM count by integrating dual UART + IrDA + GPIOs in one TSSOP28 package; 5 V tolerant inputs ease integration with legacy optical modules.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual UART with I²C/SPI interface applications.

Alternative Part Technical Difference Application Difference Selection Advice
SC16IS752IBS HVQFN32 package (5 × 5 mm), thermal pad, 32-pin layout; identical electrical specs and register set Better thermal performance and higher I/O density; requires re-layout for smaller footprint and soldering of exposed pad Select for space-constrained, thermally demanding designs where PCB real estate allows HVQFN routing.
SC16IS762IPW Same TSSOP28 package but supports 15 Mbit/s SPI and 1.152 Mbit/s IrDA SIR - not 115.2 kbit/s Enables faster host interface throughput and higher-speed IR communication; incompatible IrDA timing Choose only if 15 Mbit/s SPI bandwidth or 1.152 Mbit/s IrDA is required; otherwise SC16IS752IPW,112 is functionally sufficient.

Compared with SC16IS752IBS, the SC16IS752IPW,112 offers easier hand-soldering and standard TSSOP assembly, while SC16IS762IPW adds speed at the cost of IrDA incompatibility - making SC16IS752IPW,112 optimal for cost-sensitive, battery-powered dual-UART applications requiring proven 115.2 kbit/s IrDA and 400 kbit/s I²C interoperability.

Availability

SC16IS752IPW,112 is available at Aetrix Electronics and suitable for factory automation gateways, portable diagnostic tools, and smart energy meter interfaces requiring stable component supply across extended product lifecycles.

Supply support for SC16IS752IPW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.

The SC16IS752IPW,112 belongs to NXP's serial interface bridge IC family, designed specifically to simplify microcontroller expansion with robust, low-power dual UART functionality in space-constrained embedded systems.

FAQ

What interface modes does the SC16IS752IPW,112 support?

The SC16IS752IPW,112 supports either I²C-bus (Fast-mode, up to 400 kbit/s) or SPI (Mode 0, up to 4 Mbit/s), selected by the logic level on the I2C/SPI pin. It does not support both simultaneously. Pin functions (e.g., SDA/SCL vs. SI/SO) are dynamically reassigned based on this selection, and the device operates in target-only mode for both interfaces.

Does the SC16IS752IPW,112 support IrDA at 1.152 Mbit/s?

No, the SC16IS752IPW,112 supports IrDA SIR only at 115.2 kbit/s. The 1.152 Mbit/s IrDA capability is exclusive to the SC16IS762 variant. This distinction is explicitly documented in the datasheet - attempting to operate SC16IS752IPW,112 at 1.152 Mbit/s will result in non-compliant IrDA signaling and failed handshakes.

How many GPIOs does the SC16IS752IPW,112 provide, and can they be used as modem control signals?

The SC16IS752IPW,112 provides eight bidirectional GPIO pins (GPIO0–GPIO7). Via the IOControl register, each can be configured either as general-purpose I/O or as modem control signals - DSRA/DTRA/CDA/RIA for Channel A and DSRB/DTRB/CDB/RIB for Channel B - enabling direct connection to RS-232 transceivers without external logic.

What is the FIFO depth per UART channel in the SC16IS752IPW,112?

The SC16IS752IPW,112 provides 64 bytes of transmit FIFO and 64 bytes of receive FIFO for each of its two UART channels. Each received byte in the RX FIFO includes three additional bits of error status, and FIFO trigger levels are programmable via the Trigger Level Register (TLR) or selectable via the FIFO Control Register (FCR).

Is the SC16IS752IPW,112 pin-compatible with the 16C450 UART?

The SC16IS752IPW,112 is not physically pin-compatible with the 16C450, which uses a 40-pin DIP package and parallel bus interface. However, its internal register map is fully backward compatible with the 16C450, allowing existing UART driver software to be ported with minimal modification - provided the host interface (I²C/SPI) and FIFO management logic are adapted.

SC16IS752IPW,112 Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Package/Case:
28-TSSOP (0.173", 4.40mm Width)
Programmable:
Not Verified
Protocol:
RS232, RS485
Function:
Controller
Interface:
I2C, SPI, UART
Standards:
-
Voltage - Supply:
2.5V, 3.3V
Current - Supply:
2mA
Operating Temperature:
-40°C ~ 95°C
Supplier Device Package:
28-TSSOP
Grade:
-
Qualification:
-

SC16IS752IPW,112 FAQ

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Please submit a Request for Quotation (RFQ) for SC16IS752IPW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

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6.How does Aetrix verify that SC16IS752IPW,112 is sourced from the original manufacturer or authorized distributors?

All SC16IS752IPW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16IS752IPW,112 meets industry standards.

7.What is the process for return or replacement of SC16IS752IPW,112?

All SC16IS752IPW,112 units undergo pre-shipment inspection (PSI). If there is an issue with SC16IS752IPW,112, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SC16IS752IPW,112 part is unused and in its original packaging.

Return procedure for SC16IS752IPW,112:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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