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NXP Semiconductors SC16IS762IBS,128
- Part No.:
- SC16IS762IBS,128
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
SC16IS762IBS,128.pdf
- Description:
- IC DUAL UART 64BYTE 32HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,189
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Product details
Overview
SC16IS762IBS,128 from NXP Semiconductors is a dual-channel UART IC with I²C/SPI interface, 64-byte TX/RX FIFOs, IrDA SIR support up to 1.152 Mbit/s, and eight programmable GPIOs - used in industrial RS-485 gateways and battery-powered telemetry modules for protocol bridging between microcontrollers and legacy serial peripherals.
For engineers reviewing the SC16IS762IBS,128 datasheet, SC16IS762IBS,128 pinout, SC16IS762IBS,128 application, or SC16IS762IBS,128 equivalent, this page delivers verified pin functions, SPI clock speed (15 Mbit/s), IrDA SIR capability, FIFO trigger control, and hardware flow control implementation details essential for embedded serial interface design.
Technical Context
The SC16IS762IBS,128 implements two independent 16C450-compatible UART channels with fully programmable framing (5–8 bit, parity, 1/1.5/2 stop bits), auto RTS/CTS hardware flow control using TCR-defined halt/resume levels, and software Xon/Xoff flow control with dual-character support. Its register set enables drop-in software porting from legacy UART platforms.
It operates in either I²C (Fast-mode, 400 kbit/s) or SPI (Mode 0, 15 Mbit/s) target mode, selected via the I2C/SPI pin; supports 2.5 V or 3.3 V supply; features sleep current <30 μA; and integrates IrDA encoder/decoder with 1.152 Mbit/s SIR compliance - distinct from the SC16IS752IBS which caps at 115.2 kbit/s.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Interface | I²C-bus (400 kbit/s) or SPI (15 Mbit/s, Mode 0), selectable via I2C/SPI pin |
| UART Channels | Dual full-duplex UARTs, each with independent 64-byte TX/RX FIFOs and 16C450 register compatibility |
| IrDA Support | Built-in IrDA SIR encoder/decoder supporting 1.152 Mbit/s - exclusive to SC16IS762 variant |
| GPIO Pins | Eight bidirectional I/O pins, configurable as modem control signals (DTR/DSR/RTS/CTS/RI/CD) or general-purpose |
| Supply Voltage | 2.5 V or 3.3 V operation; 5 V tolerant inputs; industrial temperature range (−40 °C to +95 °C) |
| Power Efficiency | Sleep current <30 μA at 3.3 V; enabled via EFR[4] and IER[4] |
| Package | HVQFN32 (5 × 5 × 0.85 mm), thermally enhanced with exposed center pad requiring PCB ground connection |
Pinout & Package
HVQFN32 package with 32 terminals, 5 mm × 5 mm body, 0.85 mm height, and exposed thermal pad on underside requiring soldered ground connection per NXP layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (RXA) | Channel A receiver input | Serial data input for UART A; disabled during local loopback mode |
| 2 (RESET) | Hardware reset input | Active-low asynchronous reset; resets internal registers but preserves DLL/DLH/XON/XOFF values |
| 3 (XTAL1) | Clock input | Crystal oscillator input or external clock source; supports 1–25 MHz reference |
| 4 (XTAL2) | Clock output | Crystal oscillator output; left open when external clock drives XTAL1 |
| 5, 13, 28 (VDD) | Power supply | 3.3 V or 2.5 V supply; three dedicated VDD pins for noise reduction and decoupling |
| 12, 21, 29 (VSS) | Ground | Three GND pins plus exposed center pad - all must be connected to PCB ground plane |
| 6 (I2C/SPI) | Interface select | Logic HIGH = I²C mode; LOW = SPI mode; determines function of CS/A0, SI/A1, SO, SCL/SCLK, SDA pins |
| 7 (CS/A0) | SPI chip select / I²C address bit | In SPI mode: active-low chip select; in I²C mode: LSB of 7-bit slave address (with A1) |
| 8 (SI/A1) | SPI data input / I²C address bit | In SPI mode: MOSI input; in I²C mode: MSB of 7-bit slave address (with A0) |
| 9 (SO) | SPI data output | 3-stateable MISO output; undefined (NC) in I²C mode |
| 10 (SCL/SCLK) | Clock input | In I²C mode: SCL; in SPI mode: SCLK; Schmitt-triggered for noise immunity |
| 11 (SDA) | I²C data I/O | Open-drain bidirectional I²C bus line; must be pulled up externally; NC in SPI mode |
| 14 (IRQ) | Interrupt output | Open-drain active-low interrupt; requires external pull-up (1 kΩ @ 3.3 V); signals 7 prioritized interrupt types |
| 15–16 (CTSA/CTSB) | Channel A/B clear-to-send inputs | Active-low modem status inputs; enable Auto-CTS when EFR[7] = 1; monitored by MSR[4] |
| 17–18 (GPIO0/DSRB, GPIO1/DTRB) | Programmable I/O / modem signals | Configurable via IOControl register bit 2 (DSR/DTR) or general-purpose I/O; supports interrupt-on-change |
| 19–20 (GPIO2/CDB, GPIO3/RIB) | Programmable I/O / modem signals | Same configuration flexibility as GPIO0/GPIO1; CDB = CD B, RIB = RI B |
| 22–23 (TXB, RXB) | Channel B transmitter/receiver | Full-duplex serial I/O for UART B; TXB disabled in loopback; RXB internally fed from TXB in loopback |
| 24–25 (GPIO4/DSRA, GPIO5/DTRA) | Programmable I/O / modem signals | Configurable via IOControl register bit 1 (DSR/DTR) or general-purpose I/O |
| 26–27 (GPIO6/CDA, GPIO7/RIA) | Programmable I/O / modem signals | CDA = CD A, RIA = RI A; same configuration options as other GPIOs |
| 30–31 (RTSA, CTSA) | Channel A request-to-send/clear-to-send | RTSA is open-drain output; CTSA is input; both used only when Auto-RTS/CTS enabled in EFR |
| 32 (TXA) | Channel A transmitter output | Serial data output for UART A; disabled in loopback mode; driven HIGH after reset |
Key Features
| Feature | Design Value |
|---|---|
| Auto hardware flow control | Independent Auto-RTS and Auto-CTS per channel using TCR-defined FIFO trigger thresholds to prevent overrun |
| Software flow control | Programmable Xon1/Xon2 and Xoff1/Xoff2 characters with flexible detection logic (single/dual, OR/AND) via EFR[3:0] |
| RS-485 driver control | Automatic direction control via RTS signal with polarity inversion option - eliminates external transceiver control logic |
| FIFO management | 64-byte TX/RX FIFOs with independently programmable trigger levels (FCR or TLR) and error-status tagging in RX FIFO |
| IrDA SIR acceleration | On-chip IrDA encoder/decoder supporting 1.152 Mbit/s - doubles throughput vs. SC16IS752's 115.2 kbit/s limit |
| Low-power sleep mode | Sub-30 μA sleep current activated by EFR[4] + IER[4]; retains register state and wake-up via IRQ or GPIO event |
Applications
| Industrial RS-485 Gateway | Portable Telemetry Module |
|---|---|
|
Use Scenario: Protocol translation between ARM-based PLC controller (I²C/SPI) and legacy RS-485 field devices (modbus RTU). IC Role / Device Role / Timing Role: Dual UART bridges host processor to two independent RS-485 buses; automatic RTS-driven direction control eliminates discrete logic. Use Value: Reduces BOM count by integrating FIFO buffering, flow control, and RS-485 drive logic - enabling compact, low-power gateway design. |
Use Scenario: Battery-powered environmental sensor node transmitting GPS + sensor data over cellular modem via UART. IC Role / Device Role / Timing Role: UART A handles GPS NMEA stream; UART B manages AT command interface to LTE module; shared I²C bus simplifies host MCU integration. Use Value: 64-byte FIFOs absorb bursty GPS data; sleep mode extends battery life beyond 12 months on coin cell. |
| Factory Automation HMI | Medical Device Serial Interface |
|
Use Scenario: Touchscreen HMI panel communicating with multiple PLCs and barcode scanners via isolated RS-232/RS-485 links. IC Role / Device Role / Timing Role: Dual UART provides simultaneous communication paths; GPIOs configure isolation enable/disable and device addressing. Use Value: Hardware flow control prevents data loss during high-throughput barcode scanning; 16C450 register compatibility eases firmware migration. |
Use Scenario: Patient monitor aggregating ECG, SpO₂, and NIBP data from modular sensors using point-to-point UART links. IC Role / Device Role / Timing Role: UART A receives real-time waveform data; UART B sends diagnostic logs to USB-to-serial adapter; IrDA SIR enables wireless parameter updates. Use Value: 1.152 Mbit/s IrDA allows secure, contactless firmware patching without opening enclosure - meeting IEC 62304 Class B requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART with I²C/SPI interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16IS752IBS,128 | Max SPI clock 4 Mbit/s; IrDA SIR limited to 115.2 kbit/s; otherwise identical register map and pinout | Lower-speed industrial control where IrDA is unused or 115.2 kbit/s suffices | Select when cost sensitivity outweighs need for 15 Mbit/s SPI or 1.152 Mbit/s IrDA |
| MAX3107ETJ+ | Single UART; SPI-only interface; no IrDA; 128-byte FIFOs; higher max baud rate (230 kbit/s standard, up to 3.5 Mbit/s with oversampling) | Space-constrained designs needing only one UART channel and higher baud accuracy | Choose when single-channel operation and tighter timing tolerance are priorities over dual UART or IrDA |
Compared with SC16IS752IBS,128 and MAX3107ETJ+, the SC16IS762IBS,128 uniquely delivers dual UARTs, 15 Mbit/s SPI, and 1.152 Mbit/s IrDA in HVQFN32 - making it optimal for battery-powered dual-interface telemetry where protocol flexibility and power efficiency are co-critical.
Availability
SC16IS762IBS,128 is available at Aetrix Electronics and suitable for industrial RS-485 gateways, portable telemetry modules, factory automation HMIs, medical serial interfaces, and battery-operated IoT edge nodes requiring stable component supply across multi-year production cycles.
Supply support for SC16IS762IBS,128 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in mixed-signal interface ICs and embedded processing.
The SC16IS762IBS,128 belongs to NXP's SC16IS7xx family of bridge UARTs designed specifically to simplify microcontroller-to-legacy-serial peripheral interfacing in space- and power-constrained embedded systems.
FAQ
What is the maximum SPI clock frequency supported by SC16IS762IBS,128?
The SC16IS762IBS,128 supports SPI clock speeds up to 15 Mbit/s in Mode 0, distinguishing it from the SC16IS752IBS,128 (4 Mbit/s). This higher speed enables faster register access and bulk FIFO data transfers in high-throughput applications such as real-time sensor aggregation. The SC16IS762IBS,128 maintains full register compatibility while delivering this performance uplift.
Does SC16IS762IBS,128 support IrDA SIR at 1.152 Mbit/s in both I²C and SPI modes?
Yes, the SC16IS762IBS,128 supports IrDA SIR at 1.152 Mbit/s regardless of interface mode - whether configured for I²C-bus or SPI operation. This capability is intrinsic to the SC16IS762 silicon variant and is not dependent on the host interface selection. The SC16IS762IBS,128 datasheet confirms this feature applies across all operating configurations.
How many GPIO pins does SC16IS762IBS,128 provide, and can they be used as modem control signals?
The SC16IS762IBS,128 provides eight bidirectional GPIO pins (GPIO0–GPIO7), each configurable via the IOControl register as either general-purpose I/O or dedicated modem control signals (DTR/DSR/RTS/CTS/RI/CD). For example, GPIO4/DSRA and GPIO5/DTRA map directly to channel A modem status lines, enabling seamless integration with RS-232/RS-485 transceivers without external logic.
What is the FIFO depth and trigger level configuration method for SC16IS762IBS,128?
The SC16IS762IBS,128 features 64-byte transmit and receive FIFOs per channel. Trigger levels are configured via the FIFO Control Register (FCR) for fixed thresholds (1/4/8/14/56/60 bytes) or the Trigger Level Register (TLR) for fully programmable levels (0–63). The SC16IS762IBS,128 uses TLR when its bits are non-zero; otherwise FCR settings apply - enabling precise interrupt timing for latency-sensitive protocols.
Is SC16IS762IBS,128 pin-compatible with SC16IS752IBS,128 in the HVQFN32 package?
Yes, the SC16IS762IBS,128 is pin-compatible with the SC16IS752IBS,128 in the HVQFN32 package (SOT617-1), sharing identical pin numbering, electrical characteristics, and footprint. This allows direct substitution in existing designs where upgraded SPI speed (15 Mbit/s) or IrDA SIR (1.152 Mbit/s) is required - no PCB changes needed, provided firmware enables the enhanced features.
SC16IS762IBS,128 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VFQFN Exposed Pad
- Programmable:
- Not Verified
- Protocol:
- RS232, RS485
- Function:
- Controller
- Interface:
- I2C, SPI, UART
- Standards:
- -
- Voltage - Supply:
- 2.5V, 3.3V
- Current - Supply:
- 2mA
- Operating Temperature:
- -40°C ~ 95°C
- Supplier Device Package:
- 32-HVQFN (5x5)
- Grade:
- -
- Qualification:
- -
SC16IS762IBS,128 FAQ
1.How can I place an order for SC16IS762IBS,128 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC16IS762IBS,128 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC16IS762IBS,128 reliable?
The price and inventory of SC16IS762IBS,128 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC16IS762IBS,128 is usually 5 days.
3.What payment methods are accepted for SC16IS762IBS,128?
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Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC16IS762IBS,128?
SC16IS762IBS,128 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC16IS762IBS,128 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC16IS762IBS,128?
For technical support, including SC16IS762IBS,128 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC16IS762IBS,128 requirements.
6.How does Aetrix verify that SC16IS762IBS,128 is sourced from the original manufacturer or authorized distributors?
All SC16IS762IBS,128 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16IS762IBS,128 meets industry standards.
7.What is the process for return or replacement of SC16IS762IBS,128?
All SC16IS762IBS,128 units undergo pre-shipment inspection (PSI). If there is an issue with SC16IS762IBS,128, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC16IS762IBS,128 part is unused and in its original packaging.
Return procedure for SC16IS762IBS,128:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SC16IS762IBS,128 Tags
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