My Inquiry
My Account
NXP Semiconductors SC16IS762IPW,128
- Part No.:
- SC16IS762IPW,128
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SC16IS762IPW,128.pdf
- Description:
- IC DUAL UART 64BYTE 28TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,608
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SC16IS762IPW,128 from NXP Semiconductors is a dual-channel UART IC with I²C/SPI interface, 64-byte TX/RX FIFOs, IrDA SIR support up to 1.152 Mbit/s, and 8 programmable GPIOs - used in RS-232/RS-485 protocol bridging for industrial control and portable devices.
For engineers reviewing the SC16IS762IPW,128 datasheet, SC16IS762IPW,128 pinout, SC16IS762IPW,128 application, or SC16IS762IPW,128 equivalent, key selection considerations include SPI clock speed (15 Mbit/s), IrDA SIR capability (1.152 Mbit/s), hardware/software flow control, automatic RS-485 direction control, and TSSOP28 package compatibility.
Technical Context
The SC16IS762IPW,128 implements two independent UART channels with fully programmable framing (5–8 bit, parity, stop bits), auto RTS/CTS hardware flow control via dedicated pins, and software Xon/Xoff flow control with dual-character support. Its register set is backward compatible with the 16C450, enabling straightforward firmware porting.
It supports dual interface modes: I²C-bus (Fast-mode, 400 kbit/s) and SPI (Mode 0, 15 Mbit/s max), selected by the I2C/SPI pin. Internal oscillator uses XTAL1/XTAL2 (1–25 MHz crystal or external clock), and sleep current is <30 μA at 3.3 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Interface | I²C-bus (400 kbit/s) or SPI (Mode 0, 15 Mbit/s); mode selected by I2C/SPI pin |
| UART Channels | Dual full-duplex UARTs (Channel A and B), each with independent TX/RX, RTS/CTS, and modem control signals |
| FIFO Depth | 64 bytes per channel for transmit and receive; reduces host CPU interrupt load and enables burst data handling |
| IrDA SIR Speed | Up to 1.152 Mbit/s - enables infrared communication without external encoder/decoder |
| GPIO Pins | 8 bidirectional programmable I/O pins (GPIO0–GPIO7), configurable as modem control signals or general-purpose I/O |
| Supply Voltage | 2.5 V or 3.3 V operation; 5 V tolerant inputs simplify level-shifting in mixed-voltage systems |
| Operating Temp | −40 °C to +95 °C - qualified for industrial environments including factory automation and embedded telemetry |
Pinout & Package
TSSOP28 package (SOT361-1), 4.4 mm body width, lead pitch 0.65 mm; thermally enhanced for low-power handheld applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RTSA / RTSB | UART request-to-send (active LOW) | Auto-RTS output controlled by RX FIFO trigger levels; enables hardware flow control for Channel A/B |
| CTSA / CTSB | UART clear-to-send (active LOW) | Auto-CTS input; halts transmission when deasserted - prevents RX FIFO overrun during high-speed transfer |
| TXA / TXB, RXA / RXB | UART serial I/O | Independent full-duplex data paths; support RS-232/RS-485 level translation via external transceivers |
| IRQ | Open-drain interrupt output | Active-LOW signal indicating pending interrupts (RX ready, TX empty, modem status, GPIO change, Xoff detection) |
| I2C/SPI | Interface select input | Logic HIGH = I²C mode; LOW = SPI mode - configures pin functions (SDA/SCL vs. SI/SO/SCLK/CS) |
| GPIO0–GPIO7 | Programmable I/O terminals | Configurable as DSR/DTR/RI/CD modem signals or generic digital I/O via IOControl register |
Key Features
| Feature | Design Value |
|---|---|
| Automatic RS-485 direction control | RTS-driven driver enable with polarity inversion option - eliminates need for external direction logic in half-duplex bus systems |
| Software reset capability | Register-based reset (EFR[0]) allows UART reinitialization without toggling hardware RESET pin - critical for field-upgradable firmware |
| Programmable FIFO trigger levels | Independent RX/TX interrupt thresholds (via FCR and TLR registers) - optimizes interrupt frequency and latency for real-time buffering |
| Bidirectional protocol conversion | Seamless I²C/SPI ↔ UART bridging - enables microcontrollers without native UART peripherals to drive RS-232/485 or IrDA interfaces |
| Low-power sleep mode | <30 μA quiescent current at 3.3 V with EFR[4] and IER[4] enabled - extends battery life in portable instrumentation and IoT edge nodes |
Applications
| Industrial Serial Gateway | Portable Diagnostic Tool |
|---|---|
|
Use Scenario: PLC-to-HMI communication over RS-485 in factory automation cabinets with space-constrained PCB layout. IC Role / Device Role / Timing Role: Dual UART bridges SPI-connected MCU to two isolated RS-485 buses; automatic RTS-controlled driver direction ensures reliable half-duplex timing. Use Value: Eliminates discrete level shifters and direction logic; 64-byte FIFOs absorb burst traffic from motion controllers without packet loss. |
Use Scenario: Handheld medical device tester connecting via IrDA to legacy patient monitors and USB-to-serial adapters. IC Role / Device Role / Timing Role: SC16IS762IPW,128 provides IrDA SIR encoding/decoding at 1.152 Mbit/s while simultaneously managing debug UART over TSSOP28 footprint. Use Value: Single-chip replaces separate IrDA PHY + dual UART; 2.5 V/3.3 V operation matches battery-powered SoC voltage rails. |
| Cellular Data Terminal | Smart Energy Meter Interface |
|
Use Scenario: LTE module interfacing with host MCU via SPI and exposing two AT-command UART ports for SIM card and GNSS subsystems. IC Role / Device Role / Timing Role: SPI slave UART concentrator; handles simultaneous command/response streams with independent flow control per channel. Use Value: 15 Mbit/s SPI bandwidth supports high-throughput cellular log streaming; auto-CTS prevents buffer overflow during network handshakes. |
Use Scenario: AMI meter with optical port (IrDA) and RS-485 PLC communication, requiring secure, low-power, long-life interface IC. IC Role / Device Role / Timing Role: Dual UART manages optical diagnostics and utility-side data collection; sleep mode cuts standby power below 30 μA. Use Value: Meets IEC 62056-21 optical port spec and DLMS/COSEM RS-485 requirements in one TSSOP28 component. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART bridge applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16IS752IPW | Max SPI clock 4 Mbit/s; IrDA SIR limited to 115.2 kbit/s; otherwise identical register map and pinout | Suitable for lower-speed SPI hosts or legacy IrDA implementations where 1.152 Mbit/s is unnecessary | Select SC16IS752IPW only if SPI bandwidth <4 Mbit/s or IrDA speed ≤115.2 kbit/s suffices - avoids over-specifying for cost-sensitive designs |
| MAX3100EAP+T | Single UART, SPI-only interface (no I²C), no IrDA, smaller 20-pin SSOP package, 16-byte FIFOs | Targeted at compact, single-port SPI-to-UART bridging where dual channels and IrDA are not required | Choose MAX3100EAP+T for space-constrained, single-channel applications with minimal feature set - not a functional replacement for SC16IS762IPW,128 |
Compared with SC16IS752IPW and MAX3100EAP+T, the SC16IS762IPW,128 uniquely delivers dual UARTs, 15 Mbit/s SPI, 1.152 Mbit/s IrDA SIR, and 64-byte FIFOs in TSSOP28 - making it the only option for high-speed, multi-interface, low-power industrial bridging.
Availability
SC16IS762IPW,128 is available at Aetrix Electronics and suitable for factory automation, portable diagnostic tools, and cellular data terminals requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SC16IS762IPW,128 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.
The SC16IS7xx family was designed specifically to enable protocol bridging between modern microcontrollers (I²C/SPI) and legacy serial interfaces (RS-232/RS-485/IrDA), targeting space- and power-constrained embedded systems.
FAQ
What interface modes does the SC16IS762IPW,128 support?
The SC16IS762IPW,128 supports both I²C-bus (Fast-mode, up to 400 kbit/s) and SPI (Mode 0, up to 15 Mbit/s), selected by the logic level on the I2C/SPI pin. It operates exclusively as a target/slave device in both modes - no master functionality is implemented. The pin configuration and register access differ between modes, as defined in the datasheet's pin description table.
Does the SC16IS762IPW,128 support automatic RS-485 driver direction control?
Yes, the SC16IS762IPW,128 supports automatic RS-485 driver direction control using the RTS output signal. When enabled via the Enhanced Features Register, RTS asserts before transmission and deasserts after completion. Polarity inversion is supported, allowing direct connection to common RS-485 transceivers like the MAX13487 or SN65HVD72 without external logic.
What is the maximum IrDA SIR speed supported by the SC16IS762IPW,128?
The SC16IS762IPW,128 supports IrDA SIR at up to 1.152 Mbit/s - a key differentiator from the SC16IS752IPW, which is limited to 115.2 kbit/s. This higher speed enables faster optical data exchange in portable test equipment and medical devices, though it is not compatible with IrDA MIR at the same rate.
How many programmable GPIOs does the SC16IS762IPW,128 provide?
The SC16IS762IPW,128 provides eight bidirectional programmable GPIO pins (GPIO0 through GPIO7). Each can be individually configured as input or output and optionally mapped to modem control functions (DSR, DTR, RI, CD) via the IOControl register - offering flexible peripheral expansion without additional I/O expanders.
What is the FIFO depth and how is it managed in the SC16IS762IPW,128?
The SC16IS762IPW,128 features 64-byte transmit and receive FIFOs per UART channel. Trigger levels for interrupt generation are programmable via the FIFO Control Register (FCR) and Trigger Level Register (TLR), allowing optimization of interrupt frequency and latency. FIFO status (level, error flags) is readable via dedicated status registers.
SC16IS762IPW,128 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Programmable:
- Not Verified
- Protocol:
- RS232, RS485
- Function:
- Controller
- Interface:
- I2C, SPI, UART
- Standards:
- -
- Voltage - Supply:
- 2.5V, 3.3V
- Current - Supply:
- 2mA
- Operating Temperature:
- -40°C ~ 95°C
- Supplier Device Package:
- 28-TSSOP
- Grade:
- -
- Qualification:
- -
SC16IS762IPW,128 FAQ
1.How can I place an order for SC16IS762IPW,128 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC16IS762IPW,128 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC16IS762IPW,128 reliable?
The price and inventory of SC16IS762IPW,128 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC16IS762IPW,128 is usually 5 days.
3.What payment methods are accepted for SC16IS762IPW,128?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC16IS762IPW,128 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC16IS762IPW,128?
SC16IS762IPW,128 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC16IS762IPW,128 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC16IS762IPW,128?
For technical support, including SC16IS762IPW,128 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC16IS762IPW,128 requirements.
6.How does Aetrix verify that SC16IS762IPW,128 is sourced from the original manufacturer or authorized distributors?
All SC16IS762IPW,128 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC16IS762IPW,128 meets industry standards.
7.What is the process for return or replacement of SC16IS762IPW,128?
All SC16IS762IPW,128 units undergo pre-shipment inspection (PSI). If there is an issue with SC16IS762IPW,128, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC16IS762IPW,128 part is unused and in its original packaging.
Return procedure for SC16IS762IPW,128:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SC16IS762IPW,128 Tags
-
PTN5150AHXMP
NXP Semiconductors
-
USB3740B-AI9-TR
Microchip Technology
-
USB3740B-AI2-TR
Microchip Technology
-
USB3300-EZK-TR
Microchip Technology
-
USB3300-EZK
Microchip Technology
-
FUSB340TMX
onsemi
-
FUSB302BMPX
onsemi
-
DP83826IRHBR
Texas Instruments
-
MCP2518FDT-E/QBB
Microchip Technology
-
FUSB302MPX
onsemi
-
MCP2518FDT-E/SL
Microchip Technology
-
FT260Q-R
FTDI, Future Technology Devices International Ltd
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
