NXP Semiconductors SC18IS602IPW,112
- Part No.:
- SC18IS602IPW,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SC18IS602IPW,112.pdf
- Description:
- IC BRIDGE SPI/I2C 16-TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SC18IS602IPW,112 from NXP Semiconductors is an I²C-to-SPI bridge IC operating as an I²C-bus slave and SPI master, featuring 200-byte buffer, up to four slave select outputs, internal oscillator, and 2.4–3.6 V supply. It enables microcontrollers with only I²C interfaces to drive SPI peripherals such as EEPROMs, ADCs, and displays in industrial control and sensor hub designs.
For engineers reviewing the SC18IS602IPW,112 datasheet, SC18IS602IPW,112 pinout, SC18IS602IPW,112 application, or SC18IS602IPW,112 equivalent, key selection criteria include I²C slave address configurability (A0–A2), SPI clock rate options (58–1843 kHz), GPIO reconfigurability (SS0–SS3), interrupt signaling, and TSSOP16 package compatibility with space-constrained PCB layouts.
Technical Context
The SC18IS602IPW,112 implements a dedicated hardware bridge architecture: its I²C interface supports standard/fast-mode up to 400 kHz with 7-bit slave addressing (three programmable bits via A0–A2), while its SPI master supports Modes 0–3 with configurable polarity/phase and data rates up to 1.8 Mbit/s using an internal RC oscillator (7.3728 MHz ±1%).
It integrates a 200-byte FIFO buffer for I²C-to-SPI transaction buffering, supports four active-low slave select outputs (SS0–SS3), and provides full software control over GPIO configuration (quasi-bidirectional, push-pull, open-drain, input-only) via Function IDs F4h–F7h - all without requiring external clocking or host CPU intervention during SPI transfers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| I²C Interface Speed | Up to 400 kHz fast-mode; enables direct connection to MCU I²C peripherals without bit-banging or protocol translation overhead. |
| SPI Master Speed | Up to 1.8 Mbit/s; determined by internal oscillator (7.3728 MHz); selectable via F0h command (58/115/461/1843 kHz). |
| Data Buffer Size | 200-byte FIFO; absorbs burst I²C writes and sequences them into atomic SPI transactions, reducing host polling latency. |
| Slave Select Outputs | Four independent SS0–SS3 pins; each configurable as GPIO or SPI select; SS2 is GPIO-only on SC18IS602IPW,112 per datasheet note [1]. |
| Supply Voltage | 2.4 V to 3.6 V; compatible with 3.3 V logic systems; supports industrial temperature range (−40 °C to +85 °C). |
| Interrupt Output | Active-low INT pin; asserts after SPI transaction completion; cleared via F1h command or auto-cleared on next I²C address match. |
| ESD Protection | 2000 V HBM (JESD22-A114), 200 V MM (JESD22-A115), 1000 V CDM (JESD22-C101); suitable for board-level handling without special ESD controls. |
Pinout & Package
SC18IS602IPW,112 is housed in a 16-pin TSSOP package (SOT403-1), 4.4 mm body width, lead pitch 0.65 mm, RoHS-compliant. Pin functions are validated per NXP datasheet Rev. 04 (March 2008), Table 2 and Figure 3a.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SS0/GPIO0 | I/O | Configurable SPI slave select 0 or general-purpose output/input; driven low during SPI transfer to selected device. |
| 2: SS1/GPIO1 | I/O | Configurable SPI slave select 1 or GPIO; enables concurrent control of two SPI peripherals without external logic. |
| 3: RESET | Input | Active-low reset; latches A0–A2 address bits on deassertion; internal 10–30 kΩ pull-up ensures defined startup state. |
| 4: VSS | Power | Ground reference for all digital and analog circuitry; requires low-impedance connection to PCB ground plane. |
| 5: MISO | Input | Master In, Slave Out; receives serial data from SPI slave devices; sampled synchronously with SPICLK edge per configured mode. |
| 6: MOSI | Output | Master Out, Slave In; transmits serial data to SPI slaves; driven at same rate and phase as SPICLK. |
| 7: SDA | I/O | I²C data line; bidirectional, open-drain; requires external pull-up resistor (typically 2.2–4.7 kΩ to VDD). |
| 8: SCL | Input | I²C clock line; input-only, open-drain-compatible; synchronizes I²C byte transfers; held low by SC18IS602IPW,112 during internal processing. |
| 9: INT | Output | Interrupt request; active-low pulse signals SPI transaction completion; connects directly to MCU interrupt pin. |
| 10: SS2/GPIO2 | I/O | GPIO-only on SC18IS602IPW,112 (not SPI slave select); usable for status indication, enable control, or auxiliary signaling. |
| 11: SPICLK | Output | SPI clock generator; outputs configurable frequency (58–1843 kHz); edge timing matches selected SPI mode (CPOL/CPHA). |
| 12: VDD | Power | Supply voltage input (2.4–3.6 V); bypass capacitor (100 nF ceramic) required adjacent to pin for noise suppression. |
| 13: SS3/GPIO3 | I/O | Configurable SPI slave select 3 or GPIO; expands system to four independent SPI peripherals or adds flexible I/O. |
| 14: A0 | Input | I²C slave address bit 0; latched at RESET; sets LSB of 7-bit address (base 0x50) for multi-device bus addressing. |
| 15: A1 | Input | I²C slave address bit 1; latched at RESET; enables up to eight SC18IS602IPW,112 devices on same I²C bus. |
| 16: A2 | Input | I²C slave address bit 2; latched at RESET; completes 3-bit programmable address field (A2:A0). |
Key Features
| Feature | Design Value |
|---|---|
| Configurable SPI modes (0–3) | Software-selectable CPOL/CPHA via F0h command enables interoperability with legacy and custom SPI peripherals without hardware changes. |
| Four reconfigurable GPIO/SS pins | SS0–SS3 pins support dynamic runtime switching between SPI select and GPIO roles, enabling flexible peripheral expansion or status feedback. |
| 200-byte transaction buffer | Eliminates need for host-side buffering; allows full I²C write bursts (up to 200 bytes) before SPI execution, improving throughput in high-latency systems. |
| Internal RC oscillator | 7.3728 MHz ±1% trimmed oscillator removes external crystal requirement, reducing BOM count and PCB footprint. |
| Low-power idle mode | F2h command reduces supply current to ≤3.9 mA (at 3.6 V), extending battery life in portable or energy-sensitive applications. |
Applications
| Industrial Sensor Hub | Medical Device Data Acquisition |
|---|---|
Use Scenario: Central microcontroller with limited I²C resources must interface with multiple SPI-based temperature, pressure, and humidity sensors. IC Role / Device Role / Timing Role: SC18IS602IPW,112 acts as I²C-slave/SPI-master bridge, translating I²C commands into timed SPI sequences with precise clock phase/polarity matching sensor requirements. Use Value: Enables single I²C port to manage up to four SPI sensors concurrently via SS0–SS3, eliminating need for additional MCU SPI ports or FPGA glue logic. | Use Scenario: Portable patient monitor reads calibration data from SPI EEPROM and acquires real-time ADC samples via SPI interface. IC Role / Device Role / Timing Role: SC18IS602IPW,112 buffers I²C read requests and executes deterministic SPI read/write cycles with sub-millisecond latency and glitch-filtered GPIO signaling. Use Value: Provides ESD-hardened (2000 V HBM), low-noise 3.3 V–compatible interface meeting IEC 60601-1 leakage and immunity requirements without external level shifters. |
| Smart Energy Metering | Automotive Body Control Module |
Use Scenario: Energy meter MCU uses I²C to configure and read metrology ICs, RTCs, and secure authentication chips - all SPI-native. IC Role / Device Role / Timing Role: SC18IS602IPW,112 serves as isolated protocol translator, handling I²C address arbitration and SPI timing compliance across varying load conditions. Use Value: Supports extended industrial temperature range (−40 °C to +85 °C) and delivers stable 1.8 Mbit/s SPI operation under 3.3 V supply, ensuring accuracy in harsh metering environments. | Use Scenario: BCM MCU lacks native SPI but must drive SPI-connected LED drivers, window motor controllers, and diagnostic EEPROMs. IC Role / Device Role / Timing Role: SC18IS602IPW,112 operates as autonomous SPI master with interrupt-driven completion signaling, freeing MCU cycles for safety-critical tasks. Use Value: Reduces firmware complexity by offloading SPI protocol generation and GPIO management, while maintaining AEC-Q200-aligned robustness via latch-up testing (>100 mA). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C-to-SPI bridge applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC18IS602BIPW | Supports SS2 as functional slave select (not GPIO-only); identical pinout and I²C/SPI specs. | Required when dual simultaneous SPI slave selection (SS0 + SS2) is needed; not drop-in for SC18IS602IPW,112 due to SS2 functional difference. | Select SC18IS602BIPW only if SS2 must operate as SPI slave select; otherwise SC18IS602IPW,112 suffices with SS2 as GPIO. |
| SC18IS603IPW | Requires external 0–18 MHz clock (CLKIN pin); supports higher SPI speed (up to 4 Mbit/s); no internal oscillator. | Suitable for systems with existing clock infrastructure where 4 Mbit/s SPI bandwidth is critical; incompatible with oscillator-free designs. | Choose SC18IS603IPW only when >1.8 Mbit/s SPI rate is mandatory and external clock source is available. |
Compared with SC18IS602BIPW and SC18IS603IPW, SC18IS602IPW,112 offers optimal balance of integration (internal oscillator), GPIO flexibility (SS2 as GPIO), and industrial-grade reliability - making it ideal for cost-sensitive, space-constrained I²C-limited systems needing up to 1.8 Mbit/s SPI bridging without external clock dependencies.
Availability
SC18IS602IPW,112 is available at Aetrix Electronics and suitable for industrial sensor hubs, medical data acquisition systems, and smart energy metering requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for SC18IS602IPW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in interface, power, and security ICs.
The SC18IS602IPW,112 belongs to NXP's I²C-to-SPI bridge product line, designed specifically to extend legacy microcontroller capabilities by enabling seamless, low-overhead communication with SPI peripherals in resource-constrained embedded systems.
FAQ
What is the maximum SPI clock frequency supported by SC18IS602IPW,112?
The SC18IS602IPW,112 supports SPI master operation up to 1.8 Mbit/s, derived from its internal 7.3728 MHz oscillator. Four selectable frequencies are available via the F0h Configure SPI Interface command: 58 kHz, 115 kHz, 461 kHz, and 1.843 MHz - all compliant with standard SPI timing requirements for Modes 0–3.
Can SC18IS602IPW,112 operate without an external crystal or clock source?
Yes, SC18IS602IPW,112 contains an internal RC oscillator trimmed to ±1% at 25 °C (7.3728 MHz nominal), eliminating the need for external clock components. This oscillator drives both the SPI interface and internal logic, making SC18IS602IPW,112 self-contained for most I²C-to-SPI bridging applications.
How many I²C slave addresses can be assigned to SC18IS602IPW,112?
The SC18IS602IPW,112 supports eight unique I²C slave addresses via three hardware-programmable address pins (A0, A1, A2). These pins are latched at RESET, allowing up to eight SC18IS602IPW,112 devices to coexist on the same I²C bus - essential for modular sensor or peripheral expansion.
Is SS2 pin on SC18IS602IPW,112 usable as a slave select output?
No, SS2 (Pin 10) on SC18IS602IPW,112 is GPIO-only per NXP datasheet Rev. 04 Section 6.2 Note [1]. Unlike SC18IS602BIPW, SC18IS602IPW,112 does not support SS2 as an active-low SPI slave select; it may only be used as a general-purpose I/O pin configured via F4h/F6h/F7h commands.
Does SC18IS602IPW,112 support SPI Mode 3 (CPOL=1, CPHA=1)?
Yes, SC18IS602IPW,112 fully supports all four SPI modes including Mode 3 (CPOL=1, CPHA=1). The SPI interface configuration is set via the F0h command, where bits MODE1:MODE0 = 11 selects Mode 3 - enabling compatibility with SPI peripherals requiring inverted clock polarity and leading-edge sampling.
SC18IS602IPW,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Programmable:
- Not Verified
- Protocol:
- I2C
- Function:
- Controller
- Interface:
- SPI
- Standards:
- -
- Voltage - Supply:
- 2.4V ~ 3.6V
- Current - Supply:
- 11mA
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-TSSOP
- Grade:
- -
- Qualification:
- -
SC18IS602IPW,112 FAQ
1.How can I place an order for SC18IS602IPW,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC18IS602IPW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC18IS602IPW,112 reliable?
The price and inventory of SC18IS602IPW,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC18IS602IPW,112 is usually 5 days.
3.What payment methods are accepted for SC18IS602IPW,112?
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4.How is shipping managed for SC18IS602IPW,112?
SC18IS602IPW,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC18IS602IPW,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC18IS602IPW,112?
For technical support, including SC18IS602IPW,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC18IS602IPW,112 requirements.
6.How does Aetrix verify that SC18IS602IPW,112 is sourced from the original manufacturer or authorized distributors?
All SC18IS602IPW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC18IS602IPW,112 meets industry standards.
7.What is the process for return or replacement of SC18IS602IPW,112?
All SC18IS602IPW,112 units undergo pre-shipment inspection (PSI). If there is an issue with SC18IS602IPW,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC18IS602IPW,112 part is unused and in its original packaging.
Return procedure for SC18IS602IPW,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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