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NXP Semiconductors SC26C92A1A,518
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- Part No.:
- SC26C92A1A,518
- Manufacturer:
- NXP Semiconductors
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
SC26C92A1A,518.pdf
- Description:
- IC DUART 1MBPS 44PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:2,467
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Product details
Overview
SC26C92A1A,518 from NXP Semiconductors (formerly Philips) is a dual-channel CMOS universal asynchronous receiver/transmitter (DUART) with independent 8-character FIFOs per channel, programmable baud rates up to 230.4 kbaud, and full-duplex operation - used in industrial serial communication interfaces for legacy control systems, terminal concentrators, and embedded modems requiring reliable RS-232/RS-422 link layer handling.
For engineers reviewing the SC26C92A1A,518 datasheet, SC26C92A1A,518 pinout, SC26C92A1A,518 application, or SC26C92A1A,518 equivalent, key selection criteria include its 44-pin PLCC package, dual-channel independent timing control, 5 V single-supply operation, watchdog timer per receiver, and hardware flow control via RTS/CTS - all critical for deterministic interrupt latency and buffer overrun prevention in real-time serial subsystems.
Technical Context
The SC26C92A1A,518 implements two fully independent UART channels sharing a common 8-bit bidirectional data bus, address decoding (A0–A3), and interrupt logic (INTRN). Each channel features separate baud rate selection - from 27 fixed rates (50–230.4 kbaud), programmable counter/timer-derived rates, or external 1X/16X clocks - enabling asymmetric speed operation (e.g., 9600 bps on Channel A, 115.2 kbaud on Channel B) for clustered terminal or multidrop wake-up applications.
Its timing architecture integrates an on-chip crystal oscillator (X1/CLK, X2), a 16-bit programmable counter/timer, and four clock selectors that route timing sources independently to each receiver and transmitter. The device supports automatic echo, local/remote loopback, and multidrop (9-bit) mode with break detection - all configurable via Mode Register A/B and Command Register without CPU intervention during runtime.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Dual full-duplex asynchronous receiver/transmitter (DUART) - provides two independent UARTs in one IC for space-constrained serial interface designs. |
| Supply Voltage | +5 V ±10% - compatible with standard TTL/CMOS logic rails; no auxiliary voltage required. |
| FIFO Depth | 8 characters per receiver and transmitter - reduces CPU interrupt overhead and prevents overrun/underrun in burst-mode transfers. |
| Baud Rate Range | 50 to 230.4 kbaud - selectable per channel via 27 fixed rates, counter/timer, or external clock; supports 16X oversampling for robust sampling. |
| Operating Temperature | –40 °C to +85 °C - qualified for industrial environments including factory automation and transportation control systems. |
| Package | 44-pin PLCC (SOT187-2) - surface-mount compatible with reflow assembly; includes thermal pad-compatible footprint per Philips specification. |
| Interrupt Architecture | Single active-low open-drain INTRN output with eight maskable sources; OP3–OP7 configurable as discrete wire-ORable interrupt outputs - enables flexible priority routing in multi-interrupt systems. |
Pinout & Package
SC26C92A1A,518 is housed in a 44-pin Plastic Leaded Chip Carrier (PLCC), SOT187-2 package, with gull-wing leads and index corner marking. Pin 1 is at top-left when index corner is oriented upper-left; body dimensions are 16.6 mm × 16.6 mm × 3.6 mm (JEDEC MS-026).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A3) | Address Input | MSB of 4-bit register address bus; selects internal registers (MR, SR, CR, etc.) during CPU read/write cycles. |
| 2 (IP0) | Input Port / CTSAN | Channel A Clear-to-Send input (active-low); also serves as general-purpose input with internal ~1–4 µA pull-up. |
| 3 (WRN) | Write Strobe | Active-low write enable; latches data from D0–D7 into addressed register on rising edge. |
| 4 (RDN) | Read Strobe | Active-low read enable; places contents of addressed register onto D0–D7 on falling edge. |
| 5 (RxDB) | Channel B Receiver Input | Serial data input for Channel B; sampled on rising edge of RxC clock; supports break detection and framing error reporting. |
| 6 (TxDB) | Channel B Transmitter Output | Serial data output for Channel B; least-significant bit first; held high ("mark") when idle or disabled. |
| 7 (OP1) | Output Port / RTSBN | Channel B Request-to-Send output (active-low); auto-deactivates on transmit/receive activity; configurable as general-purpose output. |
| 8 (OP3) | Output Port / C/T Output | Open-drain counter/timer output or Channel B transmitter clock; requires external pull-up when used as interrupt (ISR[5]). |
| 9 (OP5) | Output Port / RxB Interrupt | Open-drain active-low interrupt output for Channel B receiver events (RxRDY, FFULL, timeout); directly reflects ISR[5] status. |
| 10 (OP7) | Output Port / TxB Interrupt | Open-drain active-low interrupt output for Channel B transmitter events (TxRDY, TxEMT); directly reflects ISR[4] status. |
| 11 (N/C) | No Connect | Internally unconnected; must remain floating - not to be tied to VCC, GND, or signals. |
| 12–15 (D1–D4) | Data Bus Bits | Lower nibble of 8-bit bidirectional data bus; driven by CPU during register access; tri-stated when CEN is high. |
| 16–17 (GND) | Ground | Dual ground pins for noise reduction and current return path separation; both must be connected to system ground plane. |
| 18 (INTRN) | Interrupt Request | Active-low open-drain interrupt output; asserts when any enabled condition (RxRDY, TxRDY, C/T, etc.) occurs; requires external pull-up resistor. |
| 19–22 (D6–D7, GND, VCC) | Data Bus / Power | D6/D7 = upper data bits; Pin 21 = second GND; Pin 22 = VCC (+5 V supply) - decoupling capacitor (0.1 µF) required adjacent to Pin 22. |
| 23 (N/C) | No Connect | Internally unconnected; must remain floating. |
| 24–27 (OP6–OP4) | Output Ports | OP6 = Channel A TxA interrupt (ISR[0]); OP4 = Channel A RxA interrupt (ISR[1]); all open-drain when configured as interrupts. |
| 28–29 (TxDA, RxDA) | Channel A I/O | Channel A transmitter output and receiver input - identical electrical behavior to Channel B counterparts but independently controlled. |
| 30–31 (X1/CLK, X2) | Clock Input | X1/CLK accepts crystal (3.6864 MHz typical) or external clock; X2 is crystal second terminal or left open for external clock mode. |
| 32 (RESET) | Reset Input | Active-high synchronous reset; clears SRA/SRB, IMR/ISR, OPR, stops counter/timer, forces Tx outputs to mark state. |
| 33 (CEN) | Chip Enable | Active-low chip select; enables D0–D7 bus drivers and register access when low with WRN/RDN asserted. |
| 34–44 (IP2–A2, VCC) | I/O & Address | IP2 = counter/timer clock input; IP3–IP6 = channel A/B Rx/Tx clock inputs; A0–A2 = LSB address bits; Pin 44 = second VCC connection. |
Key Features
| Feature | Design Value |
|---|---|
| Independent channel timing | Each UART selects its own baud source (27 fixed rates, counter/timer, or external 1X/16X clock) - enables dual-speed operation without external clock dividers. |
| Receiver watchdog timer | Dedicated timeout per channel detects stalled serial input - triggers interrupt and status flag to prevent hang conditions in noisy or disconnected links. |
| Hardware flow control | RTS/CTS signaling implemented via OP0/OP1 (RTSAN/RTSBN) and IP0/IP1 (CTSAN/CTSBN) - eliminates software handshaking latency and ensures zero-loss buffering. |
| Multidrop (9-bit) mode | Supports addressable wake-up in shared-bus networks - receiver detects 9th bit (address flag) and generates interrupt only on match, reducing CPU polling load. |
| Programmable data format | Per-channel configuration of 5–8 data bits, odd/even/no/force parity, and 1/1.5/2 stop bits in 1/16-bit increments - matches legacy protocol requirements without firmware translation. |
| Change-of-state detection | Four inputs (IP0–IP3) support edge-triggered interrupt generation on level transition - enables direct monitoring of external control signals (e.g., door sensors, limit switches). |
Applications
| Industrial Serial Gateway | Legacy Terminal Concentrator |
|---|---|
|
Use Scenario: Aggregating serial data from multiple PLCs, HMIs, and sensors into a single RS-485 backbone using protocol translation and buffering. IC Role / Device Role / Timing Role: SC26C92A1A,518 acts as dual-channel UART bridge with independent FIFO management and hardware RTS/CTS - ensuring deterministic latency and zero packet loss under variable load. Use Value: 8-character FIFOs per channel reduce interrupt frequency by >60% vs. legacy 1-byte buffers; watchdog timers prevent silent lockups during cable faults. |
Use Scenario: Supporting up to 32 ASCII terminals over a single host bus using multidrop (9-bit) addressing and automatic echo mode. IC Role / Device Role / Timing Role: SC26C92A1A,518 serves as dual-port serial controller with wake-up mode - listens for address byte on shared line, then enables full-duplex session only for targeted terminal. Use Value: Multidrop mode cuts wiring complexity by 50%; local loopback testing capability allows in-system validation without external loop cables. |
| Embedded Modem Interface | Factory Automation Controller |
|
Use Scenario: Connecting microcontroller-based modem modules to host processors via AT command interface with modem control signal handling (DCD, DSR, RI). IC Role / Device Role / Timing Role: SC26C92A1A,518 functions as UART + general-purpose I/O hub - uses OP0–OP7 for modem handshake and IP0–IP6 for status inputs like Ring Indicator. Use Value: Integrated 7-bit input port with change-of-state detection captures ring events with <50 µs latency; open-drain interrupt outputs simplify wired-OR modem interrupt buses. |
Use Scenario: Providing isolated serial ports for CNC machine tool controllers where EMI immunity and long cable runs require precise timing and error recovery. IC Role / Device Role / Timing Role: SC26C92A1A,518 operates as ruggedized UART with false start bit rejection, line break detection, and framing/parity error flags - enabling fail-safe diagnostics. Use Value: Break detection and generation allow emergency stop signaling across serial links; receiver timeout mode prevents buffer overflow during intermittent communication. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC26C92C1A | Commercial-grade version (0 °C to +70 °C operating range); identical pinout, functionality, and AC/DC specs except temperature rating. | Suitable for non-industrial environments (e.g., lab equipment, office terminals) where extended temperature range is unnecessary. | Select SC26C92C1A only if ambient operating temperature remains within 0–70 °C and industrial qualification is not required. |
| SC26C92A1B | PQFP package (SOT307-2, 44-pin) instead of PLCC; same electrical specs, timing, and register set; different thermal and mechanical characteristics. | Preferred for automated SMT lines with fine-pitch placement capability and higher board-level reliability under vibration. | Choose SC26C92A1B when PCB assembly uses PQFP-reflow processes and thermal dissipation requirements favor flat-pack geometry. |
Compared with SC26C92C1A and SC26C92A1B, the SC26C92A1A,518 uniquely combines industrial temperature range (–40 °C to +85 °C) with PLCC packaging - offering superior mechanical retention in high-vibration environments while maintaining full functional and register-level compatibility across the SC26C92 family.
Availability
SC26C92A1A,518 is available at Aetrix Electronics and suitable for industrial serial gateways, legacy terminal concentrators, and embedded modem interfaces requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SC26C92A1A,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips Semiconductors in 2006, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The SC26C92A1A,518 belongs to NXP's legacy communications IC portfolio - designed specifically for robust, low-power, pin-compatible replacement of aging UART solutions in mission-critical industrial control and infrastructure systems.
FAQ
What is the maximum baud rate supported by the SC26C92A1A,518?
The SC26C92A1A,518 supports a maximum baud rate of 230.4 kbaud per channel. This is achieved in 16X oversampling mode using either the internal baud rate generator (with a 3.6864 MHz crystal) or a programmable counter/timer. The device does not support rates above 230.4 kbaud, and exceeding this limit may result in timing violations or data corruption. All baud rates are independently configurable for Channel A and Channel B.
Does the SC26C92A1A,518 support hardware flow control?
Yes, the SC26C92A1A,518 supports full hardware flow control via RTS/CTS signaling. OP0 and OP1 serve as active-low RTS outputs for Channels A and B respectively, while IP0 and IP1 function as active-low CTS inputs. These signals can be automatically managed by the DUART's internal logic to suspend transmission when the receiver FIFO reaches user-defined thresholds - eliminating software polling and ensuring zero-loss operation under burst traffic.
Can the SC26C92A1A,518 operate with an external clock instead of a crystal?
Yes, the SC26C92A1A,518 can operate with an external clock applied to the X1/CLK pin, with X2 left unconnected. The external clock must fall within the specified frequency range of 0.1 MHz to 8 MHz and meet AC timing requirements (e.g., tCLK ≥ 50 ns). Crystal operation (3.6864 MHz typical) is recommended for standard baud rate accuracy, but external clocking enables synchronization to system master clocks or jitter-reduced sources in tightly coupled designs.
What is the purpose of the watchdog timer in the SC26C92A1A,518?
The SC26C92A1A,518 includes a dedicated watchdog timer for each receiver channel to detect serial input stalls - such as broken cables, disconnected devices, or stuck transmitters. When enabled, the timer triggers an interrupt and sets a status flag if no valid character is received within a programmable timeout window. This prevents the system from hanging indefinitely and enables rapid fault isolation in unattended industrial deployments.
How does the multidrop (9-bit) mode work on the SC26C92A1A,518?
In multidrop mode, the SC26C92A1A,518 interprets the 9th bit of incoming data as an address flag. When enabled, the receiver monitors all traffic on the shared bus and asserts an interrupt only when the 9th bit matches the locally programmed address. This allows one SC26C92A1A,518 to manage multiple remote nodes on a single serial line - reducing cabling, simplifying topology, and minimizing CPU polling overhead in distributed control systems.
SC26C92A1A,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-LCC (J-Lead)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- 8 Byte
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PLCC (16.59x16.59)
SC26C92A1A,518 FAQ
1.How can I place an order for SC26C92A1A,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC26C92A1A,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC26C92A1A,518 reliable?
The price and inventory of SC26C92A1A,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC26C92A1A,518 is usually 5 days.
3.What payment methods are accepted for SC26C92A1A,518?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC26C92A1A,518 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC26C92A1A,518?
SC26C92A1A,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC26C92A1A,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC26C92A1A,518?
For technical support, including SC26C92A1A,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC26C92A1A,518 requirements.
6.How does Aetrix verify that SC26C92A1A,518 is sourced from the original manufacturer or authorized distributors?
All SC26C92A1A,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC26C92A1A,518 meets industry standards.
7.What is the process for return or replacement of SC26C92A1A,518?
All SC26C92A1A,518 units undergo pre-shipment inspection (PSI). If there is an issue with SC26C92A1A,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC26C92A1A,518 part is unused and in its original packaging.
Return procedure for SC26C92A1A,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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