NXP Semiconductors SC26C92A1A,529
- Part No.:
- SC26C92A1A,529
- Manufacturer:
- NXP Semiconductors
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
SC26C92A1A,529.pdf
- Description:
- IC DUART 1MBPS 44PLCC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SC26C92A1A,529 from NXP Semiconductors (formerly Philips) is a dual-channel CMOS universal asynchronous receiver/transmitter (DUART) with independent 8-character FIFOs per channel, programmable baud rates up to 230.4 kbaud, and integrated 16-bit counter/timer. It operates from a single +5 V supply, supports industrial temperature range (–40°C to +85°C), and interfaces directly with microprocessors via parallel bus for polled or interrupt-driven serial communications in embedded control and terminal systems.
For engineers reviewing the SC26C92A1A,529 datasheet, SC26C92A1A,529 pinout, SC26C92A1A,529 application, or SC26C92A1A,529 equivalent, key selection considerations include dual UART channel independence, FIFO depth for interrupt reduction, RTS/CTS flow control support, crystal oscillator integration, and compatibility with legacy SCC2692/SCN2681 designs while adding watchdog timers and extended mode registers.
Technical Context
The SC26C92A1A,529 implements two fully independent UART channels (A and B), each with separate receiver and transmitter FIFOs, baud rate generators, and mode control registers. Its timing architecture integrates an on-chip crystal oscillator, 27 fixed baud rates (50–230.4 kbaud), and a programmable 16-bit counter/timer usable as clock source or timeout generator.
Each channel supports independent configuration of data format (5–8 data bits, odd/even/no/force parity, 1/1.5/2 stop bits), operating mode (normal, echo, local/remote loopback, multidrop), and interrupt sources-including FIFO level thresholds, watchdog timeout, and change-of-state detection on four input port pins (IP0–IP3).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Baud Rate Range | 50 to 230.4 kbaud (27 fixed rates + programmable via counter/timer or external 1X/16X clock) |
| FIFO Depth | 8 characters per receiver and transmitter - reduces CPU interrupt overhead and prevents overrun/underrun in burst traffic |
| Supply Voltage | +5 V ±10% - compatible with standard TTL/CMOS logic rails and legacy industrial power domains |
| Operating Temperature | –40°C to +85°C - qualified for industrial environments without derating at full range |
| Package | 44-pin PLCC (SOT187-2) - surface-mount compatible with automated assembly and thermal performance suitable for sustained operation |
| Interrupt Architecture | Single active-low INTRN output with eight maskable sources; OP3–OP7 configurable as discrete open-drain interrupt outputs for DMA/modem signaling |
| Input Port | 7-bit multipurpose input port (IP0–IP6) with internal ~1–4 µA pull-ups and change-of-state detection on IP0–IP3 - enables hardware event triggering without external circuitry |
Pinout & Package
SC26C92A1A,529 is housed in a 44-pin Plastic Leaded Chip Carrier (PLCC, SOT187-2) with J-lead profile, designed for reflow-compatible surface-mount assembly and moderate thermal dissipation (2.4 W max at 25°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A3 | Address Inputs | Select internal registers (MR, SR, CR, etc.) during CPU read/write cycles; enable full register access over 4-bit address bus |
| RDN / WRN | Read/Write Strobe | Active-low control signals synchronized with CEN to initiate register access; support standard microprocessor bus timing |
| CEN | Chip Enable | Active-low global enable - places D0–D7 in high-impedance state when deasserted, enabling multi-device bus sharing |
| RxDA / RxDB | Channel A/B Receiver Input | Asynchronous serial data inputs (mark = high, space = low); accept standard NRZ format with start/stop/parity framing |
| TxDA / TxDB | Channel A/B Transmitter Output | Asynchronous serial outputs driven in mark state when idle or disabled; support full-duplex operation with independent baud control |
| INTRN | Interrupt Request | Open-drain active-low output requiring external pull-up; asserts on any enabled interrupt condition (FIFO, error, timer, port change) |
| X1/CLK / X2 | Crystal Oscillator Interface | Supports 3.6864 MHz crystal (or external clock) for system timing; X2 left open if external clock used on X1/CLK |
| OP0–OP7 | Configurable Output Port | Eight general-purpose outputs; individually set/reset via SOPR/ROPR commands; configurable as RTS/CTS, clock outputs, or interrupt signals |
| IP0–IP6 | Configurable Input Port | Seven general-purpose inputs with internal pull-ups; IP0–IP3 support change-of-state detection for edge-triggered CPU interrupts |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent UART channels | Enables simultaneous RS-232/RS-422 links (e.g., host console + peripheral interface) without software arbitration or shared resources |
| 8-character FIFO per channel | Reduces interrupt frequency by >8× vs. single-byte buffering - critical for real-time response in interrupt-driven firmware |
| Programmable receiver watchdog timer | Prevents lockup in multidrop or noisy line conditions by detecting missing stop bits or prolonged idle states on Rx input |
| RTS/CTS hardware flow control | Automatically disables remote transmitter when local Rx FIFO reaches programmed threshold - eliminates software handshaking latency |
| Multidrop (9-bit/wake-up) mode | Supports addressable terminal clusters using 9th bit addressing; receiver detects address match and wakes CPU only on relevant frames |
| On-chip crystal oscillator | Eliminates need for external oscillator circuit - simplifies board layout and reduces BOM count for clock-sourced UART applications |
Applications
| Industrial Terminal Controller | Legacy System Upgrade Interface |
|---|---|
|
Use Scenario: Embedded controller managing multiple serial peripherals (PLC, HMI, barcode scanner) over RS-232/422 links in factory automation cabinet. IC Role / Device Role / Timing Role: Dual UART handles concurrent bidirectional communication; FIFOs absorb burst data from scanners; watchdog timers prevent hang on cable disconnect. Use Value: Eliminates need for two discrete UART ICs or FPGA logic; reduces interrupt servicing time by 87% versus single-byte buffers; supports hot-plug detection via IP port change-of-state. |
Use Scenario: Retrofitting aging CNC machine tool with modern microcontroller while retaining original serial I/O cards designed for SCC2692. IC Role / Device Role / Timing Role: Pin- and function-compatible replacement for SCC2692; powers up in identical configuration; adds deeper FIFOs and watchdog without firmware changes. Use Value: Extends product lifecycle without PCB redesign; improves reliability in electrically noisy shop-floor environments via enhanced error detection and flow control. |
| Clustered Point-of-Sale Terminal | Modem/Data-Fax Interface Card |
|
Use Scenario: Central POS hub communicating with distributed cash drawers, receipt printers, and card readers over multidrop RS-485 bus. IC Role / Device Role / Timing Role: Implements wake-up (9-bit) mode to selectively activate target peripherals; uses Tx/Rx FIFOs to buffer command/response sequences. Use Value: Reduces bus contention and polling overhead; enables low-power sleep between transactions; supports simultaneous printer status polling and drawer command issuance. |
Use Scenario: PC add-in card providing hardware modem control (AT command parsing, carrier detect, ring indicator) alongside data transfer. IC Role / Device Role / Timing Role: DUART manages AT command channel (Channel A) and data channel (Channel B); OP0–OP7 configured as RTS/CTS/DTR/DSR/DCD/RI signals. Use Value: Offloads modem protocol handling from host CPU; enables true hardware handshaking at up to 230.4 kbaud; supports break detection for fax negotiation sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC26C92C1A | Commercial-grade version (0°C to +70°C); identical electrical specs and pinout | Suitable only for non-industrial environments; not rated for extended temperature cycling or thermal shock | Select SC26C92C1A only for cost-sensitive commercial equipment with controlled ambient conditions. |
| SCN2681AC | Legacy predecessor; no FIFOs (1-byte buffers), no watchdog timer, no counter/timer, limited baud rates (max 115.2 kbaud) | Lacks flow control robustness and interrupt efficiency; requires higher CPU intervention per character | SCN2681AC may be used where legacy compatibility is mandatory and throughput demands are low (<9600 baud). |
Compared with SC26C92C1A, the SC26C92A1A,529 delivers guaranteed operation across industrial temperatures and longer mean time between failures in harsh environments; compared with SCN2681AC, it provides 8× FIFO buffering, programmable baud generation, and hardware flow control - reducing firmware complexity and improving link reliability.
Availability
SC26C92A1A,529 is available at Aetrix Electronics and suitable for industrial terminal controllers, legacy system upgrades, clustered point-of-sale systems, modem interface cards, and embedded communication gateways requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SC26C92A1A,529 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with roots in Philips' pioneering analog and mixed-signal design heritage.
The SC26C92A1A,529 belongs to NXP's legacy industrial communications portfolio, engineered specifically for robust, long-lifecycle serial interface applications in factory automation, medical instrumentation, and telecom infrastructure where reliability and backward compatibility are critical.
FAQ
What is the maximum supported baud rate for SC26C92A1A,529?
The SC26C92A1A,529 supports baud rates up to 230.4 kbaud using its 27 fixed-rate table or programmable counter/timer. When using a 3.6864 MHz crystal, the highest fixed rate is 230.4 kbaud (16X mode). User-defined rates beyond this require external clocking or careful counter/timer divisor calculation to maintain <±1.2% error tolerance for reliable asynchronous communication.
Does SC26C92A1A,529 support hardware flow control?
Yes, SC26C92A1A,529 supports full RTS/CTS hardware flow control. OP0 and OP1 can be configured as active-low RTS outputs for Channels A and B respectively, while IP0 and IP1 serve as active-low CTS inputs. The DUART automatically deasserts RTS when the corresponding Rx FIFO reaches a user-programmed threshold, preventing receiver overrun without CPU intervention.
Is SC26C92A1A,529 pin-compatible with the SCC2692?
Yes, SC26C92A1A,529 is a pin-and-function replacement for the SCC2692. It powers up in SCC2692-compatible mode, shares identical pin assignments and register mapping, and maintains backward compatibility for existing PCB layouts and firmware. Added features (FIFOs, watchdog, extended registers) are accessed via new mode bits and do not affect legacy operation.
What package type is used for SC26C92A1A,529?
SC26C92A1A,529 is supplied in a 44-pin Plastic Leaded Chip Carrier (PLCC) package, designated SOT187-2. This surface-mount package features J-shaped leads, meets JEDEC MS-026 standards, and is qualified for reflow soldering per IPC/JEDEC J-STD-020. Thermal resistance is 19 mW/°C above 25°C ambient.
Can SC26C92A1A,529 operate with an external clock instead of a crystal?
Yes, SC26C92A1A,529 accepts an external clock signal applied to the X1/CLK pin, eliminating the need for a crystal. The clock must be within 0.1–8 MHz and meet AC timing requirements (tCLK ≥ 50 ns). When using external clocking, X2 must be left unconnected. This configuration is commonly used in systems with centralized clock distribution or where crystal EMI is a concern.
SC26C92A1A,529 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-LCC (J-Lead)
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- 8 Byte
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PLCC (16.59x16.59)
SC26C92A1A,529 FAQ
1.How can I place an order for SC26C92A1A,529 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC26C92A1A,529 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC26C92A1A,529 reliable?
The price and inventory of SC26C92A1A,529 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC26C92A1A,529 is usually 5 days.
3.What payment methods are accepted for SC26C92A1A,529?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC26C92A1A,529 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC26C92A1A,529?
SC26C92A1A,529 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC26C92A1A,529 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC26C92A1A,529?
For technical support, including SC26C92A1A,529 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC26C92A1A,529 requirements.
6.How does Aetrix verify that SC26C92A1A,529 is sourced from the original manufacturer or authorized distributors?
All SC26C92A1A,529 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC26C92A1A,529 meets industry standards.
7.What is the process for return or replacement of SC26C92A1A,529?
All SC26C92A1A,529 units undergo pre-shipment inspection (PSI). If there is an issue with SC26C92A1A,529, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC26C92A1A,529 part is unused and in its original packaging.
Return procedure for SC26C92A1A,529:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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