My Inquiry
My Account
NXP Semiconductors SC26C92A1B,557
- Part No.:
- SC26C92A1B,557
- Manufacturer:
- NXP Semiconductors
- Package:
- 44-QFP
- Datasheet:
-
SC26C92A1B,557.pdf
- Description:
- IC UART DUAL W/FIFO 44QFP
- Quantity:
- Payment:
- Shipping:
Inventory:1,152
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SC26C92A1B from NXP Semiconductors (formerly Philips) is a dual-channel CMOS universal asynchronous receiver/transmitter (DUART) with independent 8-character FIFOs per channel, programmable baud rates up to 230.4 kbaud, and full-duplex operation on +5 V supply. It serves as a pin- and function-compatible upgrade to SCC2692/SCN2681 in industrial serial communication interfaces for terminal controllers and legacy embedded systems.
For engineers reviewing the SC26C92A1B datasheet, SC26C92A1B pinout, SC26C92A1B application, or SC26C92A1B equivalent, key selection considerations include its 44-pin PQFP package, dual-channel independent clocking (1X/16X), watchdog timers per receiver, and support for multidrop wake-up mode - all critical for reliable RS-232/RS-422 interface design in temperature-stressed environments.
Technical Context
The SC26C92A1B implements two fully independent UART channels sharing a single 8-bit bidirectional data bus, address decoding (A0–A3), and interrupt logic (INTRN). Each channel features separate MR0/MR1 mode registers, independent baud rate selection via 27 fixed rates or programmable counter/timer, and configurable FIFO interrupt thresholds.
Its timing architecture integrates an on-chip crystal oscillator (X1/CLK, X2), 16-bit counter/timer with timer/counter/timeout modes, and four clock selectors enabling distinct receiver and transmitter clock sources - including external 1X/16X inputs on IP3–IP6 and OP2–OP3 - supporting asymmetric dual-speed operation in clustered terminal systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual independent full-duplex UARTs (Channel A and Channel B) |
| FIFO depth | 8 characters per receiver and transmitter - reduces CPU interrupt overhead and prevents overrun/underrun in burst traffic |
| Baud rate range | 50 to 230.4 kbaud - selectable from 27 fixed rates, 16X clock derived from counter/timer, or external 1X/16X input |
| Supply voltage | +5 V ±10% - compatible with legacy TTL/CMOS microprocessor buses without level-shifting |
| Operating temperature | –40°C to +85°C - qualified for industrial-grade embedded control and instrumentation |
| Package | 44-pin plastic quad flat pack (PQFP), SOT307–2 - surface-mount compatible with automated assembly |
| Interrupt system | Single active-low INTRN output with eight maskable conditions; OP3–OP7 configurable as discrete open-drain interrupt outputs |
Pinout & Package
SC26C92A1B is housed in a 44-pin plastic quad flat pack (PQFP), SOT307–2, with 0.8 mm lead pitch and exposed thermal pad (not electrically connected). Pin 1 is located at top-left corner with index mark; pins numbered counterclockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–4, 40–44 | A3, IP0, WRN, RDN, A0–A2, CEN, RESET, X2, X1/CLK, VCC | Address/data control: A0–A3 select internal registers; WRN/RDN/CEN enable read/write cycles; RESET initializes registers and disables transmitters; X1/CLK+X2 host crystal or external clock source; VCC supplies +5 V |
| 5–6, 28–29 | RxDB, TxDB, RxDA, TxDA | Serial I/O: Independent full-duplex data paths - RxDA/RxDB accept incoming serial bits (LSB first); TxDA/TxDB output transmitted serial streams (mark = high, space = low) |
| 7–10, 24–27 | OP1–OP7, INTRN, D6–D0 | Programmable I/O: OP0–OP7 serve as general-purpose outputs or dedicated signals (RTS, TxD/RxD clocks, FIFO status, interrupts); INTRN is active-low shared interrupt; D0–D7 form 3-state bidirectional data bus |
| 11–16, 33–37 | NC, IP2–IP6, GND | Function-selectable inputs: IP0–IP6 act as CTS, external clocks, or counter/timer inputs; internal ~100 kΩ pull-ups allow direct connection to open-collector signals; pins 16/17 are GND |
Key Features
| Feature | Design Value |
|---|---|
| Independent channel configuration | Each UART supports unique data format (5–8 data bits, odd/even/no parity, 1/1.5/2 stop bits in 1/16-bit increments), enabling mixed-interface systems (e.g., one channel RS-232, another RS-422) |
| Receiver watchdog timer | Dedicated timeout detection per channel - triggers interrupt on character reception stall, essential for robust multidrop bus monitoring |
| Flow control signaling | RTS/CTS handshaking via OP0/OP1 and IP0/IP1 - automatically disables remote transmitter when local FIFO reaches programmed threshold |
| Multidrop wake-up mode | 9-bit address detection with automatic channel activation - eliminates polling overhead in daisy-chained terminal networks |
| Power-down capability | Reduces ICC to ≤5 µA - preserves system-level power budget during idle periods without losing register state |
Applications
| Industrial Terminal Controller | Legacy Equipment Retrofit |
|---|---|
|
Use Scenario: Serial interface between PLC and ASCII-based operator terminals in factory automation cabinets. IC Role / Device Role / Timing Role: Dual-channel DUART handles simultaneous keyboard input (Channel A) and display update (Channel B) with independent 115.2 kbaud timing and RTS/CTS flow control. Use Value: 8-character FIFOs prevent character loss during CPU interrupt latency; watchdog timers detect broken cables or hung peripherals. |
Use Scenario: Replacing obsolete SCN2681 in medical diagnostic equipment requiring long-term component availability. IC Role / Device Role / Timing Role: Pin- and function-compatible drop-in replacement maintaining identical PCB layout and firmware initialization sequence. Use Value: Extended FIFO depth and enhanced interrupt flexibility improve reliability without software modification. |
| Clustered Point-of-Sale System | Modem Interface Bridge |
|
Use Scenario: Central controller managing multiple serial printers and barcode scanners over multidrop RS-485 bus. IC Role / Device Role / Timing Role: SC26C92A1B operates in 9-bit multidrop mode - Channel A receives addressed commands; Channel B manages status reporting. Use Value: Automatic wake-up mode activates only target device, minimizing bus contention and power draw across 32-node network. |
Use Scenario: Embedded modem subsystem in telecom access equipment requiring hardware handshaking and DMA-ready FIFO status. IC Role / Device Role / Timing Role: OP4–OP7 configured as discrete interrupt outputs for RxRDY/TxRDY/FULL/EMPTY - directly drives DMA controller request lines. Use Value: Eliminates CPU polling; FIFO status bits synchronized to internal clock ensure deterministic data transfer timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC26C92A1N | 40-pin DIP package (SOT129-1); same electrical specs and register set; lacks PQFP thermal performance | Suitable for through-hole prototyping or legacy board rework where footprint change is prohibited | Select when mechanical compatibility with existing DIP sockets or wave-solder processes is required |
| SC26C92A1A | 44-pin PLCC package (SOT187-2); identical functionality but different lead geometry and thermal resistance | Preferred for reflow-soldered designs needing better thermal dissipation than PQFP under sustained 230.4 kbaud operation | Choose when higher junction temperature margin is needed in compact enclosures with limited airflow |
Compared with SC26C92A1B, the SC26C92A1N offers identical logic but requires PCB redesign for DIP mounting, while SC26C92A1A provides superior thermal performance in PLCC form - both retain full register compatibility and industrial temperature rating, making them viable alternatives when package constraints dominate selection.
Availability
SC26C92A1B is available at Aetrix Electronics and suitable for industrial terminal controllers, legacy equipment retrofits, clustered point-of-sale systems, and modem interface bridges requiring stable component supply across extended product lifecycles.
Supply support for SC26C92A1B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors acquired Philips Semiconductors in 2006 and continues legacy IC development with focus on automotive, industrial, and secure connectivity solutions.
The SC26C92A1B belongs to NXP's legacy communications interface portfolio, designed specifically for long-lifecycle industrial systems requiring pin-compatible upgrades to aging UART solutions in harsh operating environments.
FAQ
What is the maximum baud rate supported by SC26C92A1B?
The SC26C92A1B supports a maximum baud rate of 230.4 kbaud in 16X mode using either its internal baud rate generator or external clock inputs. This is achieved with a 3.6864 MHz crystal or external clock source, and the device maintains accurate timing via its 16-bit counter/timer and programmable clock dividers - all verified in the official Philips Semiconductors datasheet dated 2000 Jan 31.
Does SC26C92A1B support hardware flow control?
Yes, SC26C92A1B supports full hardware flow control via RTS/CTS signaling. OP0 and OP1 can be configured as active-low Request-to-Send outputs, while IP0 and IP1 serve as Clear-to-Send inputs with internal pull-up resistors (~100 kΩ). The device automatically deasserts RTS when the receive FIFO reaches a user-programmed threshold - a feature confirmed in the "Flow Control Capability" section of the SC26C92 datasheet.
Is SC26C92A1B pin-compatible with SCC2692?
Yes, SC26C92A1B is explicitly documented as a pin- and function-compatible replacement for the SCC2692, with added features including deeper FIFOs, watchdog timers, and extended baud rate support. Its power-up configuration emulates the SCC2692, ensuring seamless firmware compatibility - as stated in the "DESCRIPTION" section of the Philips SC26C92 product specification.
What package type is used for SC26C92A1B?
SC26C92A1B uses a 44-pin plastic quad flat pack (PQFP) package, designated SOT307–2. It features gull-wing leads with 0.8 mm pitch and an exposed thermal pad (non-electrical). This package is optimized for surface-mount assembly and provides better thermal performance than the DIP variant under continuous high-speed operation - per the "ORDERING INFORMATION" table in the official datasheet.
Can SC26C92A1B operate with an external clock instead of a crystal?
Yes, SC26C92A1B accepts an external clock signal on the X1/CLK pin, eliminating the need for a crystal. The device supports frequencies from 0.1 MHz to 8 MHz, and the clock must meet specified rise/fall time and duty cycle requirements. When using external clocking, X2 is left unconnected - details are provided in the "Clock Timing" section and Figure 7 of the SC26C92 datasheet.
SC26C92A1B,557 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-QFP
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- 8 Byte
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PQFP (10x10)
SC26C92A1B,557 FAQ
1.How can I place an order for SC26C92A1B,557 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC26C92A1B,557 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC26C92A1B,557 reliable?
The price and inventory of SC26C92A1B,557 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC26C92A1B,557 is usually 5 days.
3.What payment methods are accepted for SC26C92A1B,557?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC26C92A1B,557 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC26C92A1B,557?
SC26C92A1B,557 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC26C92A1B,557 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC26C92A1B,557?
For technical support, including SC26C92A1B,557 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC26C92A1B,557 requirements.
6.How does Aetrix verify that SC26C92A1B,557 is sourced from the original manufacturer or authorized distributors?
All SC26C92A1B,557 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC26C92A1B,557 meets industry standards.
7.What is the process for return or replacement of SC26C92A1B,557?
All SC26C92A1B,557 units undergo pre-shipment inspection (PSI). If there is an issue with SC26C92A1B,557, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC26C92A1B,557 part is unused and in its original packaging.
Return procedure for SC26C92A1B,557:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SC26C92A1B,557 Tags
-
SC16IS741AIPWJ
NXP Semiconductors
-
TL16C550CPTR
Texas Instruments
-
TL16C550CIPTR
Texas Instruments
-
SC16C752BIB48,128
NXP Semiconductors
-
ST16C2550CQ48-F
MaxLinear, Inc.
-
ST16C2550CJ44-F
MaxLinear, Inc.
-
ST16C2552CJ44-F
MaxLinear, Inc.
-
ST16C1550IQ48-F
MaxLinear, Inc.
-
ST16C2550IQ48-F
MaxLinear, Inc.
-
ST16C554DIQ64-F
MaxLinear, Inc.
-
ST16C554DCQ64-F
MaxLinear, Inc.
-
XR17V352IB113-F
MaxLinear, Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
