NXP Semiconductors SC26C92C1B,551
- Part No.:
- SC26C92C1B,551
- Manufacturer:
- NXP Semiconductors
- Package:
- 44-QFP
- Datasheet:
-
SC26C92C1B,551.pdf
- Description:
- IC UART DUAL W/FIFO 44QFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,401
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SC26C92C1B,551 from NXP Semiconductors (formerly Philips) is a dual-channel CMOS universal asynchronous receiver/transmitter (DUART) in 44-pin PQFP package, supporting independent full-duplex serial communication on two channels with 8-byte FIFOs per channel, programmable baud rates up to 230.4 kbps, and integrated crystal oscillator - used in industrial terminal controllers, legacy serial server interfaces, and embedded system backplanes requiring robust RS-232/RS-422 bridging.
For engineers reviewing the SC26C92C1B,551 datasheet, SC26C92C1B,551 pinout, SC26C92C1B,551 application, or SC26C92C1B,551 equivalent, key selection criteria include independent Rx/Tx clocking per channel, watchdog timer per receiver, 7-bit input/8-bit output I/O ports with change-of-state detection, and compatibility with SCC2692-based legacy designs requiring deeper FIFOs and enhanced interrupt flexibility.
Technical Context
The SC26C92C1B,551 implements two independent UART channels sharing a single 16-bit programmable counter/timer and dual-mode baud rate generator capable of 27 fixed rates (50–230.4 kbps), external 1X/16X clock inputs, or user-defined rates derived from the counter/timer. Each channel supports fully independent configuration of data format (5–8 bits, parity type, 1/1.5/2 stop bits), operating mode (normal, loopback, multidrop), and interrupt level thresholds.
Its timing architecture integrates an on-chip crystal oscillator (3.6864 MHz nominal), four clock selectors for per-channel Rx/Tx source routing, and a watchdog timer per receiver that triggers timeout interrupts when no valid start bit is detected for >1 character time. The device powers up emulating the SCC2692 register map while adding Mode Register 0 and extended FIFO control logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual independent full-duplex UARTs (Channel A and Channel B) |
| FIFO depth | 8-character receive and transmit FIFOs per channel - reduces CPU interrupt overhead and prevents overrun/underrun in burst traffic |
| Baud rate range | 50 bps to 230.4 kbps - selectable from 27 fixed rates, external 1X/16X clocks, or counter/timer-derived custom rates |
| Data format | 5–8 data bits, odd/even/no/force parity, 1/1.5/2 stop bits - programmable per channel in 1/16-bit increments for precise framing control |
| Supply voltage | +5 V ±10% - single-supply operation compatible with legacy TTL/CMOS bus systems |
| Operating temperature | –40°C to +85°C - qualified for industrial environments without derating |
| Package | 44-pin plastic quad flat pack (PQFP), SOT307-2 - surface-mount compatible with automated assembly |
Pinout & Package
SC26C92C1B,551 is housed in a 44-pin plastic quad flat pack (PQFP) with 0.8 mm lead pitch, compliant with SOT307-2 mechanical specification. Pin 1 is located at top-left corner (index corner marked).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–4, 42–44 | A2, A1, A0, IP3 | Address inputs (A0–A3) and general-purpose input (IP3) - select internal registers during CPU read/write cycles; IP3 configurable as modem control or clock input |
| 5–6, 11–12, 19–22 | RxDB, TxDB, OP1, OP3, D7–D0, VSS | Channel B serial I/O, output port pins, bidirectional data bus (D0–D7), and ground - enable full-duplex communication and parallel interface to microprocessor |
| 23–24, 29–33, 36–39 | NC, INTRN, RxDA, TxDA, X1/CLK, X2, RESET, CEN | No-connect, active-low interrupt output, Channel A serial I/O, crystal oscillator inputs, reset input, and chip-enable - provide core control, timing, and interrupt signaling |
| 34–35, 40–41 | IP2, IP6, IP5, IP4 | Multipurpose input port (IP0–IP6) - support counter/timer clock, transmitter/receiver external clocks, or clear-to-send signals with internal ~1–4 µA pull-up |
| 14–18, 25–28, 30 | OP1–OP7, OP0, OP4–OP7 | General-purpose output port (OP0–OP7) - configurable as RTS/CTS, FIFO status flags, interrupt outputs (open-drain), or clock sources |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent UART channels | Each supports separate data format, baud rate, and mode register settings - enables asymmetric communication (e.g., 9600 bps on Channel A, 115.2 kbps on Channel B) |
| Watchdog timer per receiver | Generates interrupt if no valid start bit detected for >1 character time - critical for detecting broken connections or stuck lines in remote terminal systems |
| Programmable FIFO interrupt levels | Four threshold levels (1/2/4/8 characters) per FIFO - allows fine-grained trade-off between latency and interrupt frequency in real-time applications |
| Multidrop (9-bit/wake-up) mode | Enables address recognition via 9th bit - supports daisy-chained terminal networks where only addressed devices respond |
| 7-bit input / 8-bit output port | Change-of-state detection on IP0–IP3; individual bit set/reset on OP0–OP7 - provides hardware-assisted GPIO for modem control, DMA handshaking, or status monitoring |
Applications
| Industrial Terminal Controller | Legacy Serial Server Interface |
|---|---|
|
Use Scenario: Embedded controller managing multiple RS-232 terminals in factory automation, polling each via dedicated UART channel with flow control. IC Role / Device Role / Timing Role: Dual UART handles simultaneous host polling and peripheral response; 8-byte FIFOs absorb burst command replies; RTS/CTS prevents buffer overflow. Use Value: Eliminates CPU polling overhead via programmable FIFO interrupt levels and receiver watchdog - ensures deterministic response to terminal disconnect events. |
Use Scenario: Protocol converter bridging legacy RS-232 equipment to modern Ethernet backbone using microcontroller with limited UART peripherals. IC Role / Device Role / Timing Role: SC26C92C1B,551 acts as serial interface coprocessor; independent Rx/Tx clocks allow mismatched line speeds; multidrop mode supports addressable device clusters. Use Value: Enables single microcontroller to manage up to two independent serial protocols without external FIFO expansion or software bit-banging. |
| Embedded Backplane Communication | Point-of-Sale Peripheral Hub |
|
Use Scenario: Backplane card in modular instrumentation rack providing serial debug and configuration ports to multiple plug-in modules. IC Role / Device Role / Timing Role: SC26C92C1B,551 serves as centralized serial I/O hub; crystal oscillator eliminates need for external clock distribution; output port drives module presence/status LEDs. Use Value: Reduces board-level component count by integrating dual UART, I/O ports, and timing - simplifies layout and improves signal integrity over long traces. |
Use Scenario: POS terminal connecting receipt printer, barcode scanner, and cash drawer via isolated RS-232 links with hardware flow control. IC Role / Device Role / Timing Role: SC26C92C1B,551 manages three concurrent serial peripherals; OP0/OP1 configured as RTS outputs; IP0/IP1 as CTS inputs; FIFOs prevent print spooling loss. Use Value: Guarantees reliable transaction logging by preventing transmit underrun during high-speed receipt printing and scanner data bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC26C92C1A,551 | Same die, 44-pin PLCC package (SOT187-2) - different lead form and thermal profile | Preferred for through-hole prototyping or legacy PLCC socket compatibility | Select when board layout requires PLCC footprint or manual rework capability |
| SC26C92C1N,551 | Same die, 40-pin DIP package (SOT129-1) - wider body, through-hole mounting | Suitable for breadboard evaluation, educational kits, or low-volume industrial panels | Choose for rapid functional validation or systems where DIP sockets simplify field replacement |
Compared with SC26C92C1B,551, the PLCC variant offers better thermal dissipation in convection-cooled enclosures, while the DIP version enables direct socket-based debugging - both retain identical register mapping, timing behavior, and feature set, differing only in mechanical form factor and soldering process requirements.
Availability
SC26C92C1B,551 is available at Aetrix Electronics and suitable for industrial terminal controllers, legacy serial server interfaces, embedded backplane communication, and point-of-sale peripheral hubs requiring stable component supply across extended product lifecycles.
Supply support for SC26C92C1B,551 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with heritage in Philips' analog and mixed-signal portfolio.
The SC26C92C1B,551 belongs to NXP's legacy communications IC family designed for robust, long-lifecycle serial interface applications in industrial automation, point-of-sale, and embedded control systems where pin compatibility and firmware stability are critical.
FAQ
What is the primary function of the SC26C92C1B,551 in a system design?
The SC26C92C1B,551 functions as a dual-channel universal asynchronous receiver/transmitter (DUART), enabling two independent full-duplex serial communication paths with 8-byte FIFO buffering, programmable baud rates, and integrated I/O ports. It directly interfaces with microprocessors via an 8-bit data bus and supports polled or interrupt-driven operation - making it ideal for industrial terminal controllers and legacy serial server interfaces where deterministic UART performance is required.
Does the SC26C92C1B,551 support crystal oscillator operation, and what frequency is recommended?
Yes, the SC26C92C1B,551 includes an on-chip crystal oscillator and supports direct connection of a 3.6864 MHz crystal between X1/CLK and X2 pins - this frequency enables all 27 standard baud rates (50–230.4 kbps) in 16X mode. External clock inputs are also supported at 0.1–8 MHz, but crystal operation is preferred for stability in industrial environments where temperature drift must be minimized.
How does the watchdog timer in the SC26C92C1B,551 improve system reliability?
The SC26C92C1B,551 features a dedicated watchdog timer for each receiver that triggers an interrupt if no valid start bit is detected for longer than one character time. This detects broken cables, powered-off peripherals, or stuck transmitters - allowing firmware to initiate recovery (e.g., reinitialize the channel or log fault conditions) before data corruption occurs. It operates independently per channel and is programmable via the ACR register.
Can the SC26C92C1B,551 operate with different baud rates on Channel A and Channel B simultaneously?
Yes, the SC26C92C1B,551 supports fully independent baud rate configuration for each channel. Each receiver and transmitter can select its clock source from the shared baud rate generator (27 fixed rates), the programmable 16-bit counter/timer, or external 1X/16X inputs - enabling asymmetric operation such as 19.2 kbps on Channel A and 115.2 kbps on Channel B, essential for clustered terminal systems and protocol bridging applications.
What are the key differences between SC26C92C1B,551 and the older SCC2692 it replaces?
The SC26C92C1B,551 is a pin- and function-compatible upgrade to the SCC2692, adding 8-character FIFOs per channel (vs. 1-character in SCC2692), per-receiver watchdog timers, Mode Register 0, extended baud rate support up to 230.4 kbps, and programmable receiver/transmitter interrupts. It powers up in SCC2692 emulation mode, ensuring backward compatibility while delivering measurable improvements in interrupt efficiency and link robustness.
SC26C92C1B,551 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-QFP
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- 8 Byte
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PQFP (10x10)
SC26C92C1B,551 FAQ
1.How can I place an order for SC26C92C1B,551 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC26C92C1B,551 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC26C92C1B,551 reliable?
The price and inventory of SC26C92C1B,551 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC26C92C1B,551 is usually 5 days.
3.What payment methods are accepted for SC26C92C1B,551?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC26C92C1B,551 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC26C92C1B,551?
SC26C92C1B,551 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC26C92C1B,551 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC26C92C1B,551?
For technical support, including SC26C92C1B,551 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC26C92C1B,551 requirements.
6.How does Aetrix verify that SC26C92C1B,551 is sourced from the original manufacturer or authorized distributors?
All SC26C92C1B,551 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC26C92C1B,551 meets industry standards.
7.What is the process for return or replacement of SC26C92C1B,551?
All SC26C92C1B,551 units undergo pre-shipment inspection (PSI). If there is an issue with SC26C92C1B,551, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC26C92C1B,551 part is unused and in its original packaging.
Return procedure for SC26C92C1B,551:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SC26C92C1B,551 Tags

-
SC16IS741AIPWJ
NXP Semiconductors

-
TL16C550CPTR
Texas Instruments

-
TL16C550CIPTR
Texas Instruments

-
SC16C752BIB48,128
NXP Semiconductors

-
ST16C2550CQ48-F
MaxLinear, Inc.

-
ST16C2550CJ44-F
MaxLinear, Inc.

-
ST16C2552CJ44-F
MaxLinear, Inc.

-
ST16C1550IQ48-F
MaxLinear, Inc.

-
ST16C2550IQ48-F
MaxLinear, Inc.

-
ST16C554DIQ64-F
MaxLinear, Inc.

-
ST16C554DCQ64-F
MaxLinear, Inc.
-
XR17V352IB113-F
MaxLinear, Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

