NXP Semiconductors SC28C94A1A,518
- Part No.:
- SC28C94A1A,518
- Manufacturer:
- NXP Semiconductors
- Package:
- 52-LCC (J-Lead)
- Datasheet:
-
SC28C94A1A,518.pdf
- Description:
- IC UART QUAD W/FIFO 52-PLCC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SC28C94A1A,518 from NXP Semiconductors (formerly Philips Semiconductors) is a quad universal asynchronous receiver/transmitter (QUART) integrating four independent UART channels with 8-byte receive and transmit FIFOs per channel, programmable 5–8 data bits + parity, 1/1.5/2 stop bits, and independent baud rate selection up to 1 Mbps for each receiver and transmitter. It operates from a single +5 V supply and supports industrial temperature range (–40 °C to +85 °C) in a 52-pin PLCC package, targeting multi-channel serial communication in industrial control and terminal systems.
For engineers reviewing the SC28C94A1A,518 datasheet, SC28C94A1A,518 pinout, SC28C94A1A,518 application, or SC28C94A1A,518 equivalent, key selection criteria include its 4-channel full-duplex UART architecture, 16-bit counter/timer per block, vectored interrupt support with priority arbitration, on-chip crystal oscillator, and power-down mode reducing consumption by several magnitudes.
Technical Context
The SC28C94A1A,518 implements four industry-standard UARTs organized into two independent blocks (A/B and C/D), each with dedicated 16-bit counter/timers, separate baud rate generators, and shared global interrupt logic. Its timing architecture supports simultaneous use of internal crystal (3.6864 MHz or 7.3728 MHz), external clock (≤8 MHz), or programmable counter/timer outputs for receiver/transmitter clocking.
Each UART features hardware handshaking (RTS control), false start bit detection, line break generation/detection, and a "watch dog" timer per receiver. The interrupt system provides vectored responses with programmable vector format, IACKN/DTACKN handshake signals, and identification of highest-priority active interrupt via the Current Interrupt Register (CIR).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Baud Rate Range | 50 to 230.4 kbaud standard; up to 1 Mbaud via external 1X/16X clock or counter/timer - enables dual-speed channel operation (e.g., clustered terminals) |
| FIFO Depth | 8-byte receive and 8-byte transmit FIFO per UART - reduces host interrupt overhead and prevents overrun in burst-traffic scenarios |
| Data Format | 5–8 data bits, odd/even/no/force parity, 1/1.5/2 stop bits in 1/16-bit increments - supports legacy and custom serial protocols |
| Interrupt Architecture | Vectored interrupts with programmable vector format and priority arbitration - minimizes host processor polling and enables deterministic response to multi-channel events |
| Power Supply | +5 V ±10 % single supply with power-down mode - stops oscillator and preserves register state, cutting power by orders of magnitude for low-duty-cycle systems |
| Operating Temperature | –40 °C to +85 °C - qualified for industrial environments without derating |
| Package | 52-pin PLCC (SOT238-2) - surface-mount compatible with proven thermal and mechanical reliability in embedded PCBs |
Pinout & Package
SC28C94A1A,518 is housed in a 52-pin Plastic Leaded Chip Carrier (PLCC) package with gull-wing leads, designed for reflow soldering and high-pin-count density in industrial control modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CEN | Chip Enable | Active-low chip select enabling register access only when asserted with RDN or WRN - prevents spurious bus transactions during address decode |
| A5–A0 | Address Inputs | 6-bit address bus selecting one of 64 internal registers (e.g., MR0, SR, TxFIFO, ISR) - supports memory-mapped or I/O-mapped MPU interfacing |
| D7–D0 | Bidirectional Data Bus | 8-bit parallel interface for reading status/transmit data and writing control/configuration - TTL-compatible with 10 ns bus release time |
| RDN / WRN | Read/Write Strobe | Active-low control signals synchronizing register transfers - compatible with 80x86 and 680x0 bus timing protocols |
| IRQN | Interrupt Request | Open-drain active-low output signaling pending interrupts - requires external pull-up; directly usable with 680x0, inverted for 80x86 |
| IACKN | Interrupt Acknowledge | Active-low input confirming interrupt service - triggers vector placement on D7–D0 and updates CIR register |
| TXDA–TXDD | Transmit Outputs | Four independent serial outputs - each drives one UART's transmit line with programmable framing and break generation |
| RXDA–RXDD | Receive Inputs | Four independent serial inputs - each accepts 1X or 16X clocked asynchronous data with false start bit rejection |
| I/O0A–I/O3D | Multi-function I/O Pins | 16 configurable pins (4 per UART) supporting RTS/CTS, clock I/O, counter/timer I/O, or general-purpose use - includes change-of-state detection |
| X1/CLK, X2 | Crystal/Clock Interface | On-chip oscillator interface for 3.6864 MHz or 7.3728 MHz crystal; X1 accepts external clock ≤8 MHz - eliminates need for external oscillator circuitry |
| RESET | Master Reset | Active-high signal initializing all registers, FIFO pointers, timers, and interrupt logic - required at power-up to ensure known state |
Key Features
| Feature | Design Value |
|---|---|
| Independent Rx/Tx Baud Rate Selection | Enables dual-speed channel operation (e.g., host-to-terminal and terminal-to-host at different rates) without external clock switching logic |
| Eight-Byte FIFO per Channel | Reduces CPU interrupt frequency by >8× versus single-byte UARTs, improving real-time responsiveness in multi-channel systems |
| Vectored Interrupt Architecture | Eliminates software polling by delivering unique vector codes per interrupt source (e.g., Rx FIFO full, Tx FIFO empty, timer timeout) |
| Programmable Counter/Timers (2 × 16-bit) | Supports baud rate synthesis, time-delay generation, and receiver timeout monitoring - each timer can drive I/O pins or internal logic |
| Power-Down Mode with State Retention | Stops oscillator while preserving register contents and FIFO data - ideal for battery-backed or energy-constrained remote I/O nodes |
| TTL-Compatible +5 V Operation | Direct interface with legacy microcontrollers and logic families without level-shifting, simplifying board design and reducing BOM cost |
Applications
| Industrial Serial Gateway | Clustered Terminal System |
|---|---|
Use Scenario: Aggregating RS-232/RS-485 data from multiple PLCs, sensors, and HMIs into a central controller via isolated serial links. IC Role / Device Role / Timing Role: QUART acts as a 4-channel serial concentrator, managing independent baud rates, flow control, and FIFO buffering for concurrent device communication. Use Value: Eliminates need for four discrete UARTs and associated glue logic, reducing PCB area by >40% and interrupt latency through hardware priority arbitration. | Use Scenario: Supporting multiple dumb terminals connected to a central host in banking or point-of-sale environments with asymmetric upstream/downstream traffic. IC Role / Device Role / Timing Role: SC28C94A1A,518 serves as the host-side QUART, assigning distinct receiver and transmitter speeds per terminal to optimize bandwidth utilization. Use Value: Enables dual-speed operation (e.g., 9600 bps host→terminal, 19200 bps terminal→host) without external clock dividers or FPGA logic. |
| Legacy Equipment Retrofit | Modem Communication Controller |
Use Scenario: Upgrading aging industrial equipment with limited MCU resources to support modern serial diagnostics and firmware updates. IC Role / Device Role / Timing Role: Offloads serial protocol handling (framing, parity, break detection, FIFO management) from the main MCU using vectored interrupts. Use Value: Frees >30% of CPU cycles previously spent on bit-banged or polled UART routines, extending product lifecycle without MCU replacement. | Use Scenario: Embedded modem subsystem requiring simultaneous AT command parsing, data transmission, and line status monitoring across multiple channels. IC Role / Device Role / Timing Role: SC28C94A1A,518 manages four independent modem interfaces with RTS/CTS handshaking, line break detection, and error flagging per channel. Use Value: Hardware-based false start bit rejection and watch dog timers prevent spurious interrupts during noisy line conditions, improving connection reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| EXAR XR16L788IQ-F | 3.3 V only; integrates RS-232 transceivers; no on-chip oscillator; uses external clock only | Requires level-shifting for +5 V systems; lacks crystal oscillator and power-down mode | Choose for compact 3.3 V designs needing integrated transceivers, not for drop-in +5 V industrial retrofits |
| Maxim MAX3107ETJ+ | I²C/SPI interface; 2.7–5.5 V operation; 128-byte FIFO; no native counter/timers | Serial peripheral interface replaces parallel bus; higher FIFO depth but no hardware timer or vectored interrupts | Prefer for microcontroller-based systems with SPI/I²C buses and no need for legacy MPU timing compatibility |
Compared with SC28C94A1A,518, the XR16L788IQ-F sacrifices +5 V compatibility and oscillator integration for transceiver integration, while the MAX3107ETJ+ abandons parallel bus timing for serial control and deeper FIFOs - neither replicates the SC28C94A1A,518's combination of industrial-grade +5 V operation, on-chip oscillator, power-down mode, and vectored interrupt architecture.
Availability
SC28C94A1A,518 is available at Aetrix Electronics and suitable for industrial serial gateways, clustered terminal systems, legacy equipment retrofits, and modem communication controllers requiring stable component supply, long-lifecycle support, and guaranteed availability through extended manufacturing programs.
Supply support for SC28C94A1A,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep heritage in high-reliability mixed-signal ICs.
The SC28C94A1A,518 belongs to NXP's legacy industrial communications portfolio, designed specifically for robust, multi-channel asynchronous serial interfacing in harsh environments where long-term supply stability and deterministic interrupt response are critical.
FAQ
What is the maximum baud rate supported by SC28C94A1A,518?
The SC28C94A1A,518 supports up to 1 Mbps when using an external 1X or 16X clock input (≤8 MHz). With its internal crystal oscillator (3.6864 MHz or 7.3728 MHz), it delivers standard rates up to 230.4 kbaud and enhanced rates up to 500 kbaud via counter/timer configuration. The 16X clock mode ensures reliable sampling at high speeds by validating the start bit and centering samples within bit cells.
Does SC28C94A1A,518 include an on-chip oscillator?
Yes, SC28C94A1A,518 includes an on-chip crystal oscillator that operates directly from a 3.6864 MHz or 7.3728 MHz crystal connected between X1/CLK and X2 pins. When an external clock is used instead of a crystal, X1/CLK accepts frequencies up to 8 MHz and X2 is left unconnected. The oscillator serves as the timing reference for the baud rate generator, counter/timers, and internal logic.
How does the power-down mode function in SC28C94A1A,518?
In power-down mode, SC28C94A1A,518 stops the on-chip oscillator and retains all register contents and FIFO data while reducing power consumption by several orders of magnitude. The device exits power-down upon assertion of RESET or when CEN is activated with a valid read/write cycle. This mode is ideal for battery-powered or intermittently active serial nodes where low quiescent current is essential.
Can SC28C94A1A,518 operate with different baud rates for receiver and transmitter on the same channel?
Yes, SC28C94A1A,518 allows independent baud rate selection for the receiver and transmitter on each of its four UART channels. This is achieved via separate clock selectors in the Clock Select Register (CSR) for each channel, enabling dual-speed operation - for example, 9600 bps for host-to-terminal transmission and 19200 bps for terminal-to-host reception in clustered terminal systems.
What interrupt capabilities does SC28C94A1A,518 provide?
SC28C94A1A,518 provides vectored interrupts with programmable vector format, priority arbitration based on FIFO fill levels and event type, and identification of the highest-priority active interrupt via the Current Interrupt Register (CIR). It supports IACKN handshake, global interrupt registers, and individual maskable sources including Rx/Tx FIFO status, counter/timer timeout, line errors, and change-of-state detection - minimizing host polling overhead.
SC28C94A1A,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 52-LCC (J-Lead)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- Internal Oscillator, Timer/Counter
- Number of Channels:
- 4, QUART
- FIFO's:
- 8 Byte
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 52-PLCC (19.15x19.15)
SC28C94A1A,518 FAQ
1.How can I place an order for SC28C94A1A,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC28C94A1A,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC28C94A1A,518 reliable?
The price and inventory of SC28C94A1A,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC28C94A1A,518 is usually 5 days.
3.What payment methods are accepted for SC28C94A1A,518?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC28C94A1A,518 transactions.
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4.How is shipping managed for SC28C94A1A,518?
SC28C94A1A,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC28C94A1A,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC28C94A1A,518?
For technical support, including SC28C94A1A,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC28C94A1A,518 requirements.
6.How does Aetrix verify that SC28C94A1A,518 is sourced from the original manufacturer or authorized distributors?
All SC28C94A1A,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC28C94A1A,518 meets industry standards.
7.What is the process for return or replacement of SC28C94A1A,518?
All SC28C94A1A,518 units undergo pre-shipment inspection (PSI). If there is an issue with SC28C94A1A,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC28C94A1A,518 part is unused and in its original packaging.
Return procedure for SC28C94A1A,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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