NXP Semiconductors SC28L201A1DGG,112
- Part No.:
- SC28L201A1DGG,112
- Manufacturer:
- NXP Semiconductors
- Package:
- 48-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
SC28L201A1DGG,112.pdf
- Description:
- IC UART W/FIFO 48-TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SC28L201A1DGG from NXP Semiconductors (formerly Philips) is a dual-mode, high-performance UART IC supporting both Intel 80xxx and Motorola 68000 bus interfaces. It delivers full-duplex asynchronous communication with independent 256-byte receiver/transmitter FIFOs, 3.125 Mbit/s max data rate (16× clock mode), 3.3 V or 5 V operation, and programmable baud rates up to 2.0 MBd - deployed in industrial serial gateways, multi-drop terminal systems, and legacy microprocessor-based communications controllers.
For engineers reviewing the SC28L201A1DGG datasheet, SC28L201A1DGG pinout, SC28L201A1DGG application, or SC28L201A1DGG equivalent, key selection considerations include bus interface flexibility (MODE_IM-selectable), dual-speed channel capability, hardware/software flow control (RTS/CTS + Xon/Xoff), 256-byte FIFO interrupt threshold programming, and crystal- or external-clock-driven timing with integrated oscillator.
Technical Context
The SC28L201A1DGG implements two independent 16-bit counter/timers for baud rate generation and watchdog functions, with eight selectable clock sources including internal oscillator output, external SCLK, and prescaled system clocks. Its timing architecture supports simultaneous 1× and 16× sampling modes per channel, enabling precise false start bit detection and line break handling.
It integrates an intelligent interrupt arbitration system delivering context-aware vectors - including FIFO fill level, interrupt source ID (11 maskable conditions), and channel-specific status - via programmable priority levels (0–255) and open-drain IRQN output. The 14-pin multifunction I/O port (I/O0A–I/O7A + I/O0B–I/O6B) provides change-of-state detection, modem control signaling, and DMA-ready status outputs under software configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Data Rate | 3.125 Mbit/s (16× clock mode); enables high-throughput serial links without oversampling penalty |
| FIFO Depth | 256-byte RX/TX buffers; reduces CPU interrupt overhead by >95% vs. 16-byte UARTs in burst traffic |
| Bus Interface | Selectable Intel 80xxx (WRN/RDN/CEN) or Motorola 68000 (R/WN/DACKN/IACKN) via MODE_IM pin; no PCB redesign needed for legacy platform migration |
| Supply Voltage | +3.3 V ±10 % or +5.0 V ±10 %; single-rail compatibility simplifies power design across mixed-voltage systems |
| Baud Rate Options | 27 fixed rates (50 Bd–2.0 MBd), plus user-defined rates via 16-bit counter/timer; covers MIDI, RS-232, RS-485, and custom protocols |
| Operating Temp | −40 °C to +85 °C; qualified for industrial control cabinets and outdoor telecom enclosures |
| Crystal Oscillator | On-chip 14.7456 MHz oscillator (7–16.2 MHz range); eliminates external crystal driver circuitry and reduces BOM count |
Pinout & Package
TSSOP48 package (SOT362-1), 6.1 mm body width, 0.5 mm pitch, lead-free and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MODE_IM (19) | Bus Mode Select | Configures interface: HIGH = 80xxx (Intel), LOW = 68000 (Motorola); determines WRN/RDN vs. R/WN/DACKN behavior |
| IRQN (46) | Interrupt Request | Active-low open-drain output; carries context-aware vector with FIFO level and source ID for prioritized servicing |
| X1/SCLK (47) | Crystal or Clock Input | Accepts 7–16.2 MHz crystal or external clock; drives all timing blocks including BRG and counter/timers |
| TXD (45) / RXD (7) | Serial Data I/O | Full-duplex UART channel A; TTL-level outputs with 'mark' (HIGH) idle state; supports RS-232/RS-485 level-shifting |
| I/O0A–I/O7A (37–44) | Programmable I/O Port A | 8-bit multifunction port; configurable as RTS/CTS/DTR/DSR, clock outputs, or COS-triggered interrupt inputs |
| I/O0B, I/O2B–I/O6B (29,30,31,32,33) | Programmable I/O Port B | 5-bit auxiliary port with COS detection; used for alarm monitoring, power fail sensing, or custom control signals |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bus interface selectability | Hardware-configured via MODE_IM pin - eliminates firmware abstraction layers for 80xxx/68000 platform reuse |
| Independent RX/TX baud rate control | Enables asymmetric link speeds (e.g., 115.2 kbps RX / 9600 bps TX) in clustered terminal or bridge applications |
| Three-character recognition engine | Supports Xon/Xoff, address wake-up (9-bit mode), and general-purpose pattern match with four automation levels |
| Real-time transmitter error check | Compares delayed transmit data against looped-back receive data within 1–2 bit times; detects physical layer faults before protocol stack intervention |
| Receiver time-out and watchdog timer | Prevents lock-up during broken connections; triggers interrupt on idle-line detection or FIFO starvation |
| Power-down mode | Draws <10 µA; retains register state and enables fast wake-on-RXD transition for battery-backed remote terminals |
Applications
| Industrial Serial Gateway | Legacy Microprocessor Terminal |
|---|---|
Use Scenario: Aggregating data from multiple RS-485 field devices into a Modbus TCP backbone using an ARM9 host. IC Role / Device Role / Timing Role: SC28L201A1DGG acts as the primary UART interface with automatic RS-485 direction control, 256-byte FIFO buffering, and RTS/CTS handshaking to prevent bus collisions. Use Value: Eliminates packet loss during high-speed polling cycles; reduces host CPU load by 70% vs. software-managed 16-byte FIFOs. | Use Scenario: Upgrading a 1980s-era 68000-based point-of-sale terminal with enhanced throughput and reliability. IC Role / Device Role / Timing Role: SC28L201A1DGG replaces obsolete SC26C92 in 68000 bus mode (MODE_IM = LOW), retaining identical pinout and register mapping while adding 256-byte FIFOs and 3.125 Mbit/s capability. Use Value: Doubles transaction throughput without modifying existing PCB layout or firmware initialization routines. |
| Multi-Drop Cluster Controller | Secure Modem Interface |
Use Scenario: Managing 32 ASCII terminals over a single RS-422 daisy-chain using address-based wake-up. IC Role / Device Role / Timing Role: SC28L201A1DGG operates in 9-bit multi-drop mode with automatic address recognition, receiver timeout, and RTS-controlled line turnaround. Use Value: Enables selective wake-up of individual terminals; cuts average power consumption by 85% versus always-on polling. | Use Scenario: Integrating a V.34 analog modem into a medical device requiring EMI-hardened serial control and flow-controlled AT command exchange. IC Role / Device Role / Timing Role: SC28L201A1DGG provides Xon/Xoff software flow control, real-time error checking on AT response lines, and COS-triggered DCD/RI detection on I/O ports. Use Value: Guarantees zero command loss during noisy line conditions; meets IEC 60601-1 immunity requirements via deterministic interrupt latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16C2552IBS,112 | 2-channel, 64-byte FIFO, 5 V only, no 68000 bus mode, lower max baud (3 Mbit/s) | Lacks multi-drop wake-up, dual-speed channel, and MODE_IM flexibility; suited for simpler dual-port designs | Choose when cost-sensitive dual-UART integration is required and legacy bus compatibility is not needed. |
| TL16C752BPFG | 2-channel, 64-byte FIFO, 3.3 V only, TI-specific register set, no crystal oscillator | Requires external clock; lacks character recognition engine and real-time error check; incompatible register map | Choose only for new 3.3 V designs where TI ecosystem support and dual-channel density outweigh feature trade-offs. |
Compared with SC16C2552IBS,112 and TL16C752BPFG, the SC28L201A1DGG uniquely combines 256-byte FIFOs, dual-bus interface selectability, on-chip oscillator, and 9-bit multi-drop wake-up - making it the sole option for upgrading legacy 68000/80xxx platforms while meeting modern throughput and reliability demands.
Availability
SC28L201A1DGG is available at Aetrix Electronics and suitable for industrial serial gateways, legacy microprocessor terminal upgrades, and multi-drop cluster controllers requiring stable component supply across extended product lifecycles.
Supply support for SC28L201A1DGG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with roots in Philips' pioneering data communications IP.
The SC28L201A1DGG belongs to NXP's IMPACT family of high-reliability UARTs designed specifically for backward-compatible upgrades of legacy industrial and telecom equipment operating in harsh environments.
FAQ
What bus interface modes does the SC28L201A1DGG support?
The SC28L201A1DGG supports both Intel 80xxx (WRN/RDN/CEN) and Motorola 68000 (R/WN/DACKN/IACKN) bus interfaces, selected by the MODE_IM pin voltage. In 80xxx mode (MODE_IM HIGH or open), WRN and RDN control data transfers; in 68000 mode (MODE_IM LOW), R/WN and DACKN define read/write cycles. This dual-mode capability allows seamless integration into either architecture without PCB changes.
How does the SC28L201A1DGG handle flow control in demanding serial applications?
The SC28L201A1DGG implements both hardware (RTS/CTS) and software (Xon/Xoff) flow control with programmable thresholds and automatic response. Its 256-byte FIFOs allow deep buffering, while the three-character recognition engine enables autonomous Xon/Xoff handling without CPU intervention. For RS-485 systems, it supports automatic direction control in 9-bit multi-drop mode, ensuring reliable handshaking even under heavy bus loading.
Can the SC28L201A1DGG operate with an external clock instead of a crystal?
Yes, the SC28L201A1DGG accepts an external clock on the X1/SCLK pin (7–50 MHz range). When using an external clock, the X2 pin must be left unconnected or driven by no more than two CMOS/TTL loads. The internal crystal oscillator is disabled automatically, and all timing blocks - including baud rate generator and counter/timers - derive clocks from X1/SCLK, preserving full functionality and specification compliance.
What is the purpose of the real-time transmitter error check feature in the SC28L201A1DGG?
The real-time transmitter error check in the SC28L201A1DGG compares delayed transmit data against looped-back receive data within 1–2 bit times to detect physical-layer errors (e.g., cable faults, connector issues, noise-induced corruption) before they propagate to higher protocol layers. It generates an interrupt on mismatch, enabling immediate diagnostics and failover - critical for mission-critical industrial serial links where undetected corruption could cause system failure.
Does the SC28L201A1DGG support power-saving modes for battery-operated devices?
Yes, the SC28L201A1DGG features a power-down mode drawing less than 10 µA while retaining register contents. It supports wake-on-RXD activity and receiver time-out detection, allowing rapid resumption of communication after sleep. This makes the SC28L201A1DGG suitable for portable terminals, remote sensors, and other battery-powered applications requiring long standby life without sacrificing serial responsiveness.
SC28L201A1DGG,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-TFSOP (0.240", 6.10mm Width)
- Series:
- Impact
- Packaging:
- Tube
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 1, UART
- FIFO's:
- 256 Byte
- Protocol:
- RS485
- Data Rate (Max):
- 3.125Mbps
- Voltage - Supply:
- 3.3V, 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-TSSOP
SC28L201A1DGG,112 FAQ
1.How can I place an order for SC28L201A1DGG,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC28L201A1DGG,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC28L201A1DGG,112 reliable?
The price and inventory of SC28L201A1DGG,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC28L201A1DGG,112 is usually 5 days.
3.What payment methods are accepted for SC28L201A1DGG,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC28L201A1DGG,112 transactions.
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4.How is shipping managed for SC28L201A1DGG,112?
SC28L201A1DGG,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC28L201A1DGG,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC28L201A1DGG,112?
For technical support, including SC28L201A1DGG,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC28L201A1DGG,112 requirements.
6.How does Aetrix verify that SC28L201A1DGG,112 is sourced from the original manufacturer or authorized distributors?
All SC28L201A1DGG,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC28L201A1DGG,112 meets industry standards.
7.What is the process for return or replacement of SC28L201A1DGG,112?
All SC28L201A1DGG,112 units undergo pre-shipment inspection (PSI). If there is an issue with SC28L201A1DGG,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC28L201A1DGG,112 part is unused and in its original packaging.
Return procedure for SC28L201A1DGG,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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