NXP Semiconductors SC28L91A1B,551

Overview

SC28L91A1B,551 from NXP Semiconductors (formerly Philips) is a single-channel 3.3 V or 5.0 V universal asynchronous receiver/transmitter (UART) with 16-byte transmit and receive FIFOs, programmable dual-speed baud rate generation (up to 1 Mbps), and pin-selectable Intel 80xxx or Motorola 68xxx bus interface. It operates across –40°C to +85°C and supports full-duplex serial communication in industrial embedded systems requiring robust flow control and interrupt-driven I/O.

For engineers reviewing the SC28L91A1B,551 datasheet, SC28L91A1B,551 pinout, SC28L91A1B,551 application, or SC28L91A1B,551 equivalent, key selection considerations include its dual-voltage operation, independent Rx/Tx baud rate programming, watchdog timer for receiver timeout, RTS/CTS hardware flow control, and multipurpose 7-bit input / 8-bit output ports supporting DMA handshaking and modem signaling.

Technical Context

The SC28L91A1B,551 implements a fully programmable UART channel with separate 16-character FIFO buffers for transmit and receive paths, reducing CPU interrupt overhead and preventing overrun/underrun in high-throughput serial links. Its baud rate generator supports 28 fixed rates (50–230.4 kbaud), user-defined rates via a 16-bit counter/timer, and external 1X or 16X clock inputs - enabling precise timing for clustered terminal or multi-drop wake-up applications.

Bus interface is selected via the I/M pin: high for Intel 80xxx mode (WRN/RDN strobes), low for Motorola 68xxx mode (R/WN + IACKN/DACKN). The device integrates an on-chip crystal oscillator, power-down mode, receiver time-out detection, and automatic echo/local/remote loopback modes - all configurable via Mode Register 0 (MR0) and auxiliary control registers.

Key Specifications

Pinout & Package

SC28L91A1B,551 is supplied in a 44-pin plastic quad flat pack (PQFP), SOT307-2 package, with lead pitch of 0.8 mm and body size 10 × 10 mm. Pin functions are identical between 80xxx and 68xxx bus modes except for RDN/WRN vs. R/WN and DACKN/IACKN assignments.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar UART applications.

Compared with SC28L91A1B,551, the SC28L92A1B,551 adds channel density without sacrificing feature parity, while the TL16C550CPTR offers simpler integration at the expense of industrial-grade timing flexibility and dual-voltage support.

Availability

SC28L91A1B,551 is available at Aetrix Electronics and suitable for industrial PLC serial interfaces, legacy terminal emulation, RS-485 multi-drop network nodes, and modem-controlled remote data loggers requiring stable component supply and long-term lifecycle assurance.

Supply support for SC28L91A1B,551 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.

The SC28L91A1B,551 belongs to NXP's IMPACT family of serial communications controllers, designed specifically for robust, low-power, mixed-voltage serial interfacing in harsh industrial environments.

FAQ

What voltage levels does the SC28L91A1B,551 support?

The SC28L91A1B,551 supports both +3.3 V ±10 % and +5.0 V ±10 % supply voltages, allowing seamless integration into mixed-voltage embedded systems without external level shifters. Input thresholds scale accordingly: VIH is 0.8×VCC for 3.3 V operation and 2.4 V for 5 V operation, ensuring reliable logic-level compatibility across both domains. This dual-voltage capability is confirmed in the DC Electrical Characteristics tables on pages 10–11 of the official datasheet.

Does the SC28L91A1B,551 support hardware flow control?

Yes, the SC28L91A1B,551 supports full hardware flow control via RTS/CTS signaling. OP0 can be configured as active-low RTSN output, and IP0 as active-low CTSN input, with automatic deactivation of RTSN upon receive buffer full condition. This behavior is controlled by the Flow Control Enable bit in the Auxiliary Control Register (ACR) and is validated in the Functional Description section (page 2) and Pin Configuration tables (pages 8–9).

Can the SC28L91A1B,551 operate in multi-drop (9-bit) mode?

Yes, the SC28L91A1B,551 supports multi-drop (also called 'wake-up' or '9-bit') mode through Mode Register A (MRA) configuration. In this mode, the ninth bit distinguishes address bytes from data bytes, enabling selective node activation on shared RS-485 buses. The device also includes automatic address recognition and receiver time-out detection - critical features for low-power remote nodes, as documented in the Channel Mode section (page 2) and Figure 1 block diagram.

What is the maximum data transfer rate supported by the SC28L91A1B,551?

The SC28L91A1B,551 supports a maximum data transfer rate of 1 Mbps in both 1X and 16X clocking modes. This is achieved using external 1X or 16X clock inputs or the internal counter/timer-derived baud rate generator. The AC Characteristics table (page 12) confirms t_CLK min = 30 ns (33.3 MHz max clock period), enabling reliable sampling at 1 Mbps with 16X oversampling. Real-world throughput is constrained by FIFO depth and interrupt latency, not raw clock speed.

How is bus interface selection implemented on the SC28L91A1B,551?

Bus interface selection on the SC28L91A1B,551 is performed via the I/M pin: logic high configures Intel 80xxx mode (using WRN/RDN strobes), and logic low selects Motorola 68xxx mode (using R/WN and IACKN/DACKN signals). This pin-programmable architecture allows one PCB design to support either microprocessor family without hardware modification, as specified in the Pin Configuration Diagrams (pages 4–5) and Pin Function Tables (pages 8–9).