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NXP Semiconductors SC28L92A1B,528
- Part No.:
- SC28L92A1B,528
- Manufacturer:
- NXP Semiconductors
- Package:
- 44-QFP
- Datasheet:
-
SC28L92A1B,528.pdf
- Description:
- IC UART DUAL W/FIFO 44QFP
- Quantity:
- Payment:
- Shipping:
Inventory:1,965
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Product details
Overview
SC28L92A1B,528 from NXP Semiconductors is a dual-channel CMOS DUART operating at 3.3 V or 5.0 V, providing two independent full-duplex asynchronous serial channels with 16-character transmit and receive FIFOs, programmable baud rates up to 230.4 kBd, and per-channel watchdog timers. It serves as a pin- and function-compatible upgrade to SC26C92 in industrial control backplanes and legacy telecom interface cards.
For engineers reviewing the SC28L92A1B,528 datasheet, SC28L92A1B,528 pinout, SC28L92A1B,528 application, or SC28L92A1B,528 equivalent, key selection criteria include dual-channel FIFO depth, 68xxx/80xxx bus interface configurability, independent receiver/transmitter baud rate programming, and support for RS-232/RS-422-level external drivers via TTL-level I/O.
Technical Context
The SC28L92A1B,528 implements a dual-channel architecture with separate 16-byte FIFOs per channel, independent baud rate generators (28 fixed rates + programmable counter/timer-derived rates), and configurable 68xxx or 80xxx bus interface selected via the I/M pin. Each channel supports programmable data format (5–8 bits, parity options, 1/1.5/2 stop bits) and multiple operational modes including local/remote loopback and multi-drop wake-up.
Its timing subsystem integrates an on-chip crystal oscillator (3.6864 MHz nominal), 16-bit counter/timer, and four clock selectors enabling independent clock source assignment per receiver and transmitter - including external 1× or 16× clocks, BRG output, or timer-derived signals. Flow control is implemented via RTS/CTS signaling with automatic deactivation based on FIFO status.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.3 V ±10 % or 5.0 V ±10 % - single-rail operation enables drop-in replacement in mixed-voltage legacy systems without level-shifting. |
| FIFO Depth | 16 characters per receiver and transmitter - reduces CPU interrupt overhead by >50 % versus 8-byte FIFO predecessors like SC26C92. |
| Baud Rate Range | 50 kBd to 230.4 kBd (28 fixed rates) + user-defined rates up to 1 Mbit/s - supports clustered terminal systems requiring asymmetric Rx/Tx speeds. |
| Bus Interface | Pin-selectable Motorola 68xxx or Intel 80xxx protocol - eliminates need for external bus translators in mixed-architecture designs. |
| Operating Temperature | −40 °C to +85 °C - qualified for industrial automation and outdoor telecom equipment deployment. |
| Package | QFP44 (SOT307-2), 10 × 10 × 1.75 mm - surface-mount compatible with standard reflow profiles and IPC-7351B land patterns. |
| Interrupt Architecture | Single active-low open-drain INTRN output with eight maskable sources plus six configurable OPx pins as discrete interrupt outputs - enables flexible priority handling in real-time OS environments. |
Pinout & Package
SC28L92A1B,528 is housed in a plastic quad flat package (QFP44, SOT307-2) with 44 leads, 1.3 mm lead length, and 10 × 10 × 1.75 mm body. Pin functions are identical in both 68xxx and 80xxx bus modes except for R/WN vs WRN/RDN and IACKN vs IP6 assignments.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D7 | Bidirectional data bus | Transfers register commands, status, and data; 3-state controlled by CEN and R/WN or WRN/RDN. |
| A0–A3 | Address inputs | Select internal registers (MR0–MR3, SR, ISR, IMR, etc.) and I/O ports (IP, OP) for read/write access. |
| RxDA / RxDB | Channel A/B serial input | TTL-level asynchronous receive inputs; idle HIGH (Mark); sampled on rising edge of receiver clock. |
| TxDA / TxDB | Channel A/B serial output | TTL-level asynchronous transmit outputs; idle HIGH (Mark); least-significant bit first. |
| OP0 / OP1 | RTS outputs | Active-low request-to-send signals; auto-deactivated during transmit/receive to enable hardware flow control. |
| IP0 / IP1 | CTS inputs | Active-low clear-to-send inputs; used to gate transmitter operation when remote buffer is full. |
| INTRN | Interrupt request | Open-drain active-low output asserting on any unmasked interrupt condition; requires external pull-up. |
| X1/CLK, X2 | Clock inputs | Support crystal (3.6864 MHz nominal) or external clock; X2 is output when crystal used, must be left open for external drive. |
Key Features
| Feature | Design Value |
|---|---|
| 16-byte FIFO per channel | Reduces receiver overrun risk and interrupt frequency by factor of two versus 8-byte FIFO predecessors. |
| Per-channel watchdog timer | Enables autonomous detection of stuck serial lines in unattended remote terminal units without CPU polling. |
| Independent Rx/Tx baud rate selection | Supports dual-speed protocols such as cluster controller-to-terminal links where upstream/downstream rates differ. |
| Programmable FIFO fill threshold | MR0A[3] bit selects 8- or 16-byte interrupt trigger level - ensures strict SC26C92 compatibility when required. |
| Multi-function I/O ports | 7-bit input port (IP0–IP6) with change-of-state detection and 8-bit output port (OP0–OP7) with individual bit set/reset - replaces discrete GPIO expanders in space-constrained designs. |
Applications
| Industrial Serial Backplane | Legacy Telecom Interface Card |
|---|---|
|
Use Scenario: Connecting PLC I/O modules over RS-422 daisy-chain using isolated UART links. IC Role / Device Role / Timing Role: Dual-channel DUART provides simultaneous control and status reporting paths with independent baud rate tuning for master/slave timing alignment. Use Value: 16-byte FIFOs prevent data loss during burst polling cycles; RTS/CTS flow control maintains integrity across long cable runs. |
Use Scenario: Replacing obsolete SC26C92 in PBX line card firmware interfaces. IC Role / Device Role / Timing Role: Pin-compatible UART upgrade delivering deeper FIFOs and faster max baud rate while retaining identical register map and power-up behavior. Use Value: Eliminates redesign effort; extended temperature range (−40 °C to +85 °C) improves field reliability in uncooled chassis. |
| Embedded Modem Control Unit | Multi-Drop Terminal Cluster |
|
Use Scenario: Managing AT command exchange and data transfer between host processor and GSM modem. IC Role / Device Role / Timing Role: One channel handles AT command framing and error detection; second channel routes high-speed data payload with separate clock domain. Use Value: Independent baud rate programming allows 9600 Bd AT channel and 115.2 kBd data channel simultaneously. |
Use Scenario: Central controller communicating with 32+ ASCII terminals over shared RS-485 bus. IC Role / Device Role / Timing Role: DUART operates in multi-drop (9-bit) mode with automatic wake-up; watchdog timers detect offline terminals. Use Value: Reduces host polling load; hardware-based address recognition avoids software overhead in terminal discovery. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC26C92B1A,518 | 8-byte FIFOs per channel; no watchdog timer; only 80xxx bus interface; max baud 19.2 kBd. | Limited to low-speed legacy systems where SC28L92A1B,528's enhanced features are unnecessary. | Select when cost sensitivity outweighs need for FIFO depth, speed, or watchdog functionality. |
| MAX3100EAP+ | SPI interface only; single channel; integrated RS-232 transceiver; 64-byte FIFO; 3.3 V only. | Targets compact microcontroller-based designs requiring minimal external components and SPI host connectivity. | Choose for new designs prioritizing small footprint and SPI-native integration over dual-channel parallel-bus flexibility. |
Compared with SC26C92B1A,518 and MAX3100EAP+, the SC28L92A1B,528 uniquely delivers dual parallel-bus UART channels with 16-byte FIFOs, pin-selectable bus protocol, and industrial temperature range - making it optimal for retrofitting legacy 68xxx/80xxx systems requiring higher throughput and reliability.
Availability
SC28L92A1B,528 is available at Aetrix Electronics and suitable for industrial serial backplanes, legacy telecom interface cards, and embedded modem control units requiring stable component supply across extended product lifecycles.
Supply support for SC28L92A1B,528 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep heritage in communications ICs dating to Philips Semiconductor.
The SC28L92A1B,528 belongs to NXP's IMPACT family of universal asynchronous receiver/transmitters designed specifically for drop-in upgrades of legacy SC26xxx-series UARTs in industrial and telecom infrastructure.
FAQ
What voltage levels does SC28L92A1B,528 support for reliable operation?
SC28L92A1B,528 operates reliably across a single supply rail of either 3.3 V ±10 % or 5.0 V ±10 %. Its CMOS-LSI design ensures full functionality and specified timing performance at both voltages without configuration changes, enabling direct substitution in mixed-voltage legacy systems.
How does SC28L92A1B,528 handle bus interface compatibility with different microprocessors?
SC28L92A1B,528 uses the I/M pin to select between Motorola 68xxx and Intel 80xxx bus protocols. When I/M is grounded, it enables 68xxx mode with R/WN and IACKN/DACKN signaling; when left open or pulled HIGH, it defaults to 80xxx mode with WRN/RDN strobes - eliminating need for external bus logic.
Can SC28L92A1B,528 replace SC26C92 without hardware modifications?
Yes - SC28L92A1B,528 powers up in SC26C92-compatible mode with identical register mapping and default behavior. Its QFP44 package matches SC26C92 pinout exactly, and MR0A[3] can be set to 0 to enforce 8-byte FIFO operation for full functional equivalence.
What is the maximum data rate achievable with SC28L92A1B,528?
SC28L92A1B,528 supports data transfer rates up to 1 Mbit/s in both 1× and 16× clocking modes. At 230.4 kBd (16×), the internal baud rate generator delivers precise timing; higher rates require external clocking via X1/CLK or counter/timer-derived sources.
Does SC28L92A1B,528 include hardware flow control capability?
Yes - SC28L92A1B,528 provides RTS/CTS flow control through OP0/OP1 (RTS) and IP0/IP1 (CTS) pins. These signals can be automatically asserted/deasserted based on FIFO fill level, preventing receiver overrun without CPU intervention in interrupt-driven systems.
SC28L92A1B,528 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-QFP
- Series:
- Impact
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- 16 Byte
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 3.3V, 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PQFP (10x10)
SC28L92A1B,528 FAQ
1.How can I place an order for SC28L92A1B,528 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC28L92A1B,528 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC28L92A1B,528 reliable?
The price and inventory of SC28L92A1B,528 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC28L92A1B,528 is usually 5 days.
3.What payment methods are accepted for SC28L92A1B,528?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SC28L92A1B,528 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SC28L92A1B,528?
SC28L92A1B,528 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SC28L92A1B,528 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC28L92A1B,528?
For technical support, including SC28L92A1B,528 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC28L92A1B,528 requirements.
6.How does Aetrix verify that SC28L92A1B,528 is sourced from the original manufacturer or authorized distributors?
All SC28L92A1B,528 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC28L92A1B,528 meets industry standards.
7.What is the process for return or replacement of SC28L92A1B,528?
All SC28L92A1B,528 units undergo pre-shipment inspection (PSI). If there is an issue with SC28L92A1B,528, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC28L92A1B,528 part is unused and in its original packaging.
Return procedure for SC28L92A1B,528:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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