NXP Semiconductors SC68C752BIB48,128
- Part No.:
- SC68C752BIB48,128
- Manufacturer:
- NXP Semiconductors
- Package:
- 48-LQFP
- Datasheet:
-
SC68C752BIB48,128.pdf
- Description:
- IC UART DUAL 48LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SC68C752BIB48,128 from NXP Semiconductors is a dual-channel UART IC with 64-byte transmit/receive FIFOs, programmable hardware/software flow control, and support for data rates up to 5 Mbit/s. It implements a Motorola 68-mode parallel interface, operates across 2.5 V/3.3 V/5 V supply rails, and targets embedded serial communication in industrial control and modem interfaces.
For engineers reviewing the SC68C752BIB48,128 datasheet, SC68C752BIB48,128 pinout, SC68C752BIB48,128 application, or SC68C752BIB48,128 equivalent, key selection considerations include its LQFP48 package, dual-channel independent addressing via A3, 64-byte FIFO trigger level programmability, auto-RTS/CTS timing behavior, and compatibility with legacy 68k bus protocols.
Technical Context
The SC68C752BIB48,128 integrates two independent UART channels sharing a single 8-bit Motorola 68-mode parallel bus, with channel selection controlled by A3 and CS. Each channel features dedicated RXRDYn/TXRDYn handshaking outputs, separate modem control (RTS/CTS/DTR/DSR/RI/CD), and independent FIFO status reporting via the FIFO Ready register.
Its baud rate generator uses a programmable 16-bit divisor with optional prescaler divide-by-4, enabling precise timing across wide input clock ranges. The Transmission Control Register (TCR) stores per-channel halt/resume thresholds for auto-RTS, while the Trigger Level Register (TLR) configures interrupt/DMA trigger points independently for TX/RX FIFOs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | Up to 5 Mbit/s - supports high-speed serial links such as industrial Ethernet gateways or multi-protocol modems. |
| FIFO depth | 64 bytes per channel - reduces CPU interrupt load and enables burst DMA transfers without data loss. |
| Supply voltage | 2.5 V / 3.3 V / 5 V - allows direct interfacing with mixed-voltage legacy and modern microcontrollers. |
| Interface mode | Motorola 68-mode parallel bus - compatible with 68k-family processors and legacy industrial controllers. |
| Temperature range | −40 °C to +85 °C - qualified for industrial environments including factory automation and outdoor communications equipment. |
| Flow control | Hardware (auto-RTS/CTS) and software (Xon/Xoff) - eliminates overrun errors in asymmetric data paths like RS-232 modem bridges. |
| Crystal support | XTAL1/XTAL2 pins - accepts external crystal (1–25 MHz) or buffered clock input for flexible timing source integration. |
Pinout & Package
SC68C752BIB48,128 is housed in a plastic low-profile quad flat package (LQFP48) measuring 7 × 7 × 1.4 mm (SOT313-2), with exposed pad not present. All 48 leads are gull-wing surface-mount terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A3 | Address select inputs | Select internal register address (A0–A2) and UART channel (A3 = LOW → Channel A, HIGH → Channel B). |
| D0–D7 | Bidirectional data bus | 8-bit parallel interface carrying register reads/writes; 3-state outputs support bus sharing. |
| R/W | Read/write control | Active-HIGH = read from device; active-LOW = write to device - defines data transfer direction on D0–D7. |
| CS | Chip select | Active-LOW enables register access; must be asserted with valid A3 to target Channel A or B. |
| IRQ | Interrupt request output | Wire-ORed signal indicating pending interrupt from either channel; requires external pull-up to VCC. |
| TXA/TXB, RXA/RXB | Serial I/O | Independent full-duplex UART channels; TX outputs drive RS-232/RS-485 transceivers; RX inputs accept TTL-level signals. |
| RTSA/RTSB, CTSA/CTSB | Modem handshake | Auto-RTS/CTS outputs/inputs enable hardware flow control; behavior configured via EFR[6:7] and TCR thresholds. |
| RESET | Asynchronous reset | Active-LOW resets all registers except DLL/DLM/XON1/XON2/XOFF1/XOFF2; initializes TX/RTS/DTR to HIGH, RXRDY to HIGH, TXRDY to LOW. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable FIFO trigger levels | Independent TX/RX trigger configuration via TLR register enables optimized DMA burst sizing and interrupt latency tuning. |
| Auto-RTS with configurable thresholds | Halt/resume levels stored in TCR[3:0]/TCR[7:4] allow dynamic RTS assertion based on real-time receive buffer occupancy. |
| 64-byte error-tagged RX FIFO | Each byte includes 3 status bits (parity, framing, break) - enables error isolation without polling LSR per character. |
| Internal loopback mode | Enables self-test of transmitter/receiver path without external cabling - critical for field diagnostics in telecom infrastructure. |
| Sleep mode with wake-on-RX | Reduces power during idle periods; exits sleep automatically upon RX activity - extends battery life in portable serial adapters. |
Applications
| Industrial PLC Serial Gateway | Legacy Modem Interface Board |
|---|---|
Use Scenario: Connects RS-485 fieldbus networks to a 68k-based controller using isolated UART channels. IC Role / Device Role / Timing Role: Dual UART bridges parallel bus to two independent serial streams; provides hardware flow control to prevent buffer overflow during variable-speed motor feedback transmission. Use Value: 64-byte FIFOs absorb jitter from servo encoder bursts; auto-RTS halts transmission when PLC firmware latency exceeds 10 ms. | Use Scenario: Interfaces V.34 analog modems to an embedded Linux host via ISA-style 68-mode bus. IC Role / Device Role / Timing Role: Manages simultaneous AT command channel (Channel A) and data channel (Channel B); handles CTS/RTS handshaking and carrier detect signaling. Use Value: Independent modem status registers (MSR) per channel allow concurrent line monitoring and data transfer without CPU arbitration overhead. |
| Multi-Protocol Communication Adapter | Secure Remote Terminal Unit (RTU) |
Use Scenario: Enables USB-to-serial conversion with dual virtual COM ports supporting different protocols (e.g., Modbus RTU and DNP3). IC Role / Device Role / Timing Role: Provides two isolated UARTs with independent baud rate generators; supports simultaneous 9600 bps Modbus and 115200 bps DNP3 framing. Use Value: Programmable Xon/Xoff characters (XON1/XON2/XOFF1/XOFF2) allow protocol-specific flow control token assignment without firmware modification. | Use Scenario: Used in oil/gas SCADA RTUs requiring secure, tamper-resistant serial telemetry over leased lines. IC Role / Device Role / Timing Role: Implements encrypted serial tunneling via Channel A (data) and Channel B (key exchange); uses internal loopback for cryptographic self-test. Use Value: Sleep mode cuts quiescent current to <10 µA during standby; wake-on-RX ensures immediate response to emergency telemetry packets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SC16C752BIB48 | Lacks 68-mode interface; uses industry-standard 8080-style bus timing and control signals. | Requires PCB redesign for address/control logic; incompatible with existing 68k-based firmware drivers. | Select only if migrating from legacy 68k architecture to ARM-based host with standard UART peripheral drivers. |
| TL16C752BPTR | TI part with identical 64-byte FIFOs and 5 Mbit/s rating but no auto-RTS threshold programming (fixed 1/2-full). | Cannot implement adaptive RTS behavior for variable-latency hosts; requires tighter interrupt servicing deadlines. | Choose when cost sensitivity outweighs need for dynamic flow control tuning in fixed-latency systems. |
Compared with SC16C752BIB48 and TL16C752BPTR, the SC68C752BIB48,128 uniquely supports Motorola 68-mode timing and fully programmable auto-RTS thresholds - enabling drop-in replacement in legacy industrial controllers without firmware or layout changes.
Availability
SC68C752BIB48,128 is available at Aetrix Electronics and suitable for industrial PLC gateways, legacy modem interface boards, and secure remote terminal units requiring stable component supply across extended product lifecycles.
Supply support for SC68C752BIB48,128 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The SC68C752BIB48,128 belongs to NXP's legacy UART product line designed specifically for backward-compatible integration into 68k-based industrial control systems and telecom infrastructure requiring robust, long-lifecycle serial interface ICs.
FAQ
What is the maximum data rate supported by the SC68C752BIB48,128?
The SC68C752BIB48,128 supports data rates up to 5 Mbit/s per channel. This is achieved using its programmable 16-bit baud rate divisor and optional prescaler, allowing precise timing alignment with high-frequency crystals or external clocks. The SC68C752BIB48,128 maintains signal integrity at this rate under industrial temperature conditions (−40 °C to +85 °C) with proper PCB layout and termination.
How does the SC68C752BIB48,128 handle dual-channel addressing on a shared bus?
The SC68C752BIB48,128 uses the A3 address line in conjunction with CS to select between Channel A (A3 = LOW) and Channel B (A3 = HIGH). Both channels share D0–D7, R/W, and IRQ, but maintain independent internal registers, FIFOs, and modem control logic. This architecture allows time-multiplexed access without external multiplexers, preserving the 68-mode timing protocol required by legacy controllers.
Does the SC68C752BIB48,128 support automatic hardware flow control?
Yes, the SC68C752BIB48,128 supports automatic hardware flow control via programmable auto-RTS and auto-CTS functions. These are enabled independently through bits EFR[6] and EFR[7], and use trigger levels stored in the Transmission Control Register (TCR) to dynamically assert/deassert RTS based on receive FIFO occupancy. The SC68C752BIB48,128 eliminates overrun errors in asymmetric data paths when auto-RTS and auto-CTS are cross-connected.
What is the function of the TCR register in the SC68C752BIB48,128?
The Transmission Control Register (TCR) in the SC68C752BIB48,128 stores the halt and resume trigger levels used by auto-RTS flow control. Bits TCR[3:0] define the receive FIFO occupancy threshold at which RTS is de-asserted, and TCR[7:4] define the level at which RTS is re-asserted. This register enables adaptive flow control responsive to real-time host processing latency - a capability not found in basic UARTs like the 16550 or TL16C752.
Can the SC68C752BIB48,128 operate with a 2.5 V supply?
Yes, the SC68C752BIB48,128 is fully specified to operate from 2.5 V, 3.3 V, or 5 V supplies. Its I/O pins are 5 V tolerant on inputs only (D0–D7, A0–A3, R/W, CS, RESET, XTAL1, CDA/CDB, CTSA/CTSB, DSRA/DSRB, RIA/RIB), allowing safe interfacing with higher-voltage peripherals while the core logic runs at lower voltage for reduced power consumption. This makes the SC68C752BIB48,128 suitable for mixed-signal industrial designs.
SC68C752BIB48,128 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Features:
- -
- Number of Channels:
- 2, DUART
- FIFO's:
- 64 Byte
- Protocol:
- -
- Data Rate (Max):
- 5Mbps
- Voltage - Supply:
- 2.5V, 3.3V, 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- Yes
- With False Start Bit Detection:
- Yes
- With Modem Control:
- Yes
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP (7x7)
SC68C752BIB48,128 FAQ
1.How can I place an order for SC68C752BIB48,128 through Aetrix?
Please submit a Request for Quotation (RFQ) for SC68C752BIB48,128 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SC68C752BIB48,128 reliable?
The price and inventory of SC68C752BIB48,128 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SC68C752BIB48,128 is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SC68C752BIB48,128?
For technical support, including SC68C752BIB48,128 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SC68C752BIB48,128 requirements.
6.How does Aetrix verify that SC68C752BIB48,128 is sourced from the original manufacturer or authorized distributors?
All SC68C752BIB48,128 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SC68C752BIB48,128 meets industry standards.
7.What is the process for return or replacement of SC68C752BIB48,128?
All SC68C752BIB48,128 units undergo pre-shipment inspection (PSI). If there is an issue with SC68C752BIB48,128, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SC68C752BIB48,128 part is unused and in its original packaging.
Return procedure for SC68C752BIB48,128:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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