NXP Semiconductors SCC2681AE1N40,112
- Part No.:
- SCC2681AE1N40,112
- Manufacturer:
- NXP Semiconductors
- Package:
- 40-DIP (0.600", 15.24mm)
- Datasheet:
-
SCC2681AE1N40,112.pdf
- Description:
- IC DUART 1MBPS 40DIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,001
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Product details
Overview
SCC2681AE1N40 from NXP Semiconductors (formerly Philips Semiconductors) is a dual-channel CMOS asynchronous receiver/transmitter (DUART) operating at +5 V ±10% over –40 °C to +85 °C, supporting independent 5–8-bit data formats with parity and 1/1.5/2 stop bits, 18 fixed baud rates up to 115.2 kbaud, and quadruple-buffered receivers for industrial serial communication systems.
For engineers reviewing the SCC2681AE1N40 datasheet, SCC2681AE1N40 pinout, SCC2681AE1N40 application, or SCC2681AE1N40 equivalent, key selection criteria include independent channel baud rate programming, on-chip crystal oscillator (3.6864 MHz), 40-pin DIP package with 3-state data bus, and support for automatic RTS/CTS flow control in clustered terminal and multidrop RS-232/RS-485 systems.
Technical Context
The SCC2681AE1N40 integrates two fully independent UART channels sharing a single 8-bit bidirectional data bus (D0–D7), address lines A0–A3, and chip enable (CEN), with separate serial I/O pins (RxDA/TxDA and RxDB/TxDB) and programmable clock sources per channel - including internal crystal oscillator (X1/CLK, X2), external 1×/16× clocks, or 16-bit counter/timer outputs.
Each channel features quadruple-buffered receive holding registers, false start bit detection, line break generation/detection, and programmable modes (normal, auto-echo, local/remote loopback); the interrupt system provides one active-low open-drain INTRN output plus six wire-ORable interrupt-capable OP pins (OP3–OP7), all maskable via IMR/ISR registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | +5 V ±10% - supports industrial rail tolerance without external regulation |
| Operating Temperature | –40 °C to +85 °C - qualified for extended industrial environments |
| Baud Rate Range | 50 to 115.2 kbaud - 18 fixed rates plus user-defined via 16-bit counter/timer |
| Data Format | 5–8 data bits, odd/even/no/force parity, 1/1.5/2 stop bits - configurable per channel in 1/16-bit increments |
| Receiver Buffering | Quadruple-buffered RHR - reduces CPU interrupt overhead and prevents overrun in high-throughput polling or interrupt-driven systems |
| Crystal Oscillator | On-chip 3.6864 MHz oscillator - eliminates external crystal driver circuitry; X1/CLK and X2 pins support direct crystal connection |
| Interrupt Architecture | Single INTRN + six OP pins (OP3–OP7) - enables discrete, wire-ORable interrupt routing for DMA-ready receiver/transmitter/counter events |
Pinout & Package
SCC2681AE1N40 is housed in a 40-pin plastic dual in-line package (DIP40, 600 mil width, SOT129-1), with 3-state bidirectional data bus (D0–D7), four address lines (A0–A3), active-low read/write strobes (RDN, WRN), chip enable (CEN), reset (RESET), and dedicated serial I/O (RxDA/TxDA, RxDB/TxDB), clock (X1/CLK, X2), and multifunction I/O (IP0–IP6, OP0–OP7).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D7 | Bidirectional Data Bus | 3-state interface to CPU; D0 = LSB; transfers commands, status, and data |
| A0–A3 | Address Inputs | Select internal registers (MR, SR, THR, RHR, etc.) and ports (IP, OP) |
| RDN / WRN | Read / Write Strobe | Active-low control signals synchronized with CEN; define bus cycle timing |
| CEN | Chip Enable | Active-low master enable; places D0–D7 in high-impedance when HIGH |
| RESET | Hardware Reset | Active-high signal clearing all registers, stopping timer, and forcing Tx outputs to mark (HIGH) |
| INTRN | Interrupt Request | Open-drain, active-low output asserting on any of eight maskable conditions |
| RxDA / RxDB | Channel A/B Receiver Input | Serial input pins sampling on rising edge of 1× clock or center of 16× bit time |
| TxDA / TxDB | Channel A/B Transmitter Output | Serial output pins transmitting LSB-first with programmable framing and break support |
| X1/CLK / X2 | Clock Input / Crystal Terminal | Supports 3.6864 MHz crystal or external clock; X1 accepts 1.0–4.0 MHz input |
| IP0–IP6 | Multipurpose Input Port | 7-bit port with internal 1–4 µA pull-ups; configurable as CTS, clock, or COS inputs |
| OP0–OP7 | Multipurpose Output Port | 8-bit port with individual set/reset; assignable to RTS, TxRDY/RxRDY, DMA, or auto RS-485 turn-around |
Key Features
| Feature | Design Value |
|---|---|
| Independent Baud Rate Programming | Each channel selects from 18 fixed rates, counter/timer-derived non-standard rates, or external 1×/16× clocks - enabling dual-speed operation in clustered terminals |
| Quadruple-Buffered Receivers | Four-level FIFO-like buffering per channel minimizes overrun risk and reduces interrupt frequency in bursty serial traffic |
| Flow Control Integration | Hardware RTS/CTS signaling via OP0/OP1 and IP0/IP1, with automatic deactivation on transmit/receive completion - simplifies protocol stack implementation |
| Change-of-State Detection | Four IP pins (IP0–IP3) support edge-triggered interrupts with 25–50 µs minimum pulse width - useful for external event monitoring without CPU polling |
| Auto RS-485 Turn-Around | OP0–OP7 outputs can be configured to drive DE/RE lines synchronously with Tx activity - eliminates external logic for half-duplex bus control |
Applications
| Industrial Serial Gateway | Clustered Terminal System |
|---|---|
Use Scenario: Connecting legacy RS-232 field devices (PLCs, sensors, HMIs) to a central controller via isolated serial backplane. IC Role / Device Role / Timing Role: Dual-channel DUART providing simultaneous full-duplex bridging between two independent serial buses with independent baud rate configuration. Use Value: Eliminates need for two discrete UARTs; quadruple buffering ensures no data loss during CPU context switches in real-time Linux or RTOS environments. | Use Scenario: Multi-user terminal server supporting eight dumb terminals over two daisy-chained DUARTs with shared host CPU. IC Role / Device Role / Timing Role: Asynchronous communications controller managing two independent serial ports with automatic echo and remote loopback for diagnostics. Use Value: Independent receiver/transmitter speed selection allows mixed-baud terminal populations (e.g., 9600 bps printers + 115.2 kbps workstations) on same board. |
| RS-485 Multidrop Network Node | Embedded Diagnostic Interface |
Use Scenario: Microcontroller-based motor drive with half-duplex RS-485 control bus requiring automatic direction control and collision-free addressing. IC Role / Device Role / Timing Role: UART with integrated auto-turnaround driving DE/RE lines via OP0–OP7; supports wake-up mode for low-power listening. Use Value: Reduces external component count by eliminating discrete logic gates or MOSFET drivers; start-end break detection enables reliable node discovery. | Use Scenario: In-circuit debug port on medical device PCB, exposing firmware logs and calibration data over dedicated serial link. IC Role / Device Role / Timing Role: Dedicated diagnostic UART channel with false start bit rejection and line break generation for session synchronization. Use Value: On-chip crystal oscillator ensures stable timing without layout-sensitive external components; 100 kΩ internal pull-ups simplify unused IP pin handling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SCC2692AE1N40 | Same pinout, enhanced ESD rating (±4 kV HBM), improved noise immunity on IP/OP pins, identical register map and timing | Preferred for new designs in electrically noisy factory floors or medical equipment with stringent EMC requirements | Select SCC2692AE1N40 when higher robustness is required without layout or firmware changes |
| TL16C550CPN | 5-V 16550-compatible UART with 16-byte FIFO, no on-chip oscillator, requires external clock, different register mapping and interrupt structure | Suitable for PC-compatible BIOS bootloaders or legacy OS drivers expecting 16550 behavior | Choose TL16C550CPN only if software relies on 16550 register compatibility or FIFO depth is critical |
Compared with SCC2692AE1N40, the SCC2681AE1N40 lacks enhanced ESD protection but offers identical functionality at lower cost; versus TL16C550CPN, it provides superior integration (on-chip oscillator, dual independent channels, COS detection) but requires custom driver development due to non-16550 register layout.
Availability
SCC2681AE1N40 is available at Aetrix Electronics and suitable for industrial serial gateways, clustered terminal systems, RS-485 multidrop networks, and embedded diagnostic interfaces requiring stable component supply across extended temperature ranges.
Supply support for SCC2681AE1N40 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips' semiconductor division, specializing in secure connectivity, automotive, industrial, and IoT solutions.
The SCC2681AE1N40 belongs to NXP's legacy industrial communications IC portfolio, designed specifically for robust, long-lifecycle embedded serial infrastructure in factory automation, point-of-sale, and medical instrumentation.
FAQ
What is the maximum supported baud rate for SCC2681AE1N40?
The SCC2681AE1N40 supports a maximum baud rate of 115.2 kbaud using its internal 18-rate baud generator or programmable counter/timer. When using external 16× clock inputs, the device achieves 1 MB/sec data transfer (1× mode) or 125 kB/sec (16× mode), limited by bus timing and CPU interface speed rather than UART core capability.
Does SCC2681AE1N40 include an on-chip crystal oscillator?
Yes, the SCC2681AE1N40 integrates an on-chip crystal oscillator circuit compatible with a 3.6864 MHz crystal connected between X1/CLK and X2 pins. This eliminates the need for external oscillator components and simplifies PCB layout for timing-critical serial applications.
How many interrupt sources does SCC2681AE1N40 support?
The SCC2681AE1N40 supports eight maskable interrupt sources routed through a single active-low open-drain INTRN output: RxRDY/FFULL, TxRDY, delta break, counter/timer, input port change, and three channel-specific status flags. Additionally, OP3–OP7 can be configured as six discrete wire-ORable interrupt outputs.
Can SCC2681AE1N40 operate with different baud rates on each channel?
Yes, the SCC2681AE1N40 allows independent baud rate selection for Channel A and Channel B. Each channel can use any of 18 fixed rates, a counter/timer-derived rate, or an external 1×/16× clock - making it ideal for dual-speed applications like clustered terminal systems with mixed peripheral speeds.
What package type is used for SCC2681AE1N40?
The SCC2681AE1N40 uses a 40-pin plastic dual in-line package (DIP40) with 600 mil width and SOT129-1 footprint. It is pin-compatible with other SCC2681 variants in DIP40 packaging, including commercial-grade SCC2681AC1N40 and industrial-grade SCC2681AE1N40.
SCC2681AE1N40,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 40-DIP (0.600", 15.24mm)
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- -
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 40-DIP
SCC2681AE1N40,112 FAQ
1.How can I place an order for SCC2681AE1N40,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for SCC2681AE1N40,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SCC2681AE1N40,112 reliable?
The price and inventory of SCC2681AE1N40,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SCC2681AE1N40,112 is usually 5 days.
3.What payment methods are accepted for SCC2681AE1N40,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SCC2681AE1N40,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SCC2681AE1N40,112?
SCC2681AE1N40,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SCC2681AE1N40,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SCC2681AE1N40,112?
For technical support, including SCC2681AE1N40,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SCC2681AE1N40,112 requirements.
6.How does Aetrix verify that SCC2681AE1N40,112 is sourced from the original manufacturer or authorized distributors?
All SCC2681AE1N40,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SCC2681AE1N40,112 meets industry standards.
7.What is the process for return or replacement of SCC2681AE1N40,112?
All SCC2681AE1N40,112 units undergo pre-shipment inspection (PSI). If there is an issue with SCC2681AE1N40,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SCC2681AE1N40,112 part is unused and in its original packaging.
Return procedure for SCC2681AE1N40,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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