NXP Semiconductors SCC2691AC1N24,129

Overview

SCC2691AC1N24 from NXP Semiconductors (formerly Philips Semiconductors) is a CMOS-LSI universal asynchronous receiver/transmitter (UART) providing full-duplex serial communication with quadruple-buffered receiver, independent receiver/transmitter baud rate selection, and 16-bit programmable counter/timer. It operates from a single +5V supply, supports 5–8 data bits, 1/1.5/2 stop bits, and odd/even/no parity, and is used in industrial terminal systems requiring dual-speed channel operation.

For engineers reviewing the SCC2691AC1N24 datasheet, SCC2691AC1N24 pinout, SCC2691AC1N24 application, or SCC2691AC1N24 equivalent, key selection criteria include TTL-compatible 24-pin DIP packaging, receiver FIFO overrun prevention via RTS handshaking, power-down mode reducing current to 0.5 µA, and support for crystal or external clock inputs up to 4 MHz.

Technical Context

The SCC2691AC1N24 implements a fully integrated UART with independent baud rate generators for receiver and transmitter, selectable from 22 fixed rates (50–115.2 kbaud), non-standard user-defined rates via its 16-bit counter/timer, or external 1X/16X clocks. Its timing architecture includes an on-chip crystal oscillator (3.6864 MHz nominal), clock selectors, and programmable CSR register controlling clock source routing.

It features a 3-level receiver FIFO with RxRDY/FFULL status signaling, automatic RTS assertion when FIFO fills, false start bit detection, line break generation/detection, and multi-mode operation including local/remote loopback and automatic echo. The interrupt system provides a single open-drain INTRN output with seven maskable sources and separate ISR/IMR registers.

Key Specifications

Pinout & Package

SCC2691AC1N24 is housed in a 24-pin plastic dual in-line package (DIP), 300 mil width, with 0.3 inch row spacing and through-hole mounting. Pin 1 is located at the left end of the top row (notch side up), and pin numbering proceeds counter-clockwise.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar UART applications.

Compared with SCC2691AC1N24, SCC2692AC1N24 offers identical functionality with improved thermal specification and timer precision, while SC16C2550BIB48 delivers greater bandwidth and buffering at the cost of compatibility and voltage-level changes - making SCC2691AC1N24 optimal for cost-sensitive, legacy-anchored commercial deployments.

Availability

SCC2691AC1N24 is available at Aetrix Electronics and suitable for industrial terminal systems, legacy equipment interface modules, embedded control panels, and diagnostic communication modules requiring stable component supply across long production lifecycles.

Supply support for SCC2691AC1N24 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with roots in Philips' pioneering analog and mixed-signal IC development.

The SCC2691AC1N24 belongs to NXP's legacy communications interface product line, designed specifically for robust, low-power asynchronous serial communication in resource-constrained embedded systems and industrial control equipment.

FAQ

What is the maximum baud rate supported by the SCC2691AC1N24?

The SCC2691AC1N24 supports up to 115.2 kbaud using its internal baud rate generator or external clock inputs. While the datasheet lists 22 fixed rates up to that value, non-standard rates - including those exceeding 115.2 kbaud - are achievable via the programmable 16-bit counter/timer when driven by a crystal or external clock up to 4 MHz. Actual sustained throughput depends on CPU interrupt latency and FIFO management in the host system.

Does the SCC2691AC1N24 require an external crystal, or can it operate with an external clock signal?

The SCC2691AC1N24 can operate with either a 3.6864 MHz crystal connected between X1/CLK and X2 pins, or with an external clock signal applied to X1/CLK (X2 left unconnected or grounded). The device's crystal oscillator circuit is internally configured for fundamental-mode crystals; external clock inputs must meet VIH/VIL thresholds and transition time specs defined in the AC characteristics table. Both options feed the same timing block for baud generation and counter/timer operation.

How does the receiver FIFO and RTS handshaking work together in the SCC2691AC1N24?

In the SCC2691AC1N24, the 3-level receiver FIFO triggers automatic deassertion of the RTSN output (configured via ACR) when the FIFO becomes full. This signals the remote transmitter to pause, preventing overrun. When space becomes available (e.g., after CPU reads RHR), RTSN is reasserted. This hardware flow control operates independently of software polling and requires no CPU intervention - significantly improving reliability in bursty or high-speed receive scenarios.

Can the SCC2691AC1N24 generate a break condition on the TxD line?

Yes, the SCC2691AC1N24 can generate a break condition - a prolonged low state on TxD - by issuing a "start break" command via the Command Register (CR). The break continues until a "stop break" command is issued. During break transmission, the transmitter halts normal character output and holds TxD low; this feature is commonly used for modem control, system reset signaling, or wake-up sequences in multi-processor UART networks.

Is the SCC2691AC1N24 compatible with 3.3 V microcontrollers?

No, the SCC2691AC1N24 is strictly a +5 V TTL-compatible device with VIH minimum of 2.0 V and VIL maximum of 0.8 V - it is not 3.3 V tolerant. Direct interfacing with 3.3 V microcontrollers requires level-shifting circuitry (e.g., TXB0104 or discrete MOSFET translators) on D0–D7, RDN, WRN, CEN, and INTRN lines. Its V_CC pin must be supplied with regulated +5 V ±10%, and all timing parameters assume 5 V operation.